CN104867944B - 阵列基板结构及其制作方法 - Google Patents
阵列基板结构及其制作方法 Download PDFInfo
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- 238000000151 deposition Methods 0.000 claims abstract description 33
- 230000009467 reduction Effects 0.000 claims abstract description 10
- 239000010410 layer Substances 0.000 claims description 297
- 239000004065 semiconductor Substances 0.000 claims description 39
- 229910052751 metal Inorganic materials 0.000 claims description 34
- 239000002184 metal Substances 0.000 claims description 34
- 239000011229 interlayer Substances 0.000 claims description 30
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- VYPSYNLAJGMNEJ-UHFFFAOYSA-N silicon dioxide Inorganic materials O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 claims description 14
- 229910052681 coesite Inorganic materials 0.000 claims description 12
- 229910052906 cristobalite Inorganic materials 0.000 claims description 12
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- BLRPTPMANUNPDV-UHFFFAOYSA-N Silane Chemical compound [SiH4] BLRPTPMANUNPDV-UHFFFAOYSA-N 0.000 claims description 6
- BOTDANWDWHJENH-UHFFFAOYSA-N Tetraethyl orthosilicate Chemical compound CCO[Si](OCC)(OCC)OCC BOTDANWDWHJENH-UHFFFAOYSA-N 0.000 claims description 5
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- 238000005516 engineering process Methods 0.000 description 3
- MRNHPUHPBOKKQT-UHFFFAOYSA-N indium;tin;hydrate Chemical compound O.[In].[Sn] MRNHPUHPBOKKQT-UHFFFAOYSA-N 0.000 description 3
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Abstract
本发明提供一种阵列基板结构及其制作方法，通过在形成公共电极(91)后，沉积第二绝缘层(83)前，在公共电极(91)上形成一抗还原层(82)，避免了在公共电极(91)上直接沉积第二绝缘层(83)的过程中，产生的还原性气氛改变公共电极(91)的膜层质量，减少了在公共电极(91)上沉积第二绝缘层(83)时对公共电极(91)透过率的影响，保证了公共电极(91)具有较高的透过率，提升了显示效果。
Description
技术领域
本发明涉及显示技术领域，尤其涉及一种阵列基板结构及其制作方法。
背景技术
触摸屏显示器(Touch Screen)可以让使用者只要用手指轻轻地碰计算机显示屏上的图符或文字就能实现对主机操作，这样摆脱了键盘和鼠标操作，使人机交互更为直截了当。主要应用于公共场所大厅信息查询、领导办公、电子游戏、点歌点菜、多媒体教学、机票、火车票预售等。产品主要分为电容式触控屏、电阻式触控屏和表面声波触摸屏三类。
阵列基板(Array substrate)是触控显示面板中的重要组成部分。
请参阅图1，为一种现有的用于触控显示面板的阵列基板结构的剖面示意图。所述阵列基板包括基板100、设于所述基板100上的缓冲层200、设于所述缓冲层200上的半导体层300、设于所述缓冲层200与半导体层300上的栅极绝缘层410、设于所述栅极绝缘层410上的层间介电层420、设于所述层间介电层420上的源/漏极500、设于所述源/漏极500与层间介电层420上的平坦层600、设于所述平坦层600上的第二金属层700、设于所述第二金属层700与平坦层600上的第一绝缘层810、设于所述第一绝缘层810上的公共电极910、设于所述公共电极910与第一绝缘层810上的第二绝缘层820、及设于所述第二绝缘层820上的像素电极920；
所述栅极绝缘层410、及层间介电层420上对应所述半导体层300上方设有第一过孔510，所述第一绝缘层810上对应所述第二金属层700上方设有第二过孔520，所述平坦层600、第一绝缘层810、及第二绝缘层820上对应所述源/漏极500上方设有第三过孔530；
所述半导体层300上设有源/漏极接触区310，所述源/漏极500经由所述第一过孔510与所述半导体层300的源/漏极接触区310相接触，所述公共电极910经由所述第二过孔520与所述第二金属层700相接触，所述像素电极920经由所述第三过孔530与所述源/漏极500相接触。
其中，所述第二金属层700用于连接触控感应电极。
具体的，所述第二绝缘层820的材料为SiNx，所述公共电极910的材料为ITO(氧化铟锡)。
具体的，通过等离子体增强化学气相沉积法来制备所述第二绝缘层820(SiNx层)，其反应原理如下：
即所述SiH4、NH3、及N2在射频电源(RF power,radio frequency power)产生的电磁场作用下反应生成SiNx:H及H2，反应产生的H2气氛具有还原性，很容易使得所述公共电极910的表层区域被还原，如图2所示，在所述公共电极910表面形成一还原ITO层912，所述还原ITO层912下方为ITO层914，由于所述还原ITO层912的透光性差，从而使得所述公共电极910的整体透光性大大降低，进而使得触控显示面板的整体光线透过率变低，影响了面板的显示效果(如亮度等)。
因此，有必要提供一种阵列基板结构及其制作方法，以解决上述问题。
发明内容
本发明的目的在于提供一种阵列基板结构，公共电极的膜层质量较好，具有较高的透过率。
本发明的目的还在于提供一种阵列基板结构的制作方法，可减少在公共电极上沉积绝缘层时对公共电极透过率的影响，保证公共电极具有较高的透过率，提升显示效果。
为实现上述目的，本发明提供一种阵列基板结构，包括基板、设于所述基板上的缓冲层、设于所述缓冲层上的半导体层、设于所述缓冲层与半导体层上的栅极绝缘层、设于所述栅极绝缘层上的层间介电层、设于所述层间介电层上的源/漏极、设于所述源/漏极与层间介电层上的平坦层、设于所述平坦层上的第二金属层、设于所述第二金属层与平坦层上的第一绝缘层、设于所述第一绝缘层上的公共电极、设于所述公共电极与第一绝缘层上的抗还原层、设于所述抗还原层上的第二绝缘层、及设于所述第二绝缘层上的像素电极；
所述栅极绝缘层、及层间介电层上对应所述半导体层上方设有第一过孔，所述第一绝缘层上对应所述第二金属层上方设有第二过孔，所述平坦层、第一绝缘层、抗还原层、及第二绝缘层上对应所述源/漏极上方设有第三过孔；
所述半导体层上设有源/漏极接触区，所述源/漏极经由所述第一过孔与所述半导体层的源/漏极接触区相接触，所述公共电极经由所述第二过孔与所述第二金属层相接触，所述像素电极经由所述第三过孔与所述源/漏极相接触。
所述抗还原层的材料为成分渐变的SiNxOy，x≥0，0≤y≤2，从公共电极至第二绝缘层的方向上，x从0开始逐渐增大，y从2开始逐渐减小至0。
所述第一绝缘层、及第二绝缘层的材料均为SiNx，x＞0。
所述半导体层的源/漏极接触区的材料为N型重掺杂硅；所述公共电极、及像素电极的材料均为ITO。
本发明还提供一种阵列基板结构的制作方法，其包括如下步骤：
步骤1、提供基板，在所述基板上沉积缓冲层；
步骤2、在所述缓冲层上沉积半导体层，对其进行图案化后，对所述半导体层上的部分区域进行N型重掺杂，形成设计与源/漏极相接触的源/漏极接触区；
步骤3、在所述半导体层上依次沉积栅极绝缘层、及层间介电层，同时对栅极绝缘层、及层间介电层进行图案化，在所述栅极绝缘层、及层间介电层上对应所述半导体层的源/漏极接触区上方形成第一过孔；
步骤4、在所述层间介电层上方沉积第一金属层，并对其进行图案化，形成源/漏极，所述源/漏极经由所述第一过孔与所述半导体层的源/漏极接触区相接触；
步骤5、在所述源/漏极、及层间介电层上方沉积平坦层；
步骤6、在所述平坦层上方沉积第二金属层，并对其进行图案化；
步骤7、在所述第二金属层、及平坦层上方沉积第一绝缘层，并对其进行图案化，在所述第一绝缘层上对应所述第二金属层上方形成第二过孔；
步骤8、在所述第一绝缘层上方沉积第一氧化物导电层，并对其进行图案化，形成公共电极，所述公共电极经由所述第二过孔与所述第二金属层相接触；
步骤9、在所述公共电极、及第一绝缘层上方沉积抗还原层；
步骤10、在所述抗还原层上沉积第二绝缘层，同时对所述第二绝缘层、抗还原层、第一绝缘层、及平坦层进行图案化，在所述第二绝缘层、抗还原层、第一绝缘层、及平坦层对应所述源/漏极上方形成第三过孔；
步骤11、在所述第二绝缘层上沉积第二氧化物导电层，并对其进行图案化，形成像素电极，所述像素电极经由所述第三过孔与所述源/漏极相接触。
所述步骤9采用等离子体增强化学气相沉积法形成所述抗还原层。
所述步骤9具体包括：
步骤91、在所述公共电极表面通入沉积SiO2的气体，生成一SiO2薄层；
步骤92、缓慢关闭沉积SiO2的气体的同时逐渐通入沉积SiNx的气体，所述沉积SiO2的气体通入的量逐渐减少至零，同时沉积SiNx的气体通入的量逐渐增多，从而在所述公共电极上得到成分渐变的SiNxOy层，x≥0，0≤y≤2，从公共电极开始向上生长的方向上，x从0开始逐渐增大，y从2开始逐渐减小至0，所述成分渐变的SiNxOy层即为抗还原层。
所述沉积SiO2的气体为TEOS和O2，所述沉积SiNx的气体为SiH4、NH3、及N2。
所述第一绝缘层、及第二绝缘层的材料均为SiNx，x＞0。
所述半导体层的源/漏极接触区的材料为N型重掺杂硅；所述公共电极、及像素电极的材料均为ITO。
本发明的有益效果：本发明的阵列基板结构，公共电极上设有抗还原层，避免了在公共电极上直接沉积第二绝缘层的过程中，产生的还原性气氛改变公共电极的膜层质量，使公共电极具有较高的透过率。本发明的阵列基板结构的制作方法，在形成公共电极后，沉积第二绝缘层前，在公共电极上形成一抗还原层，避免了在公共电极上直接沉积第二绝缘层的过程中，产生的还原性气氛改变公共电极的膜层质量，减少了在公共电极上沉积第二绝缘层时对公共电极透过率的影响，保证了公共电极具有较高的透过率，提升了显示效果。
为了能更进一步了解本发明的特征以及技术内容，请参阅以下有关本发明的详细说明与附图，然而附图仅提供参考与说明用，并非用来对本发明加以限制。
附图说明
下面结合附图，通过对本发明的具体实施方式详细描述，将使本发明的技术方案及其它有益效果显而易见。
附图中，
图1为一种现有的用于触控显示面板的阵列基板结构的剖面示意图；
图2为图1中的区域A的局部放大示意图；
图3为本发明的阵列基板结构的剖面示意图；
图4为图3中的区域A’的局部放大示意图；
图5为本发明的阵列基板结构的制作方法步骤1的示意图；
图6为本发明的阵列基板结构的制作方法步骤2的示意图；
图7为本发明的阵列基板结构的制作方法步骤3的示意图；
图8为本发明的阵列基板结构的制作方法步骤4的示意图；
图9为本发明的阵列基板结构的制作方法步骤5的示意图；
图10为本发明的阵列基板结构的制作方法步骤6的示意图；
图11为本发明的阵列基板结构的制作方法步骤7的示意图；
图12为本发明的阵列基板结构的制作方法步骤8的示意图；
图13为本发明的阵列基板结构的制作方法步骤9的示意图；
图14为本发明的阵列基板结构的制作方法步骤10的示意图。
具体实施方式
为更进一步阐述本发明所采取的技术手段及其效果，以下结合本发明的优选实施例及其附图进行详细描述。
请参阅图3和图4，本发明提供一种用于触控显示面板的阵列基板结构，其包括基板1、设于所述基板1上的缓冲层2、设于所述缓冲层2上的半导体层3、设于所述缓冲层2与半导体层3上的栅极绝缘层41、设于所述栅极绝缘层41上的层间介电层42、设于所述层间介电层42上的源/漏极5、设于所述源/漏极5与层间介电层42上的平坦层6、设于所述平坦层6上的第二金属层7、设于所述第二金属层7与平坦层6上的第一绝缘层81、设于所述第一绝缘层81上的公共电极91、设于所述公共电极91与第一绝缘层81上的抗还原层82、设于所述抗还原层82上的第二绝缘层83、及设于所述第二绝缘层83上的像素电极92；
所述栅极绝缘层41、及层间介电层42上对应所述半导体层3上方设有第一过孔51，所述第一绝缘层81上对应所述第二金属层7上方设有第二过孔52，所述平坦层6、第一绝缘层81、抗还原层82、及第二绝缘层83上对应所述源/漏极5上方设有第三过孔53；
所述半导体层3上设有源/漏极接触区31，所述源/漏极5经由所述第一过孔51与所述半导体层3的源/漏极接触区31相接触，所述公共电极91经由所述第二过孔52与所述第二金属层7相接触，所述像素电极92经由所述第三过孔53与所述源/漏极5相接触。
具体的，所述第一绝缘层81、及第二绝缘层83的材料均为SiNx，x＞0。
所述抗还原层82的材料为成分渐变的SiNxOy(氮氧化硅)，x≥0，0≤y≤2，从公共电极91至第二绝缘层83的方向上，x从0开始逐渐增大，y从2开始逐渐减小至0，即抗还原层82的成分由公共电极91的界面开始逐步改变至和第二绝缘层83的成分相同，有利于提升抗还原层82和第二绝缘层83之间的结合力。
所述半导体层3的源/漏极接触区31的材料为N型重掺杂硅(N+Si)。
所述公共电极91、及像素电极92的材料均为ITO(氧化铟锡)。
具体的，所述第二金属层7用于连接触控感应电极。
上述阵列基板结构，公共电极上沉积第二绝缘层之前沉积一抗还原层，避免了在公共电极上直接沉积第二绝缘层的过程中，产生的还原性气氛改变公共电极的膜层质量，使公共电极具有较高的透过率。
请参阅图3，结合图5-图14，本发明还提供一种阵列基板结构的制作方法，包括如下步骤：
步骤1、如图5所示，提供基板1，在所述基板1上沉积缓冲层2。
步骤2、如图6所示，在所述缓冲层2上沉积半导体层3，对其进行图案化后，对所述半导体层3上的部分区域进行N型重掺杂，形成设计与源/漏极相接触的源/漏极接触区31。
具体的，所述半导体层3的源/漏极接触区31的材料为N型重掺杂硅(N+Si)。
步骤3、如图7所示，在所述半导体层3上依次沉积栅极绝缘层41、及层间介电层42，同时对栅极绝缘层41、及层间介电层42进行图案化，在所述栅极绝缘层41、及层间介电层42上对应所述半导体层3的源/漏极接触区31上方形成第一过孔51。
步骤4、如图8所示，在所述层间介电层42上方沉积第一金属层，并对其进行图案化，形成源/漏极5，所述源/漏极5经由所述第一过孔51与所述半导体层3的源/漏极接触区31相接触。
步骤5、如图9所示，在所述源/漏极5、及层间介电层42上方沉积平坦层6。
步骤6、如图10所示，在所述平坦层6上方沉积第二金属层7，并对其进行图案化。
具体的，所述第二金属层7用于连接触控感应电极。
步骤7、如图11所示，在所述第二金属层7、及平坦层6上方沉积第一绝缘层81，并对其进行图案化，在所述第一绝缘层81上对应所述第二金属层7上方形成第二过孔52。
具体的，采用等离子体增强化学气相沉积法(PECVD)形成所述第一绝缘层81。
具体的，所述第一绝缘层81的材料为SiNx，x＞0。
步骤8、如图12所示，在所述第一绝缘层81上方沉积第一氧化物导电层，并对其进行图案化，形成公共电极91，所述公共电极91经由所述第二过孔52与所述第二金属层7相接触。
具体的，所述公共电极91的材料为ITO(氧化铟锡)。
步骤9、如图13所示，在所述公共电极91、及第一绝缘层81上方沉积抗还原层82。
具体的，采用等离子体增强化学气相沉积法形成所述抗还原层82。
具体的，所述步骤9包括以下步骤：
步骤91、在所述公共电极91表面通入沉积SiO2的气体，生成一SiO2薄层；
步骤92、缓慢关闭沉积SiO2的气体的同时逐渐通入沉积SiNx的气体，所述沉积SiO2的气体通入的量逐渐减少至零，同时沉积SiNx的气体通入的量逐渐增多，从而在所述公共电极91上得到成分渐变的SiNxOy层，x≥0，0≤y≤2，从公共电极91开始向上生长的方向上，x从0开始逐渐增大，y从2开始逐渐减小至0，所述成分渐变的SiNxOy层即为抗还原层82。
具体地，所述沉积SiO2的气体为TEOS(正硅酸乙酯)和O2(氧气)，所述TEOS和O2在射频电源(RF power,radio frequency power)产生的电磁场作用下反应生成SiO2的反应原理如下：
具体的，所述沉积SiNx的气体为SiH4(甲硅烷)、NH3(氨气)、及N2(氮气)，所述SiH4、NH3、及N2在射频电源(RF power,radio frequency power)产生的电磁场作用下反应生成SiNx的反应原理如下：
步骤10、如图14所示，在所述抗还原层82上沉积第二绝缘层83，同时对所述第二绝缘层83、抗还原层82、第一绝缘层81、及平坦层6进行图案化，在所述第二绝缘层83、抗还原层82、第一绝缘层81、及平坦层6对应所述源/漏极5上方形成第三过孔53。
具体的，采用等离子体增强化学气相沉积法形成所述第二绝缘层83。
具体地，所述第二绝缘层83的材料为SiNx，x＞0。
值得一提的是，所述第二绝缘层83也可以和所述抗还原层82一次性制备完成，有利于获得高的生产效率。
步骤11、如图3所示，在所述第二绝缘层83上沉积第二氧化物导电层，并对其进行图案化，形成像素电极92，所述像素电极92经由所述第三过孔53与所述源/漏极5相接触。
具体的，所述像素电极92的材料为ITO(氧化铟锡)。
上述阵列基板结构的制作方法，在形成公共电极后，沉积第二绝缘层前，在公共电极上形成一抗还原层，避免了在公共电极上沉积第二绝缘层的过程中，产生的还原性气氛改变公共电极的膜层质量，减少了在公共电极上沉积绝缘层时对公共电极透过率的影响，保证了公共电极具有较高的透过率，提升了显示效果。
综上所述，本发明的阵列基板结构，公共电极上设有抗还原层，避免了在公共电极上直接沉积第二绝缘层的过程中，产生的还原性气氛改变公共电极的膜层质量，使公共电极具有较高的透过率。本发明的阵列基板结构的制作方法，在形成公共电极后，沉积第二绝缘层前，在公共电极上形成一抗还原层，避免了在公共电极上直接沉积第二绝缘层的过程中，产生的还原性气氛改变公共电极的膜层质量，减少了在公共电极上沉积第二绝缘层时对公共电极透过率的影响，保证了公共电极具有较高的透过率，提升了显示效果。
以上所述，对于本领域的普通技术人员来说，可以根据本发明的技术方案和技术构思作出其他各种相应的改变和变形，而所有这些改变和变形都应属于本发明权利要求的保护范围。
Claims (7)
1.一种阵列基板结构，其特征在于，包括基板(1)、设于所述基板(1)上的缓冲层(2)、设于所述缓冲层(2)上的半导体层(3)、设于所述缓冲层(2)与半导体层(3)上的栅极绝缘层(41)、设于所述栅极绝缘层(41)上的层间介电层(42)、设于所述层间介电层(42)上的源/漏极(5)、设于所述源/漏极(5)与层间介电层(42)上的平坦层(6)、设于所述平坦层(6)上的第二金属层(7)、设于所述第二金属层(7)与平坦层(6)上的第一绝缘层(81)、设于所述第一绝缘层(81)上的公共电极(91)、设于所述公共电极(91)与第一绝缘层(81)上的抗还原层(82)、设于所述抗还原层(82)上的第二绝缘层(83)、及设于所述第二绝缘层(83)上的像素电极(92)；
所述栅极绝缘层(41)、及层间介电层(42)上对应所述半导体层(3)上方设有第一过孔(51)，所述第一绝缘层(81)上对应所述第二金属层(7)上方设有第二过孔(52)，所述平坦层(6)、第一绝缘层(81)、抗还原层(82)、及第二绝缘层(83)上对应所述源/漏极(5)上方设有第三过孔(53)；
所述半导体层(3)上设有源/漏极接触区(31)，所述源/漏极(5)经由所述第一过孔(51)与所述半导体层(3)的源/漏极接触区(31)相接触，所述公共电极(91)经由所述第二过孔(52)与所述第二金属层(7)相接触，所述像素电极(92)经由所述第三过孔(53)与所述源/漏极(5)相接触；
所述抗还原层(82)的材料为成分渐变的SiNxOy，x≥0，0≤y≤2，从公共电极(91)至第二绝缘层(83)的方向上，x从0开始逐渐增大，y从2开始逐渐减小至0。
2.如权利要求1所述的阵列基板结构，其特征在于，所述第一绝缘层(81)、及第二绝缘层(83)的材料均为SiNx，x＞0。
3.如权利要求1所述的阵列基板结构，其特征在于，所述半导体层(3)的源/漏极接触区(31)的材料为N型重掺杂硅；所述公共电极(91)、及像素电极(92)的材料均为ITO。
4.一种阵列基板结构的制作方法，其特征在于，包括如下步骤：
步骤1、提供基板(1)，在所述基板(1)上沉积缓冲层(2)；
步骤2、在所述缓冲层(2)上沉积半导体层(3)，对其进行图案化后，对所述半导体层(3)上的部分区域进行N型重掺杂，形成设计与源/漏极相接触的源/漏极接触区(31)；
步骤3、在所述半导体层(3)上依次沉积栅极绝缘层(41)、及层间介电层(42)，同时对栅极绝缘层(41)、及层间介电层(42)进行图案化，在所述栅极绝缘层(41)、及层间介电层(42)上对应所述半导体层(3)的源/漏极接触区(31)上方形成第一过孔(51)；
步骤4、在所述层间介电层(42)上方沉积第一金属层，并对其进行图案化，形成源/漏极(5)，所述源/漏极(5)经由所述第一过孔(51)与所述半导体层(3)的源/漏极接触区(31)相接触；
步骤5、在所述源/漏极(5)、及层间介电层(42)上方沉积平坦层(6)；
步骤6、在所述平坦层(6)上方沉积第二金属层(7)，并对其进行图案化；
步骤7、在所述第二金属层(7)、及平坦层(6)上方沉积第一绝缘层(81)，并对其进行图案化，在所述第一绝缘层(81)上对应所述第二金属层(7)上方形成第二过孔(52)；
步骤8、在所述第一绝缘层(81)上方沉积第一氧化物导电层，并对其进行图案化，形成公共电极(91)，所述公共电极(91)经由所述第二过孔(52)与所述第二金属层(7)相接触；
步骤9、在所述公共电极(91)、及第一绝缘层(81)上方沉积抗还原层(82)；
步骤10、在所述抗还原层(82)上沉积第二绝缘层(83)，同时对所述第二绝缘层(83)、抗还原层(82)、第一绝缘层(81)、及平坦层(6)进行图案化，在所述第二绝缘层(83)、抗还原层(82)、第一绝缘层(81)、及平坦层(6)对应所述源/漏极(5)上方形成第三过孔(53)；
步骤11、在所述第二绝缘层(83)上沉积第二氧化物导电层，并对其进行图案化，形成像素电极(92)，所述像素电极(92)经由所述第三过孔(53)与所述源/漏极(5)相接触；
所述步骤9采用等离子体增强化学气相沉积法形成所述抗还原层(82)；
所述步骤9具体包括：
步骤91、在所述公共电极(91)表面通入沉积SiO2的气体，生成一SiO2薄层；
步骤92、缓慢关闭沉积SiO2的气体的同时逐渐通入沉积SiNx的气体，所述沉积SiO2的气体通入的量逐渐减少至零，同时沉积SiNx的气体通入的量逐渐增多，从而在所述公共电极(91)上得到成分渐变的SiNxOy层，x≥0，0≤y≤2，从公共电极(91)开始向上生长的方向上，x从0开始逐渐增大，y从2开始逐渐减小至0，所述成分渐变的SiNxOy层即为抗还原层(82)。
5.如权利要求4所述的阵列基板结构的制作方法，其特征在于，所述沉积SiO2的气体为TEOS和O2，所述沉积SiNx的气体为SiH4、NH3、及N2。
6.如权利要求4所述的阵列基板结构的制作方法，其特征在于，所述第一绝缘层(81)、及第二绝缘层(83)的材料均为SiNx，x＞0。
7.如权利要求4所述的阵列基板结构的制作方法，其特征在于，所述半导体层(3)的源/漏极接触区(31)的材料为N型重掺杂硅；所述公共电极(91)、及像素电极(92)的材料均为ITO。
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