CN104637827A - 半导体结构及其制造方法 - Google Patents

半导体结构及其制造方法 Download PDF

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CN104637827A
CN104637827A CN201410624361.3A CN201410624361A CN104637827A CN 104637827 A CN104637827 A CN 104637827A CN 201410624361 A CN201410624361 A CN 201410624361A CN 104637827 A CN104637827 A CN 104637827A
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layer
silicon substrate
opening
conductive
wiring layer
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CN104637827B (zh
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简玮铭
李柏汉
刘沧宇
何彦仕
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XinTec Inc
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XinTec Inc
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Abstract

一种半导体结构及其制造方法。半导体结构的制造方法包含下列步骤：提供具有硅基板与保护层的晶圆结构，其中保护层上的焊垫由硅基板的镂空区露出；于硅基板环绕镂空区的侧壁上与硅基板背对保护层的表面上形成绝缘层；于绝缘层上与焊垫上形成布线层；于布线层上形成阻隔层；图案化阻隔层而形成第一开口，使位于硅基板的表面上的布线层由第一开口露出；于露出第一开口的布线层上形成第一导电层；于第一开口中设置导电结构，使导电结构电性接触第一导电层。本发明不仅可节省第一导电层的材料成本，还使得整个半导体结构的良率得以提升。

Description

半导体结构及其制造方法
技术领域
本发明是有关一种半导体结构及一种半导体结构的制造方法。
背景技术
已知的半导体结构可包含晶片(chip)、焊垫、介电层(例如二氧化硅)、布线层(Redistribution Layer；RDL)、导电层、阻隔层与锡球。一般而言，在制作半导体结构时，会先于尚未切割成晶片的硅基板(wafer)上覆盖介电层，以保护硅基板上的电子元件(例如感光元件)。接着，可利用光微影与蚀刻制程将介电层中的焊垫上方的硅基板与介电层去除，使硅基板与介电层形成通道，而焊垫通过此通道露出。
之后，可将绝缘层覆盖于硅基板背对介电层的表面上与硅基板环绕通道的表面上。待绝缘层形成后，可于绝缘层上与焊垫上依序形成布线层与导电层。待导电层形成后，阻隔层可覆盖于导电层上，并于阻隔层形成开口供锡球设置。
然而，由于导电层完全覆盖于布线层上，会造成导电层材料(例如镍与金)的浪费。此外，当锡球电性接触导电层后，需经侧向力(剪力)测试锡球的固定性。由于导电层完全覆盖于布线层上，当锡球受侧向力时，布线层与导电层的角落区域容易受损，造成整个半导体结构的良率难以提升。
发明内容
本发明的一技术态样为一种半导体结构的制造方法。
根据本发明一实施方式，一种半导体结构的制造方法包含下列步骤：a)提供具有硅基板与保护层的晶圆结构，其中保护层上的焊垫由硅基板的镂空区露出；b)于硅基板环绕镂空区的侧壁上与硅基板背对保护层的表面上形成绝缘层；c)于绝缘层上与焊垫上形成布线层；d)于布线层上形成阻隔层；e)图案化阻隔层而形成第一开口，使位于硅基板的表面上的布线层由第一开口露出；f)于露出第一开口的布线层上形成第一导电层；g)于第一开口中设置导电结构，使导电结构电性接触第一导电层。
在本发明一实施方式中，上述步骤e)还包含：图案化阻隔层而形成第二开口，使位于焊垫上与侧壁上的布线层由第二开口露出。
在本发明一实施方式中，上述步骤f)还包含：于露出第二开口的布线层上形成第二导电层。
在本发明一实施方式中，上述步骤f)以化学镀的方式形成第一导电层。
在本发明一实施方式中，上述步骤b)以化学气相沉积的方式形成绝缘层。
在本发明一实施方式中，上述晶圆结构具有透光元件与位于透光元件与保护层之间的支撑层，半导体结构的制造方法还包含：切割阻隔层、硅基板、保护层、支撑层与透光元件。
在本发明一实施方式中，上述半导体结构的制造方法还包含：于硅基板中形成尖角结构，其中尖角结构的高度小于或等于硅基板的表面的高度。
本发明的一技术态样为一种半导体结构。
根据本发明一实施方式，一种半导体结构包含硅基板、保护层、焊垫、绝缘层、布线层、阻隔层、第一导电层与导电结构。硅基板具有感光元件与镂空区。保护层位于硅基板上，且覆盖感光元件。焊垫位于保护层上，且对准于镂空区。绝缘层位于硅基板环绕镂空区的侧壁上与硅基板背对保护层的表面上。布线层位于绝缘层上与焊垫上。阻隔层位于布线层上，且具有第一开口。第一导电层位于第一开口中的布线层上。导电结构位于第一开口中，且电性接触第一导电层。
在本发明一实施方式中，上述阻隔层具有第二开口，且位于焊垫上与侧壁上的布线层由第二开口露出。
在本发明一实施方式中，上述半导体结构还包含第二导电层。第二导电层位于露出第二开口的布线层上。
在本发明一实施方式中，上述第二导电层的垂直高度小于硅基板背对保护层的表面的垂直高度。
在本发明一实施方式中，上述镂空区的口径朝焊垫的方向逐渐减小，使硅基板的侧壁为斜面。
在本发明一实施方式中，上述绝缘层为氧化物或氮化物。
在本发明一实施方式中，上述半导体结构还包含透光元件与支撑层。支撑层位于透光元件与保护层之间。
在本发明一实施方式中，上述硅基板还包含尖角结构。尖角结构紧邻镂空区，且尖角结构的高度小于或等于硅基板的表面的高度。尖角结构的顶端为尖形、圆形或平坦形。
在本发明一实施方式中，上述导电结构包含锡球或导电凸块。
在本发明上述实施方式中，由于第一导电层仅形成于露出第一开口的布线层上，非完全覆盖于布线层上，因此可节省第一导电层的材料成本。此外，当导电结构位于第一开口中的第一导电层上时，会电性接触第一导电层。当导电结构经侧向力(剪力)测试导电结构的固定性时，由于第一导电层仅形成于露出第一开口的布线层上，因此布线层与第一导电层的角落或边缘不易受损，使得整个半导体结构的良率得以提升。
附图说明
图1绘示根据本发明一实施方式的半导体结构的剖面图。
图2绘示根据本发明一实施方式的半导体结构的制造方法的流程图。
图3绘示图2的硅基板形成绝缘层与布线层后的剖面图。
图4绘示图3的布线层形成阻隔层后的剖面图。
图5绘示图4的露出第一开口的布线层形成第一导电层后的剖面图。
图6绘示图5的第一导电层设置导电结构后的剖面图。
图7绘示根据本发明一实施方式的半导体结构的剖面图。
图8绘示根据本发明一实施方式的半导体结构的制造方法的流程图。
图9绘示图8的布线层形成阻隔层后的剖面图。
图10绘示图9的露出第一开口与第二开口的布线层分别形成第一导电层与第二导电层后的剖面图。
图11绘示图10的第一导电层设置导电结构后的剖面图。
其中，附图中符号的简单说明如下：
100a：半导体结构                 100b：半导体结构
102：透光元件                    104：支撑层
106：彩色滤光片                  110：硅基板
111：表面                        112：感光元件
113：表面                        114：镂空区
116：侧壁                        118：尖角结构
120：保护层                      130：焊垫
140：绝缘层                      150：布线层
160：阻隔层                      162：第一开口
164：第二开口                    170：第一导电层
180：导电结构                    190：第二导电层
D：方向                          F：侧向力
H1：高度                         H2：高度
L：线段                          R：口径
S1～S7：步骤。
具体实施方式
以下将以图式揭露本发明的多个实施方式，为明确说明起见，许多实务上的细节将在以下叙述中一并说明。然而，应了解到，这些实务上的细节不应用以限制本发明。也就是说，在本发明部分实施方式中，这些实务上的细节是非必要的。此外，为简化图式起见，一些已知惯用的结构与元件在图式中将以简单示意的方式绘示。
图1绘示根据本发明一实施方式的半导体结构100a的剖面图。如图所示，半导体结构100a包含硅基板110、保护层120、焊垫130、绝缘层140、布线层150、阻隔层160、第一导电层170与导电结构180。硅基板110具有感光元件112与镂空区114。保护层120位于硅基板110的表面111上，且保护层120覆盖感光元件112，使感光元件112可由保护层120保护。此外，焊垫130位于保护层120上，且对准于硅基板110的镂空区114。绝缘层140位于硅基板110环绕镂空区114的侧壁116上与硅基板110背对保护层120的表面113上。布线层150位于绝缘层140上与焊垫130上。阻隔层160位于布线层150上，且具有第一开口162，阻隔层160可阻隔水气与灰尘进入半导体结构100a。第一导电层170位于第一开口162中的布线层150上。导电结构180位于第一开口162中，且电性接触第一导电层170。
由于第一导电层170仅形成于露出第一开口162的布线层150上，非完全覆盖于布线层150上，因此可节省第一导电层170的材料成本。此外，当导电结构180位于第一开口162中的第一导电层170上时，会电性接触第一导电层170。当导电结构180经侧向力F(剪力)测试导电结构180的固定性时，由于第一导电层170仅形成于露出第一开口162的布线层150上，因此布线层150与第一导电层170的角落或边缘不易受损，使得整个半导体结构100a的良率得以提升。
此外，半导体结构100a还可包含透光元件102、支撑层104与彩色滤光片106。其中，支撑层104位于透光元件102与保护层120之间，使透光元件102与保护层120间相隔一间距。彩色滤光片106设置于保护层120背对硅基板110的表面上。彩色滤光片106对准于硅基板110的感光元件112，使光线进入透光元件102后，可穿过彩色滤光片106而由感光元件112感测。
在本实施方式中，硅基板110可以为影像感测元件、微机电(MEMS)系统元件、运算处理元件等，其材质包含硅。硅基板110可为晶圆(wafer)经切割(dicing)制程后所形成多个晶片中的一片。保护层120与阻隔层160可以为硅的氧化物，例如二氧化硅。绝缘层140可以为氧化物或氮化物。焊垫130的材质可以包含铜，布线层150的材质可以包含铝，而第一导电层170的材质可以包含镍与金。导电结构180可以为锡球或导电凸块。此外，透光元件102可以为玻璃板，支撑层104的材质可以包含环氧树脂，但上述材料并不用以限制本发明。
此外，硅基板110还可包含尖角结构118。尖角结构118紧邻镂空区114，且尖角结构118的高度H1小于或等于硅基板110的表面113(也就是硅基板110的背面)的高度H2。尖角结构118的顶端可以为尖形、圆形或平坦形。
应了解到，在以上叙述中，已叙述过的元件连接关系将不在重复赘述，合先叙明。在以下叙述中，将说明半导体结构100a的制造方法。
图2绘示根据本发明一实施方式的半导体结构的制造方法的流程图。首先在步骤S1中，提供具有硅基板与保护层的晶圆结构，其中保护层上的焊垫由硅基板的镂空区露出。接着在步骤S2中，于硅基板环绕镂空区的侧壁上与硅基板背对保护层的表面上形成绝缘层。之后在步骤S3中，于绝缘层上与焊垫上形成布线层。接着在步骤S4中，于布线层上形成阻隔层。之后在步骤S5中，图案化阻隔层而形成第一开口，使位于硅基板的表面上的布线层由第一开口露出。接着在步骤S6中，于露出第一开口的布线层上形成第一导电层。最后在步骤S7中，于第一开口中设置导电结构，使导电结构电性接触第一导电层。
在以下叙述中，将叙述上述半导体结构的制造方法的各步骤，并以硅基板110表示尚未经切割制程的晶圆。
图3绘示图2的硅基板110形成绝缘层140与布线层150后的剖面图。首先，提供具有硅基板110与保护层120的晶圆结构，其中保护层120上的焊垫130由硅基板110的镂空区114露出。硅基板110的镂空区114可由蚀刻制程形成。在本实施方式中，当形成镂空区114时，尖角结构118可形成于硅基板110中，其中尖角结构118的高度H1小于或等于硅基板110的表面113的高度H2。接着，绝缘层140可形成于硅基板110环绕镂空区114的侧壁116上与硅基板110背对保护层120的表面113上，例如以化学气相沉积(Chemical VaporDeposition；CVD)的方式形成绝缘层140，但并不以此方法为限。待绝缘层140形成后，布线层150可形成于绝缘层140上与焊垫130上。
在本实施方式中，镂空区114的口径R朝焊垫130的方向D逐渐减小，使硅基板110的侧壁116可以为斜面。如此一来，侧壁116与焊垫130间的夹角为钝角，可避免布线层150在侧壁116与焊垫130的邻接处发生断裂。
图4绘示图3的布线层150形成阻隔层160后的剖面图。同时参阅图3与图4，待布线层150形成于绝缘层140上与焊垫130上后，阻隔层160可形成于布线层150上，且覆盖镂空区114。接着，阻隔层160可图案化而形成第一开口162，使位于硅基板110的表面113上的布线层150由阻隔层160的第一开口162露出。其中，图案化制程可包含曝光、显影与蚀刻等光微影技术。
图5绘示图4的露出第一开口162的布线层150形成第一导电层170后的剖面图。同时参阅图4与图5，待部分的布线层150由阻隔层160的第一开口162露出后，第一导电层170可形成于露出第一开口162的布线层150上。其中，由于布线层150的材质为金属(例如铝)，因此第一导电层170能以化学镀(chemical plating)的方式形成于露出第一开口162的布线层150上。第一导电层170的材质可为镍与金，在制作第一导电层170时，可先将图4的结构浸泡于镍槽中再浸泡于金槽中，使露出第一开口162的布线层150上可形成具镍与金的第一导电层170。
图6绘示图5的第一导电层170设置导电结构180后的剖面图。同时参阅图5与图6，待第一导电层170形成于露出第一开口162的布线层150上后，导电结构180可设置于阻隔层160的第一开口162中，使导电结构180可电性接触第一导电层170。接着，可将阻隔层160、硅基板110、保护层120、支撑层104与透光元件102沿线段L切割，便可得到图1的半导体结构100a。
图7绘示根据本发明一实施方式的半导体结构100b的剖面图。如图所示，半导体结构100b包含硅基板110、保护层120、焊垫130、绝缘层140、布线层150、阻隔层160、第一导电层170与导电结构180。与图1实施方式不同的地方在于：阻隔层160具有第二开口164，且位于焊垫130上与硅基板110的侧壁116上的布线层150由阻隔层160的第二开口164露出。此外，半导体结构100b还包含第二导电层190。第二导电层190位于露出第二开口164的布线层150上。
在本实施方式中，第二导电层190的垂直高度小于硅基板110背对保护层120的表面113的垂直高度。也就是说，第二导电层190是位于硅基板110的表面113的下方。
应了解到，在以上叙述中，已叙述过的元件连接关系将不在重复赘述，合先叙明。在以下叙述中，将说明半导体结构100b的制造方法。
图8绘示根据本发明一实施方式的半导体结构的制造方法的流程图。首先在步骤S1中，提供具有硅基板与保护层的晶圆结构，其中保护层上的焊垫由硅基板的镂空区露出。接着在步骤S2中，形成绝缘层于硅基板环绕镂空区的侧壁上与硅基板背对保护层的表面上。之后在步骤S3中，形成布线层于绝缘层上与焊垫上。接着在步骤S4中，形成阻隔层于布线层上。之后在步骤S5中，图案化阻隔层而形成第一开口与第二开口，使位于硅基板的表面上的布线层与位于焊垫上与侧壁上的布线层分别由第一开口与第二开口露出。接着在步骤S6中，分别形成第一导电层与第二导电层于露出第一开口的布线层上与露出第二开口的布线层上。最后在步骤S7中，设置导电结构于第一开口中，使导电结构电性接触第一导电层。
在以下叙述中，将叙述上述半导体结构的制造方法的各步骤，并以硅基板110表示尚未经切割制程的晶圆。
首先提供图3的结构，保护层120上的焊垫130由硅基板110的镂空区114露出。绝缘层140形成于硅基板110环绕镂空区114的侧壁116上与硅基板110背对保护层120的表面113上。布线层150形成于绝缘层140上与焊垫130上。
图9绘示图8的布线层150形成阻隔层160后的剖面图。待布线层150形成于绝缘层140上与焊垫130上后，阻隔层160可形成于布线层150上，且覆盖镂空区114。接着，阻隔层160可图案化而形成第一开口162与第二开口164，使位于硅基板110的表面113上的布线层150由阻隔层160的第一开口162露出，而位于焊垫130上与侧壁116上的布线层150由阻隔层160的第二开口164露出。
图10绘示图9的露出第一开口162与第二开口164的布线层150分别形成第一导电层170与第二导电层190后的剖面图。同时参阅图9与图10，待部分的布线层150由阻隔层160的第一开口162与第二开口164露出后，第一导电层170可形成于露出第一开口162的布线层150上，第二导电层190可形成于露出第二开口164的布线层150上。由于布线层150的材质为金属(例如铝)，因此第一导电层170与第二导电层190能以化学镀(chemical plating)的方式分别同步形成于露出第一开口162的布线层150上与第二开口164的布线层150上。在制作第一导电层170与第二导电层190时，可先将图9的结构浸泡于镍槽中再浸泡于金槽中，使露出第一开口162的布线层150上可形成具镍与金的第一导电层170，露出第二开口164的布线层150上可形成具镍与金的第二导电层190。
图11绘示图10的第一导电层170设置导电结构180后的剖面图。同时参阅图10与图11，待第一导电层170与第二导电层190分别形成于露出第一开口162的布线层150与露出第二开口164的布线层150上后，导电结构180可设置于阻隔层160的第一开口162中，使导电结构180电性接触第一导电层170。接着，可将阻隔层160、硅基板110、保护层120、支撑层104与透光元件102沿线段L切割，便可得到图7的半导体结构100b。
以上所述仅为本发明较佳实施例，然其并非用以限定本发明的范围，任何熟悉本项技术的人员，在不脱离本发明的精神和范围内，可在此基础上做进一步的改进和变化，因此本发明的保护范围当以本申请的权利要求书所界定的范围为准。

Claims (16)

1.一种半导体结构的制造方法，其特征在于，包含下列步骤：
a)提供具有一硅基板与一保护层的一晶圆结构，其中该保护层上的一焊垫由该硅基板的一镂空区露出；
b)于该硅基板环绕该镂空区的一侧壁上与该硅基板背对该保护层的一表面上形成一绝缘层；
c)于该绝缘层上与该焊垫上形成一布线层；
d)于该布线层上形成一阻隔层；
e)图案化该阻隔层而形成一第一开口，使位于该硅基板的该表面上的该布线层由该第一开口露出；
f)于露出该第一开口的该布线层上形成一第一导电层；以及
g)于该第一开口中设置一导电结构，使该导电结构电性接触该第一导电层。
2.根据权利要求1所述的半导体结构的制造方法，其特征在于，该步骤e)还包含：
图案化该阻隔层而形成一第二开口，使位于该焊垫上与该侧壁上的该布线层由该第二开口露出。
3.根据权利要求2所述的半导体结构的制造方法，其特征在于，该步骤f)还包含：
于露出该第二开口的该布线层上形成一第二导电层。
4.根据权利要求1所述的半导体结构的制造方法，其特征在于，该步骤f)以化学镀的方式形成该第一导电层。
5.根据权利要求1所述的半导体结构的制造方法，其特征在于，该步骤b)以化学气相沉积的方式形成该绝缘层。
6.根据权利要求1所述的半导体结构的制造方法，其特征在于，该晶圆结构具有一透光元件与位于该透光元件与该保护层之间的一支撑层，该半导体结构的制造方法还包含：
切割该阻隔层、该硅基板、该保护层、该支撑层与该透光元件。
7.根据权利要求1所述的半导体结构的制造方法，其特征在于，还包含：
于该硅基板中形成一尖角结构，其中该尖角结构的高度小于或等于该硅基板的该表面的高度。
8.一种半导体结构，其特征在于，包含：
一硅基板，具有一感光元件与一镂空区；
一保护层，位于该硅基板上，且覆盖该感光元件；
一焊垫，位于该保护层上，且对准于该镂空区；
一绝缘层，位于该硅基板环绕该镂空区的一侧壁上与该硅基板背对该保护层的一表面上；
一布线层，位于该绝缘层上与该焊垫上；
一阻隔层，位于该布线层上，且具有一第一开口；
一第一导电层，位于该第一开口中的该布线层上；以及
一导电结构，位于该第一开口中，且电性接触该第一导电层。
9.根据权利要求8所述的半导体结构，其特征在于，该阻隔层具有一第二开口，且位于该焊垫上与该侧壁上的该布线层由该第二开口露出。
10.根据权利要求9所述的半导体结构，其特征在于，还包含：
一第二导电层，位于露出该第二开口的该布线层上。
11.根据权利要求10所述的半导体结构，其特征在于，该第二导电层的垂直高度小于该硅基板的该表面的垂直高度。
12.根据权利要求8所述的半导体结构，其特征在于，该镂空区的口径朝该焊垫的方向逐渐减小，使该硅基板的该侧壁为斜面。
13.根据权利要求8所述的半导体结构，其特征在于，该绝缘层为氧化物或氮化物。
14.根据权利要求8所述的半导体结构，其特征在于，还包含：
一透光元件；以及
一支撑层，位于该透光元件与该保护层之间。
15.根据权利要求8所述的半导体结构，其特征在于，该硅基板还包含：
一尖角结构，紧邻该镂空区，且该尖角结构的高度小于或等于该硅基板的该表面的高度，其中该尖角结构的顶端为尖形、圆形或平坦形。
16.根据权利要求8所述的半导体结构，其特征在于，该导电结构为锡球或导电凸块。
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