CN104536223A - 液晶显示面板及其阵列基板 - Google Patents

液晶显示面板及其阵列基板 Download PDF

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CN104536223A
CN104536223A CN201410850807.4A CN201410850807A CN104536223A CN 104536223 A CN104536223 A CN 104536223A CN 201410850807 A CN201410850807 A CN 201410850807A CN 104536223 A CN104536223 A CN 104536223A
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layer
array base
base palte
dielectric layer
electrode
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郝思坤
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TCL China Star Optoelectronics Technology Co Ltd
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Shenzhen China Star Optoelectronics Technology Co Ltd
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Priority to CN201410850807.4A priority Critical patent/CN104536223A/zh
Priority to PCT/CN2015/070189 priority patent/WO2016106791A1/zh
Priority to US14/433,655 priority patent/US10168593B2/en
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    • G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
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Abstract

本发明提供一种液晶显示面板及其阵列基板。该阵列基板包括基体以及形成于基体上的第一金属层、第一介电层、第二金属层、绝缘层、电极层，第一金属层、第一介电层和第二金属层构成第一电容，第二金属层、绝缘层和电极层构成第二电容，电极层通过贯穿第一介电层和绝缘层的通道孔与第一金属层连接，以将第一电容和第二电容并联。通过上述方式，本发明能够减少GOA电路在阵列基板上所占的面积，有利于液晶显示面板的窄边框设计。

Description

液晶显示面板及其阵列基板
技术领域
本发明涉及液晶显示技术领域，具体而言涉及一种液晶显示面板及其阵列基板。
背景技术
当前，越来越多的液晶显示装置采用在阵列基板上制作栅极驱动电路(Gate driver On Array，简称GOA)技术，减少阵列基板的边框宽度，以迎合液晶显示装置的窄边框设计趋势。
现有技术的GOA电路通常由多个移位寄存单元组成，每一移位寄存单元连接一条栅极线，利用上一行栅极线输出的高电平信号对移位寄存单元中的电容充电，以使本行的栅极线输出高电平信号，再利用下一行栅极线输出的高电平信号实现复位。其中，为使本行的栅极线输出高电平信号，必须确保足够大的电容，即电容在阵列基板上所占的面积，然而面积较大的电容不利于液晶显示面板的窄边框设计。
发明内容
有鉴于此，本发明实施例所要解决的技术问题是提供一种液晶显示面板及其阵列基板，能够减少GOA电路在阵列基板上所占的面积，有利于液晶显示面板的窄边框设计。
为解决上述技术问题，本发明采用的一个技术方案是：提供一种阵列基板，包括基体以及形成于基体上的第一金属层、第一介电层、第二金属层、绝缘层、电极层，第一金属层、第一介电层和第二金属层构成第一电容，第二金属层、绝缘层和电极层构成第二电容，电极层通过贯穿第一介电层和绝缘层的通道孔与第一金属层连接，以将第一电容和第二电容并联。
其中，阵列基板进一步包括位于非显示区的移位寄存单元，第一电容和第二电容并联连接于移位寄存单元。
其中，沿垂直于基体的方向，第一金属层在基体上的投影区域的面积大于第二金属层在基体上的投影区域的面积，通道孔设置于第二金属层对应的投影区域之外。
其中，阵列基板还包括设置于基体上的薄膜晶体管，薄膜晶体管包括栅电极、源电极和漏电极，栅电极与第一金属层同步形成，由源电极和漏电极组成的源漏电极层与第二金属层同步形成，源漏电极层与栅电极之间夹设的第一介电层，与第一电容的第一介电层同步形成。
其中，阵列基板包括第一区域和第二区域，薄膜晶体管位于第一区域，电极层设置于第二区域的绝缘层上。
其中，薄膜晶体管还包括形成于基体上的半导体层，半导体层和栅电极之间夹设有第二介电层，第一金属层设置于第二介电层上，源电极和漏电极均贯穿第一介电层和第二介电层并与半导体层连接。
其中，薄膜晶体管还包括形成于栅电极和源漏电极层之间的半导体层，半导体层和栅电极之间夹设有第二介电层，第一介电层夹设于半导体层和源漏电极层之间，源电极和漏电极均贯穿第一介电层并与半导体层连接。
其中，第二金属层和源漏电极层与基体之间的距离相等。
其中，栅电极与第一金属层的厚度相等，源漏电极层与第二金属层的厚度相等。
为解决上述技术问题，本发明采用的另一个技术方案是：提供一种液晶显示面板，包括上述阵列基板。
通过上述技术方案，本发明实施例所产生的有益效果是：本发明实施例设计第一金属层、第一介电层和第二金属层构成第一电容，第二金属层、绝缘层和电极层构成第二电容，通过电极层贯穿第一介电层和绝缘层的通道孔与第一金属层连接，从而将第一电容和第二电容并联，在确保足够大的电容时，能够减少GOA电路在阵列基板上所占的面积，有利于液晶显示面板的窄边框设计。
附图说明
图1是本发明液晶显示面板一实施例的结构示意图；
图2是图1所示阵列基板一实施例的结构剖视图；
图3是图1所示液晶显示面板一实施例的像素结构示意图。
具体实施方式
下面将结合本发明实施例中的附图，对本发明实施例中的技术方案进行清楚、完整地描述，显然，本发明以下所描述的实施例仅仅是本发明的一部分实施例，而不是全部的实施例。基于本发明中的实施例，本领域普通技术人员在没有作出创造性劳动前提下所获得的所有其它实施例，都属于本发明保护的范围。
图1是本发明液晶显示面板一实施例的结构示意图。如图1所示，液晶显示面板10包括第一基板11、第二基板12以及液晶层13，第一基板11和第二基板12相对间隔设置，其中第二基板12可以为CF(Color Filter，彩色滤光片)彩膜基板，对应地，第一基板11可以为TFT(Thin Film Transistor，薄膜晶体管)阵列基板。
图2是图1所示阵列基板一实施例的结构剖视图。如图2所示，阵列基板(第一基板)11包括基体111以及层叠形成于基体111上的薄膜晶体管T、第一金属层112、第一介电层113、第二金属层114、绝缘层115、电极层116。其中：
阵列基板11包括第一区域A和第二区域B，薄膜晶体管T位于第一区域A，电极层116设置于第二区域B的绝缘层115上。
在第一区域A，
薄膜晶体管T包括栅电极g、源电极s、漏电极d以及形成于基体111上的半导体层117，其中，半导体层117和栅电极g之间夹设有第二介电层118，并且基体111上除半导体层117覆盖区域之外还设置有第二介电层118，第一金属层112设置于位于第二区域的第二介电层118上，薄膜晶体管T的源电极s和漏电极d均贯穿第一介电层113和第二介电层118并与半导体层117电连接。
应该理解到，本发明实施例可设置薄膜晶体管T具有其他结构，例如，将半导体层117形成于由源电极s和漏电极d组成的源漏电极层和栅电极g之间，对应地，位于第一区域A的第二介电层118夹设于半导体层117和栅电极g之间，第一介电层113夹设于半导体层117和源漏电极层之间，薄膜晶体管T的源电极s和漏电极d均贯穿第一介电层113并与半导体层117电连接。
在第二区域B，
第一金属层112、第一介电层113和第二金属层114构成第一电容C1，第二金属层114、绝缘层115和电极层116构成第二电容C2，电极层116通过贯穿第一介电层113和绝缘层115的通道孔V0与第一金属层112连接，以将第一电容C1和第二电容C2并联。
其中，沿垂直于基体111的方向，第一金属层112在基体111上的投影区域的面积大于第二金属层114在基体上的投影区域的面积，通道孔V0设置于第二金属层114对应的投影区域之外。
第一金属层112与薄膜晶体管T的栅电极g同步形成，第二金属层114与薄膜晶体管T的源漏电极层同步形成，并且薄膜晶体管T的源漏电极层与栅电极g之间夹设的第一介电层113，与第一电容C1(位于第一金属层112和第二金属层114之间)的第一介电层113同步形成，位于第二区域B和第一区域A的第二介电层118同步形成。
在本实施例中，第二金属层114与基体111之间的距离等于薄膜晶体管T的源漏电极层与基体111之间的距离。
另外，薄膜晶体管T的栅电极g与第一金属层112的厚度相等，例如可以为(埃米)，薄膜晶体管T的源漏电极层(即位于第一介电层113上的部分)与第二金属层114的厚度相等，例如可以为进一步地，本发明实施例可对其他各层的厚度进行设置，例如第一介电层113的最大厚度为半导体层117的最大厚度为第二介电层118的最大厚度为
图3是图1所示液晶显示面板一实施例的像素结构示意图。如图3所示，阵列基板11还包括栅极驱动器31、数据驱动器32、多条平行设置的栅极线G1,G2,…,Gn以及多条平行设置且与栅极线G1,G2,…,Gn绝缘交叉的数据线D1,D2,…,Dn，其中多条栅极线G1,G2,…,Gn和多条数据线D1,D2,…,Dn定义多个阵列方式排布的像素区域33。
每一像素区域33包括像素电极P和图2所示的薄膜晶体管T，像素电极P与液晶显示面板10的公共电极相对设置，像素电极P对应连接薄膜晶体管T的漏电极d，栅极线对应连接薄膜晶体管T的栅电极g，数据线对应连接薄膜晶体管T的源电极s，薄膜晶体管T导通时经源电极s传输数据驱动信号至像素电极P，使得栅极驱动器31通过对应连接的栅极线为像素区域33的像素单元提供扫描信号，数据驱动器32通过对应连接的数据线为像素区域33的像素单元提供灰阶信号。
阵列基板11还包括位于非显示区的多个移位寄存单元，每一移位寄存单元控制一条栅极线的电位，例如与第n条栅极线Gn连接的移位寄存单元控制栅极线Gn的电位，多个移位寄存单元与栅极驱动器31连接以获得驱动讯号，相邻两个移位寄存单元之间也通过讯号线连接，从而保证各个移位寄存单元能逐列控制栅极线的充电和放电。
在本实施例中，第一电容C1和第二电容C2并联连接于移位寄存单元，上一行栅极线输出的高电平信号对移位寄存单元中的第一电容C1和第二电容C2充电，并通过第一电容C1和第二电容C2为本行的栅极线供电以使其输出高电平信号，再利用下一行栅极线输出的高电平信号实现复位。相比较于现有技术的一个电容，本发明实施例通过第一电容C1和第二电容C2这两个电容进行充电和放电，因此在确保足够大的电容时，能够减少第一电容C1和第二电容C2沿垂直于阵列基板11方向在阵列基板11上所占的面积，即减少GOA电路在阵列基板11上所占的面积，有利于液晶显示面板10的窄边框设计。
再次说明，以上所述仅为本发明的实施例，并非因此限制本发明的专利范围，凡是利用本发明说明书及附图内容所作的等效结构或等效流程变换，例如各实施例之间技术特征的相互结合，或直接或间接运用在其他相关的技术领域，均同理包括在本发明的专利保护范围内。

Claims (10)

1.一种阵列基板，其特征在于，所述阵列基板包括基体以及形成于所述基体上的第一金属层、第一介电层、第二金属层、绝缘层、电极层，其中，所述第一金属层、所述第一介电层和所述第二金属层构成第一电容，所述第二金属层、所述绝缘层和所述电极层构成第二电容，所述电极层通过贯穿所述第一介电层和所述绝缘层的通道孔与所述第一金属层连接，以将所述第一电容和所述第二电容并联。
2.根据权利要求1所述的阵列基板，其特征在于，所述阵列基板进一步包括位于非显示区的移位寄存单元，所述第一电容和所述第二电容并联连接于所述移位寄存单元。
3.根据权利要求1所述的阵列基板，其特征在于，沿垂直于所述基体的方向，所述第一金属层在所述基体上的投影区域的面积大于所述第二金属层在所述基体上的投影区域的面积，所述通道孔设置于所述第二金属层对应的投影区域之外。
4.根据权利要求1所述的阵列基板，其特征在于，所述阵列基板还包括设置于所述基体上的薄膜晶体管，所述薄膜晶体管包括栅电极、源电极和漏电极，所述栅电极与所述第一金属层同步形成，由所述源电极和所述漏电极组成的源漏电极层与所述第二金属层同步形成，所述源漏电极层与所述栅电极之间夹设的第一介电层，与所述第一电容的第一介电层同步形成。
5.根据权利要求4所述的阵列基板，其特征在于，所述阵列基板包括第一区域和第二区域，所述薄膜晶体管位于所述第一区域，所述电极层设置于所述第二区域的所述绝缘层上。
6.根据权利要求5所述的阵列基板，其特征在于，所述薄膜晶体管还包括形成于所述基体上的半导体层，所述半导体层和所述栅电极之间夹设有第二介电层，所述第一金属层设置于所述第二介电层上，所述源电极和所述漏电极均贯穿所述第一介电层和所述第二介电层并与所述半导体层连接。
7.根据权利要求5所述的阵列基板，其特征在于，所述薄膜晶体管还包括形成于所述栅电极和所述源漏电极层之间的半导体层，所述半导体层和所述栅电极之间夹设有第二介电层，所述第一介电层夹设于所述半导体层和所述源漏电极层之间，所述源电极和所述漏电极均贯穿所述第一介电层并与所述半导体层连接。
8.根据权利要求4所述的阵列基板，其特征在于，所述第二金属层和所述源漏电极层与所述基体之间的距离相等。
9.根据权利要求4所述的阵列基板，其特征在于，所述栅电极与所述第一金属层的厚度相等，所述源漏电极层与所述第二金属层的厚度相等。
10.一种液晶显示面板，其特征在于，所述液晶显示面板包括上述权利要求1～9任意一项所述的阵列基板。
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