CN104517905A - 用于模塑衬底的金属重分布层 - Google Patents

用于模塑衬底的金属重分布层 Download PDF

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Publication number
CN104517905A
CN104517905A CN201410490549.3A CN201410490549A CN104517905A CN 104517905 A CN104517905 A CN 104517905A CN 201410490549 A CN201410490549 A CN 201410490549A CN 104517905 A CN104517905 A CN 104517905A
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semiconductor die
terminal
redistribution layer
metal redistribution
molding compounds
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CN201410490549.3A
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CN104517905B (zh
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U·瓦赫特
D·迈尔
T·基尔格
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Infineon Technologies AG
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Infineon Technologies AG
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Abstract

本公开涉及用于模塑衬底的金属重分布层。通过在支撑衬底上放置多个半导体裸片、以及采用模塑化合物覆盖半导体裸片以形成模塑结构而封装集成电路，每一个半导体裸片在朝向支撑衬底的侧部上具有多个端子。随后从模塑结构移除支撑衬底以暴露具有端子的半导体裸片的侧部，以及形成在模塑结构上并且与半导体裸片的端子以及模塑化合物直接接触的金属重分布层。形成重分布层而不首先在具有半导体裸片的端子的模塑结构的侧部上形成电介质层。也公开了对应的模塑结构和单独模塑半导体封装。

Description

用于模塑衬底的金属重分布层
技术领域
本申请涉及集成电路的封装，特别是用于封装集成电路的模塑衬底。
背景技术
嵌入式晶片级球栅阵列(eWLB)是用于集成电路(IC)的封装技术，其中封装互联施加在由单独的半导体裸片(芯片)和模塑化合物制成的人造晶片上。由模塑化合物嵌入(过塑)半导体裸片。重分布层施加至eWLB晶片的其中可接触裸片焊盘的一侧。电连接形成在裸片焊盘与重分布层之间。焊料凸块通常位于重分布层上以使得在将eWLB晶片划片或者分隔为单独IC封装之后能够安装封装。采用eWLB技术，限定了最终的封装布局，并且采用并行晶片处理可以减小每个封装的成本。需要进一步缩减成本，以使得eWLB技术与较不昂贵的封装技术相比具有更好的成本竞争力。
发明内容
根据封装集成电路的方法的一个实施例，该方法包括：在支撑衬底上放置多个半导体裸片，每个半导体裸片在朝向支撑衬底的一侧处具有多个端子；采用模塑化合物覆盖半导体裸片以形成模塑结构；从模塑结构移除支撑衬底以暴露半导体裸片的具有端子的侧部；以及形成在模塑结构上并且与半导体裸片的端子以及模塑化合物直接接触的金属重分布层，而不必首先在模塑结构的具有半导体裸片端子的侧部上形成电介质层。
根据模塑衬底的一个实施例，模塑衬底包括模塑结构，包括嵌入在模塑化合物中的多个半导体裸片。半导体裸片的每一个在并未被模塑化合物覆盖的侧部处具有多个端子。模塑衬底进一步包括在模塑结构上并且与半导体裸片的端子以及模塑化合物直接接触的金属重分布层。
根据模塑半导体封装的一个实施例，模塑半导体封装包括嵌入在模塑化合物中的半导体裸片。半导体裸片在并未被模塑化合物覆盖的侧部处具有多个端子。模塑半导体封装进一步包括直接与半导体裸片的端子接触并且延伸越过半导体裸片的侧向边缘至模塑化合物之上的金属重分布层。金属重分布层直接接触模塑化合物。
一旦阅读了以下详细说明书以及一旦查看了附图，本领域技术人员将认识到额外的特征和优点。
附图说明
附图的元件无需按照相互比例绘制。相同的附图标记表示对应的相同部件。各个所示实施例的特征可以组合，除非它们相互排斥。实施例示出在附图中并且详细描述在以下说明书中。
图1A至图1D示出了在使用模塑衬底封装集成电路的方法的不同阶段期间模塑衬底的相应剖视图。
图2示出了根据一个实施例的模塑衬底的从上至下平视图。
图3示出了根据另一实施例的模塑衬底的从上至下平视图。
图4A至图4C示出了在金属重分布层的形成期间模塑衬底的相应剖视图。
图5A和图5B示出了根据一个实施例的在形成金属重分布层之后后续工序期间模塑衬底的相应剖视图。
图6A和图6B示出了根据另一实施例的在形成金属重分布层之后后续工序期间模塑衬底的相应剖视图。
具体实施方式
在此所述实施例提供了一种模塑eWLB衬底，其中半导体裸片嵌入在模塑化合物中以形成模塑结构，并且金属重分布层形成在模塑结构上与半导体裸片的端子以及模塑化合物直接接触。就此而言，没有阻焊层或者其他电介质层插入在eWLB衬底的模塑结构与形成在模塑结构上的金属重分布层之间，从而减小了eWLB衬底的成本。
图1包括图1A至图1D，示出了根据一个实施例的在使用模塑衬底封装集成电路的方法的不同阶段期间模塑衬底的剖视图。多个相似裸片同时处理，并且一旦完成了模塑衬底工艺处理则分隔为单独模塑封装。图1A示出了在多个半导体裸片100放置在厚支撑(载体)衬底102上之后的结构。支撑衬底102在后续模塑和金属化工艺期间向半导体裸片100提供了机械支撑，并且可以包括例如金属或陶瓷板。每个裸片100的正面侧101朝向支撑衬底102，并且具有多个端子104。例如在晶体管裸片的情形中，至少源极(或发射极)端子和栅极端子可以布置在裸片100的正面侧101处。在二极管裸片的情形中，阳极和阴极端子可以布置在裸片100的正面侧101处。端子104可以是接合焊盘、或者半导体裸片传统的所具有的任何类型端子结构的形式。半导体裸片100可以在半导体裸片100的具有端子104的侧部101处具有电介质106。例如，电介质层106可以是诸如SiO2、Si3N4、和/或酰亚胺和/或任何其他标准电介质层之类的钝化层。至少一部分端子104并未被电介质层106覆盖。电介质层106是可选的，并且如果需要的话可以省略。在两种情形下，半导体裸片100均在支撑衬底102上相互间隔开。粘附薄膜108可以用于将半导体裸片100适当地保持在支撑衬底102上。
图1B示出了在半导体裸片100嵌入在模塑化合物110中以形成模塑结构112之后的结构。可以使用任何标准模塑化合物，诸如传统eWLB技术中采用的种类。例如，可以使用液体或固体模塑化合物。在每种情形下，半导体裸片100在除了朝向支撑衬底102的侧部101之外的所有侧部上被模塑化合物110覆盖，以形成模塑结构112。
图1C示出了在从模塑结构112移除支撑衬底102和粘附薄膜108以暴露半导体裸片100的具有端子104的侧部101之后的结构。可以通过机械和/或化学刻蚀而移除支撑衬底102和粘附薄膜108。
图1D示出了在模塑结构112上形成重分布层114之后的结构。形成金属重分布层114而不首先在模塑结构112的具有半导体裸片100的端子104的侧部113上形成电介质层。就此而言，没有阻焊层或其他电介质层插入在eWLB结构的模塑结构与形成在模塑结构112的金属重分布层114之间。替代的，重分布层114与半导体裸片100和模塑化合物110直接接触，简化了制造工艺并且减小了eWLB衬底的衬底。在每一个半导体裸片100在具有端子104的半导体裸片100的侧部101处具有电介质层106的情形中，金属重分布层114除了与裸片端子104和模塑化合物110之外还与半导体裸片100的电介质层106直接接触。另外，金属重分布层114除了与端子104和模塑化合物110之外还与裸片100的半导体本体直接接触。
通常，设计金属重分布层114以促进至半导体裸片100的外部电连接并且因此而图形化。在一个实施例中，金属重分布层114是例如由标准光刻和Cu电镀模塑衬底112的在具有半导体裸片100端子104的侧部113上形成的结构化铜层。金属重分布层114朝向远离模塑结构112的侧部可以具有NiPPd、NiPPdAu或任何其他可接合或者可焊接的表面。
图2示出了在模塑结构112上形成金属重分布层114之后并且在划片或者分隔为单独封装之前模塑结构112的自顶向下平视图。根据该实施例，设计金属重分布层114以放大用于半导体裸片100的端子104的有效接触面积。更具体地，金属重分布层114包括焊盘结构200，其与半导体裸片100的端子104和模塑化合物110直接接触。焊盘结构200比半导体裸片100的端子104具有更大的表面面积。裸片端子104布置在焊盘结构200之下，并且由图2中虚线框表示以示出如上所述的表面面积差。更大的焊盘结构200提供了更大的表面面积以用于在划片(分隔)之后接触单独封装。
图3示出了根据另一实施例的、在模塑结构112上形成金属重分布层114之后并且在划片或者分隔为单独封装之前模塑结构112的自顶向下平视图。根据该实施例，设计金属重分布层114以重分布电连接至半导体裸片100的端子104并且也放大了用于裸片端子104的有效接触面积。更具体的，金属重分布层114包括至少与模塑化合物110直接接触的焊盘结构300。焊盘结构300比半导体裸片100的端子104具有更大表面面积，并且取决于布图而可以延伸至裸片100上。金属重分布层114根据该实施例可以包括重布线结构302。重布线结构302与焊盘结构300整体成型以用于对远离半导体裸片100的端子104的焊盘结构300重分布。裸片端子104布置在重布线结构302之下，并且在附图3中由虚线框表示以示出如上所述的表面面积差。金属重分布层114的焊盘结构300和重布线结构302布置在相同平面内。
图4包括图4A至图4C，示出了在形成金属重分布层114不同阶段期间模塑结构的剖视图。根据该实施例，金属重分布层114包括铜。掩膜形成在模塑结构112上，使得模塑结构112的具有半导体裸片100的端子104的侧部至少在半导体裸片100的端子104和一部分模塑化合物110之上具有未被遮掩的区域，以及与未被遮掩区域相邻的被遮掩区域。在一个实施例中，掩膜形成工艺包括采用光刻胶400涂覆具有模塑结构112的半导体裸片100的端子104的侧部113，并且通过具有开口404的掩膜402对光刻胶400的区域曝光，如图4A所示。曝光工艺由图4A中朝向下的箭头表示。随后固化光刻胶400，并且移除了光刻胶的未显影区域以形成掩膜406，如图4B所示。光刻胶400的已移除(未显影)区域对应于其中将要形成铜重分布层114的区域。随后将铜电镀在模塑结构112的未被遮掩区域以形成直接接触裸片端子104和模塑化合物110的金属重分布层114，如图4C所示。没有插入的电介质层插入在模塑结构112与电镀的金属重分布层114之间。
图5包括图5A和图5B，示出了在模塑结构112上形成金属重分布层114之后的后续工艺期间模塑结构的剖视图。根据该实施例，焊料500形成在金属重分布层114上，而没有首先在模塑结构112的具有半导体裸片100的端子104的侧部113上形成焊料掩膜，如图5A所示。焊料500可以为凸块或球形的形式。可以通过在金属重分布层114上施加焊剂或者其他可焊接材料、在焊剂材料上放置焊料500以及回流焊料500而形成焊料500。焊料500可以例如印刷为焊料胶膏的形式。金属重分布层114的朝向远离模塑结构112的侧部可以具有NiPPd、NiPPdAu或任何其他可焊接表面。模塑结构112在如图5B所示在金属重分布层114上形成焊料500之后划分为单独半导体封装502。单独半导体封装502中的每一个包括至少一个半导体裸片100。
图6包括图6A和图6B，示出了根据另一实施例的、在形成金属重分布层114之后后续工艺期间模塑结构的剖视图。在图6A中，模塑结构112已经划分为单独半导体封装600，而并未在金属重分布层114上形成焊料。单独半导体封装600中的每一个包括至少一个半导体裸片100。键合引线602随后贴附至每一个单独半导体封装600的金属重分布层114，如图6B所示。图6B为了便于说明而仅示出了具有键合引线602的一个单独半导体封装600。键合引线602可以使用任何标准的引线接合工艺而贴附至每个单独半导体封装600的金属重分布层114。金属重分布层114朝向远离模塑结构112的侧部可以具有NiPPd、NiPPdAu或任何其他可接合表面。
如图6B所示，金属重分布层114与半导体裸片100的端子104直接接触，并且延伸越过半导体裸片100的横向边缘103至模塑化合物110上。如此，金属重分布层114直接接触模塑化合物110，如在此之前所述。
诸如“之下”、“下方”、“低于”、“之上”、“上方”等等的空间相对术语用于便于描述以解释一个元件相对于第二元件的位置。这些术语意在除了与那些附图中所示不同朝向之外包括了装置的不同朝向。此外，诸如“第一”、“第二”等等的术语也用于描述各种元件、区域、区段等等，并且也并非意在限定。说明书全文中相同的术语涉及相同的元件。
如在此使用的，术语“具有”、“包含”、“含有”、“包括”等等是开放性术语，指示了所述元件或特征的存在，但是并未排除额外的元件或特征。冠词“一”、“一个”和“该”意在包括复数以及单数形式，除非上下文明确给出相反指示。
考虑到变型例和应用的以上范围，应该理解的是本发明并非由之前说明书限定，也并非由所附附图限定。替代的，本发明仅由以下权利要求及其法律等价形式而限定。

Claims (20)

1.一种封装集成电路的方法，所述方法包括：
在支撑衬底上放置多个半导体裸片，所述半导体裸片中的每一个半导体裸片在朝向所述支撑衬底的侧部处具有多个端子；
采用模塑化合物覆盖所述半导体裸片以形成模塑结构；
从所述模塑结构移除所述支撑衬底以暴露所述半导体裸片的具有所述端子的侧部；以及
形成在所述模塑结构上并且与所述半导体裸片的所述端子和所述模塑化合物直接接触的金属重分布层，而不在所述模塑结构的具有所述半导体裸片的所述端子的侧部上首先形成电介质层。
2.根据权利要求1所述的方法，其中，在所述模塑结构上形成所述金属重分布层包括：
形成与所述半导体裸片的所述端子和所述模塑化合物直接接触的焊盘结构，所述焊盘结构具有比所述半导体裸片的所述端子更大的表面面积。
3.根据权利要求1所述的方法，其中，在所述模塑结构上形成所述金属重分布层包括：
形成至少与所述模塑化合物直接接触的焊盘结构，所述焊盘结构具有比所述半导体裸片的所述端子更大的表面面积；以及
形成与所述焊盘结构整体成型的重布线结构以用于重分布远离所述半导体裸片的所述端子的所述焊盘结构，所述焊盘结构和所述重布线结构布置在相同平面内。
4.根据权利要求1所述的方法，其中，所述半导体裸片中的每一个半导体裸片在所述半导体裸片的具有所述端子的侧部处具有电介质层，所述端子中的至少一部分未被所述电介质层覆盖，以及其中所述金属重分布层与所述半导体裸片的所述电介质层直接接触。
5.根据权利要求1所述的方法，进一步包括：
在所述金属重分布层上形成焊料，而不首先在所述模塑结构的具有所述半导体裸片的所述端子的侧部上形成焊料掩膜。
6.根据权利要求5所述的方法，进一步包括：
在所述金属重分布层上形成所述焊料之后将所述模塑结构划分为单独封装，所述单独封装中的每一个封装包括所述半导体裸片中的至少一个半导体裸片。
7.根据权利要求1所述的方法，其中，在所述模塑结构上形成所述金属重分布层包括：
在所述模塑结构上形成掩膜，使得所述模塑结构的具有所述半导体裸片的所述端子的侧部具有在至少所述半导体裸片的所述端子和一部分所述模塑化合物之上的未被遮掩区域，以及与所述未被遮掩区域相邻的已被遮掩区域；以及
在所述模塑结构的所述未被遮掩区域上电镀铜。
8.根据权利要求1所述的方法，进一步包括：
将所述模塑结构划分为单独封装，所述单独封装中的每一个封装包括所述半导体裸片中的至少一个半导体裸片；以及
将键合引线连接至所述单独封装中的每一个封装的金属重分布层。
9.一种模塑衬底，包括：
模塑结构，包括嵌入在模塑化合物中的多个半导体裸片，所述半导体裸片中的每一个半导体裸片在未被所述模塑化合物覆盖的侧部处具有多个端子；以及
金属重分布层，在所述模塑结构上并且与所述半导体裸片的所述端子以及所述模塑化合物直接接触。
10.根据权利要求9所述的模塑衬底，其中，所述金属重分布层包括与所述半导体裸片的所述端子以及所述模塑化合物直接接触的焊盘结构，所述焊盘结构具有比所述半导体裸片的所述端子更大的表面面积。
11.根据权利要求9所述的模塑衬底，其中，所述金属重分布层包括：
与至少所述模塑化合物直接接触的焊盘结构，所述焊盘结构具有比所述半导体裸片的所述端子更大的表面面积；以及
与所述焊盘结构整体成型的重布线结构，以用于重分布远离所述半导体裸片的所述端子的所述焊盘结构，所述焊盘结构和所述重布线结构布置在相同平面内。
12.根据权利要求9所述的模塑衬底，其中，所述半导体裸片中的每一个半导体裸片在所述半导体裸片的具有所述端子的侧部处具有电介质层，所述端子中的至少一部分未被所述电介质层覆盖，以及其中所述金属重分布层与所述半导体裸片的所述电介质层直接接触。
13.根据权利要求9所述的模塑衬底，进一步包括，在所述金属重分布层上的焊料。
14.根据权利要求9所述的模塑衬底，其中，所述金属重分布层包括电镀铜。
15.一种模塑半导体封装，包括：
半导体裸片，嵌入在模塑化合物中，所述半导体裸片在未被所述模塑化合物覆盖的侧部处具有多个端子；以及
金属重分布层，与所述半导体裸片的所述端子直接接触并且延伸越过所述半导体裸片的侧向边缘至所述模塑化合物上，所述金属重分布层直接接触所述模塑化合物。
16.根据权利要求15所述的模塑半导体封装，其中，所述金属重分布层包括与所述半导体裸片的所述端子和所述模塑化合物直接接触的焊盘结构，所述焊盘结构具有比所述半导体裸片的所述端子更大的表面面积。
17.根据权利要求15所述的模塑半导体封装，其中，所述金属重分布层包括：
焊盘结构，与至少所述模塑化合物直接接触，所述焊盘结构具有比所述半导体裸片的所述端子更大的表面面积；以及
重布线结构，与所述焊盘结构整体成型以用于重分布远离所述半导体裸片的所述端子的所述焊盘结构，所述焊盘结构和所述重布线结构布置在相同平面内。
18.根据权利要求15所述的模塑半导体封装，其中，所述半导体裸片在所述半导体裸片的具有所述端子的侧部处具有电介质层，所述端子中的至少一部分未被所述电介质层覆盖，以及其中所述金属重分布层与所述半导体裸片的所述电介质层直接接触。
19.根据权利要求15所述的模塑半导体封装，进一步包括，在所述金属重分布层上的焊料。
20.根据权利要求15所述的模塑半导体封装，进一步包括，连接至所述金属重分布层的键合引线。
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