CN104425527A - Disjunction method of wafer laminated body for image detectors - Google Patents
Disjunction method of wafer laminated body for image detectors Download PDFInfo
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- CN104425527A CN104425527A CN201410345791.1A CN201410345791A CN104425527A CN 104425527 A CN104425527 A CN 104425527A CN 201410345791 A CN201410345791 A CN 201410345791A CN 104425527 A CN104425527 A CN 104425527A
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- 239000011521 glass Substances 0.000 claims abstract description 36
- 229910052710 silicon Inorganic materials 0.000 claims abstract description 36
- 239000010703 silicon Substances 0.000 claims abstract description 36
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 claims abstract description 31
- 239000011347 resin Substances 0.000 claims abstract description 8
- 229920005989 resin Polymers 0.000 claims abstract description 8
- 238000003825 pressing Methods 0.000 claims abstract description 7
- 208000037656 Respiratory Sounds Diseases 0.000 claims description 11
- 150000003376 silicon Chemical class 0.000 claims description 5
- 238000010030 laminating Methods 0.000 claims description 2
- 238000005520 cutting process Methods 0.000 abstract description 28
- 230000015572 biosynthetic process Effects 0.000 abstract description 2
- 230000000149 penetrating effect Effects 0.000 abstract 1
- 238000004806 packaging method and process Methods 0.000 description 11
- 239000002173 cutting fluid Substances 0.000 description 8
- 239000000463 material Substances 0.000 description 6
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- 239000000203 mixture Substances 0.000 description 5
- 238000010586 diagram Methods 0.000 description 4
- 238000005516 engineering process Methods 0.000 description 4
- 230000007246 mechanism Effects 0.000 description 4
- 238000000059 patterning Methods 0.000 description 4
- 238000003466 welding Methods 0.000 description 4
- 238000011084 recovery Methods 0.000 description 3
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- 230000008901 benefit Effects 0.000 description 2
- 238000004140 cleaning Methods 0.000 description 2
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- 230000002950 deficient Effects 0.000 description 2
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- 238000012986 modification Methods 0.000 description 2
- NJPPVKZQTLUDBO-UHFFFAOYSA-N novaluron Chemical compound C1=C(Cl)C(OC(F)(F)C(OC(F)(F)F)F)=CC=C1NC(=O)NC(=O)C1=C(F)C=CC=C1F NJPPVKZQTLUDBO-UHFFFAOYSA-N 0.000 description 2
- 238000001020 plasma etching Methods 0.000 description 2
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- 241000699670 Mus sp. Species 0.000 description 1
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- 229910045601 alloy Inorganic materials 0.000 description 1
- 230000008859 change Effects 0.000 description 1
- 239000004020 conductor Substances 0.000 description 1
- 238000001816 cooling Methods 0.000 description 1
- 229910003460 diamond Inorganic materials 0.000 description 1
- 239000010432 diamond Substances 0.000 description 1
- 238000001035 drying Methods 0.000 description 1
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- 230000005684 electric field Effects 0.000 description 1
- 230000003028 elevating effect Effects 0.000 description 1
- 238000005538 encapsulation Methods 0.000 description 1
- 238000000227 grinding Methods 0.000 description 1
- 238000003475 lamination Methods 0.000 description 1
- 238000003754 machining Methods 0.000 description 1
- 230000003287 optical effect Effects 0.000 description 1
- 239000006132 parent glass Substances 0.000 description 1
- 230000002093 peripheral effect Effects 0.000 description 1
- 238000012797 qualification Methods 0.000 description 1
- 238000005245 sintering Methods 0.000 description 1
- 238000002791 soaking Methods 0.000 description 1
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Classifications
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/77—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
- H01L21/78—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/76—Making of isolation regions between components
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/14—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation
- H01L27/144—Devices controlled by radiation
- H01L27/146—Imager structures
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- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- Power Engineering (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Manufacturing & Machinery (AREA)
- Electromagnetism (AREA)
- Dicing (AREA)
- Processing Of Stones Or Stones Resemblance Materials (AREA)
- Solid State Image Pick-Up Elements (AREA)
Abstract
The invention relates to a disjunction method of a wafer laminated body for image detectors. Specifically, the invention discloses a disjunction method of a wafer laminated body w for an image detector. The wafer laminated body w for the image detector is formed by bonding a glass wafer 1 and a silicon wafer through a resin layer 4 configured in a way to surround each photodiode formation area 3. A marking wheel 10 is pressed along a preset disjunction line on the glass wafer and meanwhile rotated. A marking line S formed by a crack penetrating towards the thickness direction is formed. Then a breaking rod is adopted for pressing along a marking line on the lower side edge of the silicon wafer. The wafer laminated body is bent and the glass wafer is disjunct. The silicon wafer is further separated. The technical scheme provided by the utility model can achieve effective and perfect disjunction in a simple dry way without using a cutting saw.
Description
Technical field
The invention relates to a kind of wafer-level packaging (wafer level package for being formed with CMOS image sensor to patterning; WLP) wafer laminate carries out the method for dividing of singualtion.
Background technology
In recent years, in the various miniature electric field of machines such as attention low electric power, high function, highly integrated mobile phone, digital camera, optical mice, the use of CMOS image sensor increases rapidly.
Fig. 5 is the profile of the configuration example of wafer-level packaging (unit article of the chip size) W1 diagrammatically representing CMOS image sensor.Wafer-level packaging W1, the lamination had (through singualtion) glass wafer 1 and (through singualtion) Silicon Wafer 2 engage in the mode clipping resin next door 4 constructs.
On Silicon Wafer 2, (side, composition surface) is formed with photodiode (photodiode) forming region (sensing region) 3, and configure in the mode that resin next door 4 surrounds around it in lattice shape, make the inner space being provided with photodiode forming region 3 become airtight conditions whereby.Further, on (outside of photodiode forming region 3) Silicon Wafer 2, be formed with metal gasket 5, be formed with the through hole (through hole) 6 of up/down perforation Silicon Wafer 2 in the adjacent underneath of the part being formed with this metal gasket 5.Fill the good conduction material 7 of electrical conductivity at through hole 6, and be formed with welding projection (bump) 8 in through hole 6 lower end.So, through hole 6 and filled conductive material 7 will be formed and be called straight-through silicon wafer perforation (Through Silicon Via with the formation of carrying out being electrically connected; TSV).
In addition, below above-mentioned welding projection 8, engaging patterning has (omitting diagram) such as the PCB substrate of set electric circuit.
The unit article of chip size and wafer-level packaging W1, as shown in FIG. 6 and 7, on the wafer laminate the W large-area glass wafer 1 becoming parent and large-area Silicon Wafer 2 engaged by resin next door 4, to distinguish in lattice shape and patterning is formed multiple by the disjunction preset lines L extended in X-Y direction, and by along this wafer laminate of this disjunction preset lines L disjunction W, and become the wafer-level packaging W1 of (through singualtion) chip size.
In addition, become in the processing of the goods of wafer-level packaging at disjunction Silicon Wafer, comprise the processing of the goods of CMOS image sensor, existing known be use as patent documentation 1 ~ patent documentation 4 disclose as cast-cutting saw (dicing saw).Cast-cutting saw, possesses the rotating blade carrying out High Rotation Speed, and is configured to spray the cutting fluid of cooling and the cutting swarf produced when cutting cleaning rotating blade while cut to rotating blade.
Patent documentation 1: Japanese Unexamined Patent Publication 5-090403 publication
Patent documentation 2: Japanese Unexamined Patent Publication 6-244279 publication
Patent documentation 3: Japanese Unexamined Patent Publication 2002-224929 publication
Patent documentation 4: Japanese Unexamined Patent Publication 2003-051464 publication
Above-mentioned cast-cutting saw, owing to being by using the cutting of rotating blade to carry out disjunction, therefore cutting swarf produces in large quantities, even if such as utilized cutting fluid to clean, but the part also having cutting fluid remains or because of dispersing and make cutting swarf be attached to the situations such as package surface when cutting, and become the larger reason that quality or qualification rate reduce.In addition, owing to must have for the supply of cutting fluid or the mechanism of devil liquor recovery or pipe arrangement, unit scale is therefore made to become large.In addition, owing to being by cutting disjunction glass wafer, the situation therefore producing little chip (shortcoming) in cutting face is quite a lot of, and cannot obtain and more perfectly divide section.In addition, because the sword front end of carrying out the rotating blade of High Rotation Speed is formed with zigzag, therefore the abrasion of sword front end or damaged easily generation and useful life shorter.Further, due to the thickness of rotating blade to consider from intensity aspect cannot be set as quite thin, even and path also forms the thickness of more than 60 μm, therefore have cutting width and be not only necessary and also become the first-class problem points of the factor of effective utilization of limiting material.
Summary of the invention
One is the object of the present invention is to provide not use cast-cutting saw, and with the simple gimmick tool of dry type in a effective manner and more ideally carry out the image sensor wafer of disjunction, the method for dividing of encapsulation.
In order to reach above-mentioned purpose, propose in the present invention as following technical means.That is, method for dividing of the present invention, it is the method for dividing of the wafer laminate of image sensor, the wafer laminate of this image sensor, have glass wafer, be formed with the Silicon Wafer of multiple photodiode forming region with pattern in length and breadth, by the structure of resin bed laminating configured in the mode of surrounding respectively this photodiode forming region; This method for dividing, makes circumferentially crest line have the scribe wheel of sword front end, carries out pressing and rotates, form the score line be made up of the crackle soaked into toward thickness direction whereby along the disjunction preset lines above this glass wafer; Then, press with brisement bar along this score line by the following side from this Silicon Wafer, make this wafer laminate bend and the crackle of glass wafer be soaked into further thus disjunction glass wafer, and also disjunction Silicon Wafer.
The object of the invention to solve the technical problems also can be applied to the following technical measures to achieve further.
The method for dividing of the wafer laminate of aforesaid image sensor, wherein below this Silicon Wafer, in the position at the back side becoming this disjunction preset lines position above this glass wafer, presses with brisement bar after being pre-formed grooving.
The method for dividing of the wafer laminate of aforesaid image sensor, is wherein formed with TSV at this wafer laminate, when processing the step of through hole of this TSV, also forms this grooving.
By technique scheme, the present invention at least has following advantages:
According to the present invention, due to when carrying out disjunction with brisement bar, the crackle of glass wafer soaks into and disjunction toward thickness direction, therefore without the need to such as needing cutting width as the existing known situation utilizing cast-cutting saw to carry out cutting, and effectively can utilize material, and can the generations such as chip be suppressed, and can with more perfect section disjunction.In addition, owing to not producing cutting swarf, therefore, it is possible to do not produce the quality badness or defective products that the attachment because of cutting swarf causes.
Especially in the present invention, as existing known cast-cutting saw, do not use cutting fluid, but disjunction is carried out under dry environment, therefore have and can omit for the supply of cutting fluid or the mechanism of devil liquor recovery or pipe arrangement, and also can omit cleaning or drying steps and can the exquisitenessization ground effect of constituent apparatus after cut-out.
In above-mentioned method for dividing, also can below this Silicon Wafer, in the position at the back side becoming this disjunction preset lines position above this glass wafer, press with brisement bar after being pre-formed grooving.
Whereby, when utilizing this brisement bar to carry out glass wafer disjunction, also can easily from this groove and more perfectly to divide section disjunction Silicon Wafer.
In addition, in the wafer laminate forming TSV, by time processing the step of through hole of this TSV, also form this grooving, and the procedure of processing of grooving can be simplified.
Above-mentioned explanation is only the general introduction of technical solution of the present invention, in order to technological means of the present invention can be better understood, and can be implemented according to the content of specification, and can become apparent to allow above and other object of the present invention, feature and advantage, below especially exemplified by preferred embodiment, and coordinate accompanying drawing, be described in detail as follows.
Accompanying drawing explanation
Fig. 1 is the graphic of the first stage representing method for dividing of the present invention.
Fig. 2 is the graphic of the second stage representing method for dividing of the present invention.
Fig. 3 is the graphic of other embodiments representing Fig. 2.
Fig. 4 (a) and Fig. 4 (b) are represent the scribe wheel that uses in the present invention and its holder part graphic.
Fig. 5 is the profile of an example of the wafer-level packaging representing CMOS image sensor.
Fig. 6 is the profile of the part representing the CMOS image sensor wafer laminate becoming mother metal.
Fig. 7 is the vertical view schematically of the CMOS image sensor wafer laminate representing Fig. 6.
[main element symbol description]
L: disjunction preset lines S: score line
W: wafer laminate W1: wafer-level packaging
1: glass wafer 2: Silicon Wafer
10: scribe wheel 10a: sword front end
14: brisement bar 15: groove
Embodiment
Below, according to the details of the method for dividing of the wafer laminate of graphic explanation image sensor of the present invention.
Fig. 1 represents that first stage, the i.e. expression of method for dividing of the present invention become a part of section of the wafer laminate W of the CMOS image sensor of processing object.The structure of wafer laminate W is the structure substantially the same with shown in above-mentioned Fig. 5 ~ Fig. 7.
That is, by become the large area (such as diameter is 8 inches) of parent glass wafer 1, be configured at the Silicon Wafer 2 of its following side, engaged by cancellate resin next door 4.
On Silicon Wafer 2, (side, composition surface) is provided with photodiode forming region (sensing region) 3.Be formed with photodiode array in photodiode forming region 3, play function using the sensitive surface as image sensor.And, near photodiode forming region 3, being formed with metal gasket 5, being formed with the adjacent underneath of part of this metal gasket 5, being formed with the through hole (through hole) 6 of up/down perforation Silicon Wafer 2.Fill electrical conductivity good conduction material 7 (TSV) at through hole 6, be formed with welding projection 8 in through hole 6 lower end.In addition, below above-mentioned welding projection 8, engaging patterning has (omitting diagram) such as the PCB substrate of set electric circuit.
This CMOS image sensor wafer laminate W, by the singualtion along the cancellate disjunction preset lines L disjunction extended in X-Y direction as shown in Figure 7, takes out the unit article of chip size and wafer-level packaging W1.
Then be described for disjunction processing sequence.When along disjunction preset lines L disjunction wafer laminate W, first, the score line using the scribe wheel 10 as shown in Fig. 4 (a) and Fig. 4 (b) to be made up of crackle (be full of cracks toward thickness direction soaks into) in the Surface Machining of glass wafer 1.
Scribe wheel 10, is formed with the material that the tool characteristics such as superhard alloy or sintering diamond are good, and is formed with sword front end 10a at circumference crest line (outer peripheral face).Specifically, use diameter to be 1 ~ 6mm, to be preferably 1.5 ~ 4mm though be preferably, and sword toe angle is 85 ~ 150 degree, is preferably 105 ~ 140 degree, suitably can select according to the thickness of processed glass wafer 1 or kind.
This scribe wheel 10, in being rotatably supported at holder 11, and is held in engraving head (omitting diagram) by elevating mechanism 12.Engraving head is formed in the mode of the top that can load the platen (omit diagram) of wafer laminate W in level along the direction movement of disjunction preset lines L.
And, as shown in Figure 1, carry out pressing on the surface of glass wafer 1 along disjunction preset lines by making scribe wheel 10 and rotate, and form the score line S be made up of crackle at glass wafer 1.This score line S, the crackle being preferably to soak into about the half to glass wafer 1 thickness is formed.In addition, score line S is the outside in the resin next door 4 being formed at wafer-level packaging W1.
Then, in the second stage shown in Fig. 2, reversion substrate (wafer laminate W), at the lateral surface (with side, composition surface opposing face) of glass wafer 1, the pair of right and left pedestal 13,13 that the mode being configured to clip score line S extends along its both sides, presses with rectangular brisement bar 14 from the exterior side (with composition surface opposing face) of Silicon Wafer 2 towards score line S.In this situation, also groove 15 can be processed with at the lateral surface relative to score line S (with composition surface opposing face) of Silicon Wafer 2 in advance along disjunction preset lines L.This groove 15, if such as to the Silicon Wafer 2 of wafer laminate W, during with groove processing technology processing through holes 6 such as RIE (Reactive-ionetching), utilize identical process technology to be formed, then can process efficiently simultaneously.
By the pressing of this brisement bar 14, glass wafer 1 and Silicon Wafer 2 are bent toward with pressing opposition side, direction, the score line S of glass wafer 1 that is crackle soak into and disjunction glass wafer 1 toward thickness universe, and Silicon Wafer 2 is also along groove 15 disjunction, whereby by the wafer-level packaging W1 through singualtion along the complete disjunction of disjunction preset lines L.
In this disjunction, glass wafer 1, that the crackle that the becomes score line S mode of soaking into toward thickness direction is broken, therefore, it is possible to suppress the generation as the existing known chip as situation utilizing cast-cutting saw to carry out cutting etc., can with more perfect section disjunction.In addition, owing to being also provided with groove 15 along disjunction preset lines L in advance at Silicon Wafer 2, therefore also disjunction can be carried out along groove 15 more perfectly to divide section to Silicon Wafer 2.
In addition, Silicon Wafer 2, in the situation (by grinding) of majority, its thickness is 25 μm ~ 100 μm, thin in the extreme, even if be not therefore provided with groove 15 as above, also can by the flexure utilizing the pressing of brisement bar 14 to produce, and with the disjunction of glass wafer 1 side by side and easily disjunction.Therefore, the step of processing groove 15 can also be omitted.
As above, carry out brisement utilizing brisement bar 14 and add man-hour, because the crackle of the score line S of glass wafer 1 soaks into and disjunction toward thickness direction, therefore, without the need to such as needing cutting width as the existing known situation utilizing cast-cutting saw to carry out cutting, and effectively can utilize material.In addition, owing to not producing cutting swarf, therefore, it is possible to do not produce the quality badness or defective products that the attachment because of cutting swarf causes.Especially in the present invention, not as used cutting fluid as existing known cast-cutting saw, but carrying out disjunction under dry environment, therefore can omit for the supply of cutting fluid or the mechanism of devil liquor recovery or pipe arrangement, can exquisitenessization ground constituent apparatus.
In the present invention, carry out brisement utilizing brisement bar 14 and add man-hour, also the pair of right and left pedestal 13,13 of bearing glass wafer 1 can be replaced, and as shown in Figure 3 as, be configured to by fender 16 connect with the face of glass wafer 1, this fender 16 is the thickness with the degree that the glass wafer 1 that can cave in bends.
Method for dividing of the present invention, can be used in the disjunction of the wafer laminate being fitted with glass wafer and Silicon Wafer.
The above, it is only preferred embodiment of the present invention, not any pro forma restriction is done to the present invention, although the present invention discloses as above with preferred embodiment, but and be not used to limit the present invention, any those skilled in the art, do not departing within the scope of technical solution of the present invention, make a little change when the technology contents of above-mentioned announcement can be utilized or be modified to the Equivalent embodiments of equivalent variations, in every case be the content not departing from technical solution of the present invention, according to technical spirit of the present invention to any simple modification made for any of the above embodiments, equivalent variations and modification, all still belong in the scope of technical solution of the present invention.
Claims (3)
1. the method for dividing of the wafer laminate of an image sensor, the wafer laminate of this image sensor, have glass wafer, be formed with the Silicon Wafer of multiple photodiode forming region with pattern in length and breadth, by the structure of resin bed laminating configured in the mode of surrounding respectively this photodiode forming region; It is characterized in that:
Make circumferentially crest line have the scribe wheel of sword front end, carry out pressing along the disjunction preset lines above this glass wafer and rotate, form the score line be made up of the crackle soaked into toward thickness direction whereby;
Then, press with brisement bar along this score line by the following side from this Silicon Wafer, make this wafer laminate bend and the crackle of glass wafer be soaked into further thus disjunction glass wafer, and also disjunction Silicon Wafer.
2. the method for dividing of the wafer laminate of image sensor according to claim 1, it is characterized in that: wherein below this Silicon Wafer, in the position at the back side becoming this disjunction preset lines position above this glass wafer, press with brisement bar after being pre-formed grooving.
3. the method for dividing of the wafer laminate of image sensor according to claim 2, it is characterized in that: be wherein formed with straight-through silicon wafer perforation TSV at this wafer laminate, when processing the step of through hole of this straight-through silicon wafer perforation TSV, also form this grooving.
Applications Claiming Priority (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2013-170863 | 2013-08-21 | ||
| JP2013170863A JP6140030B2 (en) | 2013-08-21 | 2013-08-21 | Method for dividing wafer laminate for image sensor |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| CN104425527A true CN104425527A (en) | 2015-03-18 |
| CN104425527B CN104425527B (en) | 2018-09-25 |
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| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201410345791.1A Active CN104425527B (en) | 2013-08-21 | 2014-07-18 | The method for dividing of the wafer laminate of Image Sensor |
Country Status (4)
| Country | Link |
|---|---|
| JP (1) | JP6140030B2 (en) |
| KR (1) | KR102176459B1 (en) |
| CN (1) | CN104425527B (en) |
| TW (1) | TWI615254B (en) |
Cited By (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN104843488A (en) * | 2015-04-10 | 2015-08-19 | 京东方科技集团股份有限公司 | Output device and cutting cracking system |
| CN105826180A (en) * | 2015-01-08 | 2016-08-03 | 三星钻石工业股份有限公司 | Method and device for breaking image sensor-used wafer laminated body |
| CN106079115A (en) * | 2015-04-30 | 2016-11-09 | 三星钻石工业股份有限公司 | The dividing method of adhesive substrates and segmenting device |
| WO2021138794A1 (en) * | 2020-01-07 | 2021-07-15 | Yangtze Memory Technologies Co., Ltd. | Methods for multi-wafer stacking and dicing |
Citations (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2002224929A (en) * | 2001-01-30 | 2002-08-13 | Takemoto Denki Seisakusho:Kk | Device for cutting plate-like workpiece |
| US20070155054A1 (en) * | 2005-12-30 | 2007-07-05 | Advanced Semiconductor Engineering, Inc. | Wafer-level chip package process |
| JP2010232378A (en) * | 2009-03-26 | 2010-10-14 | Oki Semiconductor Co Ltd | Method of producing semiconductor device |
| JP2013012552A (en) * | 2011-06-28 | 2013-01-17 | Sony Corp | Semiconductor device and semiconductor device manufacturing method |
| CN103165532A (en) * | 2011-12-12 | 2013-06-19 | 佳能株式会社 | Method of manufacturing semiconductor element |
Family Cites Families (9)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH0590403A (en) * | 1991-08-01 | 1993-04-09 | Disco Abrasive Syst Ltd | Cutting apparatus |
| JPH06244279A (en) | 1993-02-19 | 1994-09-02 | Fujitsu Miyagi Electron:Kk | Dicing saw |
| IL135794A (en) * | 2000-04-23 | 2004-07-25 | Coppergate Comm Ltd | Method and apparatus for transmission of voice and data over subscriber line |
| JP2003051464A (en) | 2001-08-03 | 2003-02-21 | Takemoto Denki Seisakusho:Kk | Inspection means for cutting in cutting apparatus for flat work to be machined |
| CN101218078B (en) * | 2005-07-06 | 2012-04-04 | 三星钻石工业股份有限公司 | Brittle material scribing wheel, method for manufacturing such brittle material scribing wheel, and scribing method, scribing apparatus and scribing tool using such brittle material scribing wheel |
| JP5067828B2 (en) * | 2006-03-10 | 2012-11-07 | Ａｇｃテクノグラス株式会社 | Glass substrate cutting method and optical glass |
| JP2009204780A (en) * | 2008-02-27 | 2009-09-10 | Mitsubishi Electric Corp | Liquid crystal panel and method of manufacturing the same |
| US8569086B2 (en) * | 2011-08-24 | 2013-10-29 | Taiwan Semiconductor Manufacturing Company, Ltd. | Semiconductor device and method of dicing semiconductor devices |
| JP2013089622A (en) * | 2011-10-13 | 2013-05-13 | Mitsuboshi Diamond Industrial Co Ltd | Breaking method of semiconductor substrate |
-
2013
- 2013-08-21 JP JP2013170863A patent/JP6140030B2/en not_active Expired - Fee Related
-
2014
- 2014-04-18 TW TW103114168A patent/TWI615254B/en active
- 2014-07-03 KR KR1020140082926A patent/KR102176459B1/en active IP Right Grant
- 2014-07-18 CN CN201410345791.1A patent/CN104425527B/en active Active
Patent Citations (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2002224929A (en) * | 2001-01-30 | 2002-08-13 | Takemoto Denki Seisakusho:Kk | Device for cutting plate-like workpiece |
| US20070155054A1 (en) * | 2005-12-30 | 2007-07-05 | Advanced Semiconductor Engineering, Inc. | Wafer-level chip package process |
| JP2010232378A (en) * | 2009-03-26 | 2010-10-14 | Oki Semiconductor Co Ltd | Method of producing semiconductor device |
| JP2013012552A (en) * | 2011-06-28 | 2013-01-17 | Sony Corp | Semiconductor device and semiconductor device manufacturing method |
| CN103165532A (en) * | 2011-12-12 | 2013-06-19 | 佳能株式会社 | Method of manufacturing semiconductor element |
Cited By (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN105826180A (en) * | 2015-01-08 | 2016-08-03 | 三星钻石工业股份有限公司 | Method and device for breaking image sensor-used wafer laminated body |
| CN104843488A (en) * | 2015-04-10 | 2015-08-19 | 京东方科技集团股份有限公司 | Output device and cutting cracking system |
| CN106079115A (en) * | 2015-04-30 | 2016-11-09 | 三星钻石工业股份有限公司 | The dividing method of adhesive substrates and segmenting device |
| WO2021138794A1 (en) * | 2020-01-07 | 2021-07-15 | Yangtze Memory Technologies Co., Ltd. | Methods for multi-wafer stacking and dicing |
| US11710717B2 (en) | 2020-01-07 | 2023-07-25 | Yangtze Memory Technologies Co., Ltd. | Methods for multi-wafer stacking and dicing |
Also Published As
| Publication number | Publication date |
|---|---|
| TWI615254B (en) | 2018-02-21 |
| JP2015041652A (en) | 2015-03-02 |
| TW201507834A (en) | 2015-03-01 |
| JP6140030B2 (en) | 2017-05-31 |
| CN104425527B (en) | 2018-09-25 |
| KR102176459B1 (en) | 2020-11-09 |
| KR20150021878A (en) | 2015-03-03 |
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