JP2013012552A - Semiconductor device and semiconductor device manufacturing method - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a semiconductor device packaged by bonding of a cover member to on a semiconductor element, which inhibits occurrence of cracks in the semiconductor element to improve yield.SOLUTION: A semiconductor device 1 in which a cover member 4 is bonded to on a semiconductor element 2 via a ring-shaped seal member 3, comprises a seal member 3 formed in a shape such that an inner periphery varies in a stepwise fashion from the semiconductor element 2 toward the cover member 4. When an external force pressing the semiconductor device from the semiconductor element 1 side to the cover member side is applied, by forming the internal periphery so as to vary in a stepwise fashion in a vertical direction with respect to a surface of the semiconductor element 1, stress applied to the semiconductor element 1 is relaxed.

Description

  The present disclosure relates to a semiconductor device, and more particularly, to a semiconductor device packaged for each element. The present invention also relates to a method for manufacturing the semiconductor device.

  Conventionally, when a solid-state imaging device such as a CMOS image sensor is made into a CSP (Chip Size Package), a seal resin is formed in a ring shape on the outer periphery of the chip on the surface side of the solid-state imaging device, and a glass substrate is placed thereon. As a result, the light incident surface side of the solid-state imaging device is sealed in a cavity structure that is hermetically sealed by the glass substrate and the sealing resin.

  By the way, in a solid-state imaging device, after a glass substrate is bonded, a TSV (Through Silicon Via) penetrating to the pad portion of the wiring layer is formed on the back side of the solid-state imaging device, and the wiring of the solid-state imaging device is electrically connected through the TSV Solder balls connected to are formed. In order to facilitate the formation of this TSV, the thickness of the semiconductor substrate of the solid-state imaging device is generally reduced to 100 μm or less.

  Thus, since the thickness of the semiconductor substrate of the packaged solid-state image sensor is reduced to about 100 μm, the strength of the solid-state image sensor itself is lowered. Then, after applying CSP, when a force is applied from the back side of the solid-state imaging device, such as when a probe pin is inserted into a solder ball and electrical measurement is performed, there is a problem that a crack occurs along the edge of the sealing resin. . Such cracks can occur not only during electrical measurement, but also when an external force is applied from the back side of the solid-state imaging device, such as during dicing or back grinding (BGR).

  In order to avoid the occurrence of cracks in the semiconductor substrate after CSP conversion, the invention described in Patent Document 1 proposes that only the semiconductor substrate immediately below the sealing resin be thinned. In the invention described in Patent Document 2, a proposal has been made that a glass substrate is brought into contact with an on-chip lens on the surface of a solid-state imaging device.

JP 2009-158863 A JP 2009-295739 A

  However, when a step is provided on the back side of the semiconductor substrate, it is difficult to form a wiring pattern on the wall surface of the step portion, and the film thickness of the protective film or the like formed on the wiring pattern is different at the step portion. There is a problem that the film thickness changes suddenly and the film thickness becomes unstable. This can cause quality degradation.

  Further, in the configuration in which the glass substrate is brought into contact with the on-chip lens of the solid-state imaging device, the surface of the on-chip lens may be deformed. Even if the shape of the on-chip lens changes minutely, the light collecting ability changes, so it must be handled very delicately. Therefore, when the on-chip lens is brought into contact with the glass substrate, there is a possibility that the sensor capability of the solid-state image sensor is reduced.

  In view of the above points, the present disclosure suppresses generation of cracks in a semiconductor element and improves yield in a semiconductor device packaged by bonding a cover member on the semiconductor element.

  The semiconductor device according to the present disclosure includes a semiconductor element, a cover member, and a seal member. The semiconductor element includes a desired wiring circuit on a semiconductor substrate and has solder balls on one surface. The cover member is formed on the other surface side of the semiconductor element. The seal member is formed in a ring shape at the periphery of the element formation region of the semiconductor element, and holds the other surface of the semiconductor element in an airtight manner with the cover member. The sealing member is formed such that the shape of the inner peripheral surface changes stepwise or continuously in the vertical direction and / or the horizontal direction with respect to the other surface of the semiconductor element.

  In the semiconductor device of the present disclosure, the shape of the inner peripheral surface of the seal member is formed so as to change stepwise or continuously in the vertical direction and / or the horizontal direction with respect to the other surface of the semiconductor element. For this reason, when an external force is applied to the cover member side from one surface of the semiconductor element, the stress generated in the semiconductor element is relieved by the sealing member formed so as to change stepwise or continuously.

  The manufacturing method of the semiconductor device of this indication has the process of preparing the semiconductor element which has a desired wiring circuit on a semiconductor substrate, and the cover member bonded on one side of a semiconductor element. In addition, there is a step of forming a ring-shaped seal member in a region corresponding to the periphery of the element formation region of the semiconductor element on the bonding surface of the semiconductor element or the cover member. The seal member is formed such that the shape of the inner peripheral surface thereof changes stepwise or continuously in the vertical direction and / or the horizontal direction with respect to one surface of the semiconductor element. Moreover, it has the process of bonding a semiconductor element and a cover member through a sealing member. In addition, a solder ball connected to the wiring circuit is formed on the other surface of the semiconductor element.

  In the method of manufacturing a semiconductor device according to the present disclosure, the shape of the inner peripheral surface of the seal member is formed so as to change stepwise or continuously in the vertical direction and / or the horizontal direction with respect to one surface of the semiconductor element. To do. For this reason, when an external force is applied to the cover member side from one surface of the semiconductor element, the stress generated in the semiconductor element is relieved by the sealing member formed so as to change stepwise or continuously.

  According to the present disclosure, even when an external force is applied to the semiconductor device, the generation of cracks in the semiconductor element is suppressed, and the yield is improved.

1 is a diagram illustrating a cross-sectional configuration of a semiconductor device according to a first embodiment of the present disclosure. A, B, and C are process diagrams (part 1) illustrating a method for manufacturing a semiconductor device according to the first embodiment of the present disclosure. FIG. 4D is a process diagram (part 2) illustrating the method for manufacturing the semiconductor device according to the first embodiment of the present disclosure; F and G are process diagrams (part 3) illustrating the method for manufacturing the semiconductor device according to the first embodiment of the present disclosure. H and I are process diagrams (part 4) illustrating the method for manufacturing the semiconductor device according to the first embodiment of the present disclosure. A and B are a cross-sectional configuration diagram of a conventional semiconductor device and a plan configuration diagram of a seal member in the conventional semiconductor device. It is a schematic block diagram in the case of performing an electrical measurement in the conventional semiconductor device. FIG. 3 is a schematic configuration diagram when electrical measurement is performed in the semiconductor device according to the first embodiment of the present disclosure. It is a figure showing the section composition of the semiconductor device concerning a 2nd embodiment of this indication. A and B are process diagrams illustrating a method for manufacturing a semiconductor device according to a second embodiment of the present disclosure. A, B, C, D It is a figure which shows the planar structure of the sealing member of the semiconductor device which concerns on 3rd Embodiment of this indication.

Hereinafter, an example of a semiconductor device and a method for manufacturing the semiconductor device according to an embodiment of the present disclosure will be described with reference to FIGS. Embodiments of the present disclosure will be described in the following order. Note that the present disclosure is not limited to the following examples.
1. 1. First embodiment: Example in which cross-sectional shape of sealing member is stepped 1-1 Configuration of semiconductor device 1-2 Manufacturing method of semiconductor device 1-3 Comparative example 2. Second embodiment: an example in which the cross-sectional shape of the seal member is tapered. Third embodiment: an example in which the shape of the seal member in the in-plane direction is uneven.

<1. First Embodiment: Semiconductor Device>
[1-1 Configuration of Semiconductor Device]
First, the semiconductor device according to the first embodiment of the present disclosure will be described. In this embodiment, an example will be described in which a solid-state imaging device is packaged as a semiconductor device.
FIG. 1 is a diagram showing a cross-sectional configuration of a semiconductor device 1 according to this embodiment. As shown in FIG. 1, the semiconductor device 1 according to this embodiment includes a solid-state imaging device 2, a cover member 4, and a seal member 3.

  The solid-state imaging device 2 has a solder ball 5 formed on one surface, and the other surface opposite to the surface on which the solder ball 5 is formed is an imaging surface (light incident surface). In the solid-state imaging device 2, a plurality of pixels including photoelectric conversion units are formed, and signal charges corresponding to the amount of light incident on the imaging surface are generated and output as pixel signals. The solder ball 5 is connected to the wiring pad portion 9 (see FIG. 5I) of the wiring layer 8, and is used for a die sort test and electrical connection to other electronic devices.

  The cover member 4 is provided on the imaging surface side of the solid-state imaging device 2 and is provided so as to cover the imaging surface from the imaging surface via a predetermined space 17. As the cover member 4, a light-transmitting substrate can be used, and for example, borosilicate glass, quartz glass, non-alkali glass, heat-resistant glass, acrylic resin, or the like can be used.

  The seal member 3 adheres the solid-state image sensor 2 and the cover member 4 and is provided in a ring shape (rectangular shape in the present embodiment) so as to surround the element formation region on the imaging surface of the solid-state image sensor 2. It has been. Here, the element formation region indicates a region including pixels and peripheral circuits formed for each chip. The height of the cross section of the seal member 3 in the direction perpendicular to the imaging surface is set to a height corresponding to the necessary distance between the imaging surface and the cover member 4. It is airtightly held in a space 17 surrounded by the cover member 4 and the seal member 3.

  In addition, the shape of the inner peripheral surface on the side facing the imaging surface of the seal member 3 formed in a ring shape is formed so as to form a two-stepped shape in a direction perpendicular to the imaging surface, and the width of the cross section thereof is Further, it is formed so as to become smaller from the imaging surface side toward the cover member 4 side. That is, the seal member 3 is laminated on the first member 14 formed on the imaging surface side and the second member formed on the upper portion of the first member 14 and having a width smaller than the width of the cross section of the first member 14. 15 is a two-layer structure.

  As a material constituting the seal member 3, for example, a photosensitive resin such as a thermosetting resin or an ultraviolet curable resin can be used, and an epoxy resin, an acrylic resin, a silicone resin, a siloxy acid resin s, a cyano resin can be used. An ester resin or the like can be used.

[1-2 Semiconductor Device Manufacturing Method]
Next, a method for manufacturing the semiconductor device 1 according to this embodiment will be described. 2 to 5 are process diagrams showing a method for manufacturing the semiconductor device 1 according to this embodiment.

  First, the solid-state imaging device 2 is formed by forming a plurality of pixels on the wafer-like silicon substrate 7. That is, as shown in FIG. 2A, a photodiode PD that constitutes a photoelectric conversion unit for each element formation region on the silicon substrate 7 and a pixel transistor (not shown) for reading signal charges generated by the photodiode PD. ) Etc. Furthermore, wiring 10 laminated in a plurality of layers (three layers in FIG. 2A) via interlayer insulating film 6 and wiring pad portion 9 connected to solder ball 5 in a later step are formed on silicon substrate 7. A wiring layer 8 is formed. The wiring 10 and the wiring pad portion 9 formed in the wiring layer 8 constitute a wiring circuit that drives each pixel.

  After the formation of the wiring layer 8, the color filter layer 11 and the on-chip lens 12 are formed in order. The manufacturing method of the solid-state imaging device 2 is the same process as the manufacturing method of a general solid-state imaging device, and can take various forms. The surface on which the on-chip lens 12 is formed is the imaging surface, which is the light incident surface side of the semiconductor device 1, that is, the cover member 4 side.

  Next, as shown in FIG. 2B, a photosensitive resin layer 14a to be the first member 14 of the seal member 3 is formed on the entire imaging surface. In the present embodiment, an example in which a negative resin layer in which an exposed portion is cured is formed. Then, a mask 13 having an opening only at a portion where the first member 14 is formed is formed on the photosensitive resin layer 14 a, and exposure is performed through the mask 13.

  Next, as shown in FIG. 2C, development is performed. Thereby, only the portion exposed by the mask 13 remains, and the first member 14 is formed in a region surrounding each element formation region on the imaging surface. Here, since the solid-state imaging device 2 is formed in a wafer shape, the first member 14 is formed so as to partition a portion to be each chip.

  Next, as illustrated in FIG. 3D, a negative photosensitive resin layer 15 a to be the second member 15 is formed on the entire imaging surface so as to cover the first member 14. In this case, a resin layer necessary for the height of the second member 15 is formed. Then, a mask 16 having an opening only in a portion where the second member 15 is formed is formed on the photosensitive resin layer 15 a, and exposure is performed through the mask 16.

  Next, by developing, the 2nd member 15 laminated | stacked on the 1st member 14 upper part is formed as shown to FIG. 3E. As described above, the ring-shaped seal member 3 is formed on the periphery of each element formation region on the imaging surface of the solid-state imaging element 2.

  Next, as illustrated in FIG. 4F, the cover member 4 is bonded to the imaging surface of the wafer-like solid-state imaging device 2 via the seal member 3. Thereby, the space 17 surrounded by the imaging surface, the seal member 3 and the cover member 4 is kept airtight.

  Next, as shown in FIG. 4G, the silicon substrate 7 of the solid-state imaging device 2 is thinned from the back surface side by back grinding. Here, in order to facilitate the next TSV processing, for example, the thickness of the silicon substrate 7 is reduced to 75 μm to 100 μm.

  Next, as shown in FIG. 5H, a through-hole (TSV) 28 penetrating the silicon substrate 7 is formed by opening the wiring pad portion 9 formed in the wiring layer 8 from the back surface side of the silicon substrate 7 so as to be exposed. Form. In the previous step, since the silicon substrate 7 is thinned to 100 μm or less, the TSV processing facilitates the formation of the through holes 28 in the silicon substrate 7.

  Next, as shown in FIG. 5I, an insulating film 18 that covers the side surfaces of the through holes 28 and the back surface side of the silicon substrate 7 is formed. Next, an electrode layer 19 that is connected to the wiring pad portion 9 and projects to the back side of the silicon substrate 7 is formed. Then, the solder balls 5 are formed on the upper part of the electrode layer 19 projecting on the back side of the silicon substrate 7. Thereafter, the insulating layer 20 is formed so as to fill the through hole 28 and cover the back side of the silicon substrate 7.

  The wafer-like semiconductor device 1 formed in this way is separated for each chip along a dicing line (not shown). Thereby, the semiconductor device 1 shown in FIG. 1 packaged for each solid-state imaging device 2 is completed.

[1-3 Comparative Example]
FIG. 6A shows a cross-sectional configuration of a conventional semiconductor device 23 as a comparative example, and FIG. 6B shows a planar configuration of a seal member 22 in the conventional semiconductor device 23. FIG. 7 shows a schematic configuration when electrical measurement is performed in the conventional semiconductor device 23. In FIG. 6, parts corresponding to those in FIG.

  In the conventional semiconductor device 23, as shown in FIG. 6A, the seal member 22 has a single-stage configuration, and the cross-sectional shape thereof is substantially rectangular. Further, as shown in FIG. 6B, the conventional seal member 22 is formed on the peripheral edge surrounding the element formation region of the imaging surface, and the inner peripheral surface thereof is formed in a substantially rectangular shape. In the conventional semiconductor device 23, when electrical measurement (die sort test) for product quality determination is performed, probe pins are attached to the solder balls 5 formed on the back surface side of the solid-state imaging device 2 as shown in FIG. 21 is set up.

  As described above, when the probe pin 21 is raised from the back surface side of the solid-state image sensor 2, the solid-state image sensor 2 is pressed toward the cover member 4. Then, since there is a space 17 between the cover member 4 and the imaging surface of the solid-state imaging device 2, the central portion is more easily displaced toward the cover member 4 than the periphery of the solid-state imaging device 2, and the imaging surface of the seal member 3 Stress concentrates on the side edge. For this reason, as shown in FIG. 7, a crack 24 occurs in the solid-state imaging device 2 along the edge portion of the seal member 3. In particular, as shown in FIG. 5H, when the silicon substrate 7 is thinned to 100 μm or less for forming the through hole 28, the silicon substrate 7 is weakened, so that the crack 24 is likely to occur. Product yield will be reduced.

  FIG. 8 shows a schematic configuration when the probe pin 21 is erected on the solder ball 5 in the semiconductor device of this embodiment. In this embodiment, in the semiconductor device 1, the inner peripheral surface side facing the imaging surface of the seal member 3 is formed so as to form a two-stepped shape in the direction perpendicular to the imaging surface, and a solid-state imaging device The cross section of the first member 14 on the second side is formed wider than the cross section of the second member 15. For this reason, when the solid-state imaging device 2 is pressed toward the cover member 4, the place where the stress is strongly applied is the edge portion on the imaging surface side of the first member 14 and the edge portion on the imaging surface side of the second member 15. To disperse. As a result, when the solid-state imaging device 2 is pressed toward the cover member 4, the stress is not concentrated in a narrow range, and the occurrence of cracks in the solid-state imaging device 2 can be suppressed. Thereby, the yield is improved.

  By the way, in the manufacturing method of the semiconductor device 1 of the present embodiment example, after the solid-state imaging element 2 and the cover member 4 are bonded together via the seal member 3, the silicon substrate 7 is subjected to gliding processing, TSV processing, dicing processing, and the like. Done. In these steps, a force is generated from the back surface side of the solid-state imaging device 2 toward the cover member 4 side. In the present embodiment example, the inner peripheral surface side facing the imaging surface of the seal member 3 is formed so as to form a two-step staircase in a direction perpendicular to the imaging surface, and thus occurs in these manufacturing processes. Stress can also be relieved by the two-stage seal member 3. Thereby, generation | occurrence | production of the crack of the solid-state image sensor 2 in a manufacturing process can also be suppressed.

  In this embodiment, the negative-type photosensitive resin layer is used to form the sealing member 3 having a stepped cross section. However, the positive-type photosensitive resin layer is used to perform exposure twice. The sealing member 3 having a stepped cross section may be formed. In this case, the number of manufacturing steps of the seal member 3 can be reduced.

  Further, the materials used for the first member 14 and the second member 15 may be different. For example, by forming the first member 14 with an adhesive material harder than the material of the second member 15, when an external force is applied from the back surface side of the solid-state imaging device 2, the silicon substrate 7 is more fixed, so that at the time of dicing It will be advantageous. On the other hand, by forming the second member 15 with an adhesive material harder than the material of the first member 14, it is possible to further relax the stress with respect to the bending of the silicon substrate 7.

  The hardness of the material used for the first member 14 and the second member 15 can be set by changing the amount of silicone resin added to the adhesive material made of epoxy resin or acrylic resin, for example, and can be changed as appropriate. It is.

<2. Second Embodiment: Example in which Cross-sectional Shape of Seal Member is Tapered>
Next, a semiconductor device according to the second embodiment of the present disclosure will be described. FIG. 9 is a diagram showing a cross-sectional configuration of the semiconductor device 26 of the present embodiment example. In FIG. 9, parts corresponding to those in FIG.

  In the present embodiment, the shape of the inner peripheral surface of the seal member 25 is a tapered shape that continuously decreases from the imaging surface side to the cover member 4 side. At this time, the taper surface of the seal member 25 is formed on the inner peripheral surface of the seal member 25 facing the imaging surface, and the taper angle is set to about 45 degrees.

  Also in the semiconductor device 26 according to the present embodiment, when an external force is applied from the back surface side of the solid-state image sensor 2 toward the cover member 4 side, stress is generated such that the solid-state image sensor 2 is bent toward the cover member 4 side. However, in the present embodiment, since the seal member 25 is formed in a taper shape, a rapid change in the stress generated on the solid-state image sensor 2 side within the surface where the seal member 25 and the solid-state image sensor 2 abut. Is alleviated. As a result, the stress generated in the solid-state image sensor 2 is not concentrated in a narrow range, and the occurrence of cracks in the solid-state image sensor 2 can be suppressed.

  The taper angle when the seal member 25 is formed in a taper shape is an angle that can relieve stress generated when the solid-state image sensor 2 is pressed from the back surface side to the cover member 4 side, and the solid-state image sensor 2 captures an image. Any angle may be used as long as the cover member 4 can be kept airtight on the surface side. In this embodiment, the taper angle of the seal member 25 is 45 degrees. However, if the angle is 45 degrees or less, the stress can be sufficiently relaxed.

10A and 10B are diagrams illustrating a process of forming the seal member 25 in the semiconductor device 26 according to the present embodiment.
When forming the taper-shaped sealing member 25, after forming the solid-state imaging device 2 in the same manner as in FIG. 2A, as shown in FIG. 10A, for example, a positive photosensitive resin layer 25a is formed on the on-chip lens 12. Form. Thereafter, a mask 27 is formed on the photosensitive resin layer 25 a so as to expose portions other than the portion where the seal member 25 is formed, and under exposure is performed through the mask 27.

  Next, by developing, as shown in FIG. 10B, it is possible to form a sealing member 25 having a taper shape in which the cross-sectional width continuously increases from the upper surface to the imaging surface side.

<3. Third Embodiment: Example in which planar shape of sealing member is uneven on inner peripheral surface side>
Next, a semiconductor device according to the third embodiment of the present disclosure will be described. FIG. 11A is a diagram illustrating a planar configuration of the seal member 30 of the semiconductor device according to the present embodiment, and is a diagram illustrating a shape in a plane parallel to the imaging surface. In the present embodiment example, the planar shape of the seal member 30 is an example different from that of the first embodiment. Therefore, only the seal member 30 is illustrated, and other illustrations are omitted.

  In the semiconductor device according to this embodiment, the inner peripheral surface side of the seal member 30 formed in a ring shape is formed to have an uneven shape that draws a sinusoidal curve in a direction horizontal to the imaging surface. Although not shown, in the semiconductor device of this embodiment, the cross-sectional configuration of the seal member 30 is formed to be rectangular like the conventional semiconductor device 23 shown in FIG. 6A.

  In the semiconductor device of the present embodiment, when an external force is applied from the back surface side of the solid-state image sensor to the cover member side, the stress applied to the solid-state image sensor is generated along the uneven edge portion of the seal member 30. Then, since the inner peripheral surface of the seal member 30 has an uneven shape in the present embodiment example, a portion where stress is generated is dispersed in a region corresponding to the amplitude of the uneven shape in the solid-state imaging device. That is, the stress is dispersed in the region of width a shown in FIG. 11A.

  As shown in FIG. 6B, in the conventional semiconductor device 23, the inner peripheral surface of the seal member 22 on the side facing the imaging surface is formed in a straight line in a direction horizontal to the imaging surface. Concentrate on a straight line along the edge of the. As a result, as shown in FIG. 7, there is a possibility that a crack may occur on the solid-state imaging device 2 side.

  In the present embodiment, since the stress is dispersed in the region corresponding to the amplitude of the concavo-convex shape by forming the inner peripheral surface of the seal member 3 in the concavo-convex shape, a sudden change in stress on the solid-state imaging device side is alleviated. The generation of cracks is suppressed.

  11B to 11D show a planar configuration of a seal member according to a modification. FIG. 11B is an example in which the inner peripheral surface side of the seal member 31 formed in a ring shape is formed to have a rectangular uneven shape in a direction horizontal to the imaging surface. Further, FIG. 11C is an example in which the inner peripheral surface side of the seal member 32 formed in a ring shape is formed in a concavo-convex shape in which the apex forms an obtuse or acute triangle in the horizontal direction with respect to the imaging surface. FIG. 11D is an example in which the inner peripheral surface side of the seal member 33 formed in a ring shape is formed in an uneven shape that forms a trapezoid in a direction horizontal to the imaging surface.

  11B to 11D, as in FIG. 11A, when an external force is applied from the back surface side of the solid-state imaging device to the cover member side, the stress is dispersed in a region corresponding to the amplitude of the concavo-convex shape. The sudden stress change on the element side is alleviated. Thereby, even when an external force is applied from the back surface side of the solid-state imaging device to the cover member side, it is possible to suppress the occurrence of cracks in the solid-state imaging device.

  The seal member shown in FIGS. 11A to 11D can be formed by exposing the negative type photosensitive resin layer in the step shown in FIG. 2B by forming the opening of the mask into the shape shown in FIGS. 11A to 11D. . In this embodiment, the seal member has a rectangular cross section in the direction perpendicular to the imaging surface. However, as in the first embodiment and the second embodiment, the seal member is stepped or tapered. Various combinations are possible.

  In the semiconductor devices according to the first to third embodiments described above, the seal member is formed on the solid-state imaging device side. However, the present invention is not limited to this, and the seal member may be formed on the cover member side. . In the case where the seal member is formed on the cover member side, there is no possibility of smearing the imaging surface of the solid-state imaging device, and the accuracy of the imaging surface can be maintained.

  In the first to third embodiments described above, the example in which the cover member is bonded to the solid-state imaging element via the seal member is shown as the semiconductor device, but the present invention is not limited to this. For example, when the cover member is bonded to a semiconductor element such as MEMS (Micro Electro Mechanical Systems), the same effect can be obtained by applying the seal member of the present disclosure.

In addition, this indication can take the following structures.
(1)
A semiconductor element having a desired wiring circuit on a semiconductor substrate and having solder balls on one surface;
A cover member formed on the other surface side of the semiconductor element;
A seal member formed in a ring shape at the periphery of an element formation region of the semiconductor element and holding the other surface of the semiconductor element in an airtight manner with the cover member, the inner peripheral surface having a shape of the semiconductor element A sealing member formed so as to change stepwise or continuously in a vertical direction and / or a horizontal direction with respect to the other surface of
Semiconductor device (2) comprising
The width of the sealing member in the direction perpendicular to the other surface of the semiconductor element is formed so as to decrease stepwise or continuously from the semiconductor element side toward the cover member side. The semiconductor device described.
(3)
The seal member is formed such that a width in a direction perpendicular to the other surface of the semiconductor element is gradually reduced from the semiconductor element side toward the cover member side,
The semiconductor device according to (2), wherein the seal member is formed of a material having a different hardness for each stage.
(4)
The shape of the inner peripheral surface of the seal member is formed so as to form an uneven shape in a horizontal direction with respect to the other surface of the semiconductor element.
(5)
The semiconductor device according to (2), wherein an inner peripheral surface of the seal member is tapered.
(6)
Preparing a semiconductor element having a desired wiring circuit on a semiconductor substrate, and a cover member to be bonded onto one surface of the semiconductor element;
In the bonding surface of the semiconductor element or the cover member, the shape of the inner peripheral surface in a region corresponding to the peripheral edge of the element formation region of the semiconductor element is perpendicular to one surface of the semiconductor element, or And / or a step of forming a ring-shaped sealing member formed so as to change stepwise or continuously in the horizontal direction;
Bonding the semiconductor element and the cover member through the seal member;
Forming a solder ball connected to the wiring circuit on the other surface of the semiconductor element;
A method for manufacturing a semiconductor device comprising:
(7)
The width of the seal member in the direction perpendicular to the one surface of the semiconductor element is formed so as to decrease stepwise or continuously from the semiconductor element side toward the cover member side. Semiconductor device manufacturing method.
(8)
A width of the seal member in a direction perpendicular to one surface of the semiconductor element is formed so as to gradually decrease from the semiconductor element side toward the cover member side. (7) The method for manufacturing a semiconductor device according to (7).
(9)
The shape of the inner peripheral surface of the seal member is formed so as to have an uneven shape in a horizontal direction with respect to one surface of the semiconductor element.
(10)
The method for manufacturing a semiconductor device according to (7), wherein an inner peripheral surface of the seal member is formed in a tapered shape.

DESCRIPTION OF SYMBOLS 1,23,26 ... Semiconductor device, 2 ... Solid-state image sensor, 3, 22, 25, 30, 31, 32, 33 ... Seal member, 4 ... Cover member, 5 ... Solder Balls, 6 ... interlayer insulating film, 7 ... silicon substrate, 8 ... wiring layer, 9 ... wiring pad portion, 10 ... wiring, 11 ... color filter layer, 12 ... On-chip lens, 13, 16, 27 ... mask, 14 ... first member, 14a, 15a, 25a ... photosensitive resin layer, 15 ... second member, 17 ... space, 18 ... Insulating film, 19 ... Electrode layer, 20 ... Insulating layer, 21 ... Probe pin, 28 ... Through-hole

Claims (10)

A semiconductor element having a desired wiring circuit on a semiconductor substrate and having solder balls on one surface;
A cover member formed on the other surface side of the semiconductor element;
A seal member formed in a ring shape at the periphery of an element formation region of the semiconductor element and holding the other surface of the semiconductor element in an airtight manner with the cover member, the inner peripheral surface having a shape of the semiconductor element A sealing member formed so as to change stepwise or continuously in a vertical direction and / or a horizontal direction with respect to the other surface of
A semiconductor device comprising: The cross-sectional width in the horizontal direction with respect to the other surface of the semiconductor element of the seal member is formed so as to decrease stepwise or continuously from the semiconductor element side toward the cover member side. 1. The semiconductor device according to 1. The cross-sectional width in the horizontal direction with respect to the other surface of the semiconductor element of the seal member is formed so as to gradually decrease from the semiconductor element side toward the cover member side,
The semiconductor device according to claim 2, wherein the seal member is made of a material having a different hardness for each stage. The semiconductor device according to claim 1, wherein a shape of an inner peripheral surface of the seal member is formed so as to form a concavo-convex shape in a horizontal direction with respect to the other surface of the semiconductor element. The semiconductor device according to claim 2, wherein an inner peripheral surface of the seal member is tapered. Preparing a semiconductor element having a desired wiring circuit on a semiconductor substrate, and a cover member to be bonded onto one surface of the semiconductor element;
In the bonding surface of the semiconductor element or the cover member, the shape of the inner peripheral surface in a region corresponding to the peripheral edge of the element formation region of the semiconductor element is perpendicular to one surface of the semiconductor element, or And / or a step of forming a ring-shaped sealing member formed so as to change stepwise or continuously in the horizontal direction;
Bonding the semiconductor element and the cover member through the seal member;
Forming a solder ball connected to the wiring circuit on the other surface of the semiconductor element;
A method for manufacturing a semiconductor device comprising: The cross-sectional width in the horizontal direction with respect to one surface of the semiconductor element of the seal member is formed so as to decrease stepwise or continuously from the semiconductor element side toward the cover member side. The manufacturing method of the semiconductor device of description. A cross-sectional width in a horizontal direction with respect to one surface of the semiconductor element of the seal member is formed so as to gradually decrease from the semiconductor element side toward the cover member side. The method for manufacturing a semiconductor device according to claim 7, wherein the semiconductor device is formed of a material having different hardness. The method for manufacturing a semiconductor device according to claim 6, wherein the shape of the inner peripheral surface of the seal member is formed so as to form an uneven shape in a horizontal direction with respect to one surface of the semiconductor element. The method for manufacturing a semiconductor device according to claim 7, wherein an inner peripheral surface of the seal member is formed in a tapered shape.

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