CN104022155A - 稳定的无定形金属氧化物半导体 - Google Patents

稳定的无定形金属氧化物半导体 Download PDF

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CN104022155A
CN104022155A CN201410171285.5A CN201410171285A CN104022155A CN 104022155 A CN104022155 A CN 104022155A CN 201410171285 A CN201410171285 A CN 201410171285A CN 104022155 A CN104022155 A CN 104022155A
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metal oxide
metal
amorphous
oxide
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谢泉隆
俞钢
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Fantasy Shine Co ltd
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Abstract

本发明涉及稳定的无定形金属氧化物半导体。本发明提供一种薄膜半导体器件,其具有含无定形半导体离子金属氧化物和无定形绝缘共价金属氧化物的混合物的半导体层。以与半导体层连通的方式设置一对端子,所述一对端子限定导电槽,并以与导电槽连通的方式设置栅极端子,且进一步设置该栅极端子以控制所述槽的导电。本发明还包括一种淀积混合物的方法,所述方法包括在淀积过程期间使用氮来控制在所得半导体层中的载流子浓度。

Description

稳定的无定形金属氧化物半导体
本申请是申请日为2009年9月4日的中国专利申请第200980135164.2号的分案申请。
技术领域
本发明涉及用于半导体器件的沟道层(channel layer)的金属氧化物半导体材料。
背景技术
在半导体工业,特别是薄膜半导体器件如薄膜晶体管(TFT)中,所述器件包括间隔的源极和漏极区,其通过设置在其间的沟道层导电。至少一个栅极绝缘层和栅电极被设置在沟道层之上和/或之下,从而控制导电。在许多应用中,将TFT用于在制造期间不能忍受高温的情况中,因此,必须使用可以在相对低的温度(例如室温)下淀积但仍具有相对高迁移率的半导体。
由于金属氧化物半导体的高载流子迁移率、透光性和低淀积温度而对其有强烈的兴趣。高载流子迁移率扩展了至需要更高频率或更高电流的高性能领域的应用。透光性排除了在显示器和传感器有源矩阵(active matrices)中对光屏蔽的需求。低淀积温度使得能够应用于塑料衬底上的柔性电子设备。
金属氧化物半导体的独特特征为:(1)载流子迁移率受膜粒度的影响更小,即,可以是高迁移率无定形金属氧化物;(2)表面状态的密度低且使得TFT能够容易地获得场效应,这与表面状态必须被氢钝化的共价半导体(例如S或a-Si)相反;以及(3)强烈取决于体载流子密度的迁移率。为了实现用于高性能应用的高迁移率,金属氧化物沟道的体载流子密度应当高,并且金属氧化物膜的厚度应当小(例如<100nm,优选<50nm)。
然而,金属氧化物半导体的主要缺点是稳定性和在较高加工温度下变成多晶的趋势。普通的金属氧化物如氧化锌、氧化铟锌和铟镓锌氧化物不是很稳定,且在中等加工温度(例如大于约400℃)下成为多晶。由于一些原因,不希望在半导体器件中存在多晶半导体金属氧化物。例如,由于晶体大小和位置的变化,即使在一批的相邻器件之间,在多晶半导体金属氧化物中形成的晶体管的特性也会发生变化。为了更好地理解这个问题,在亚微型栅下的导电区域中,每个不同的晶体管可以包含一个或两个多晶硅晶粒至数个晶粒,且在导电区域中晶体数目的不同会产生不同的特性。不同粒子间的尺寸和物理特性也同样不同。
金属氧化物薄膜晶体管(TFT)的稳定性主要取决于加工温度。在高温下,可以减少在块状半导体层(bulk semiconductor layer)中以及在栅极绝缘层和半导体层之间的界面处的阱。对于应用,诸如有源矩阵有机发光装置(AMOLED),需要最大的稳定性。在加工期间,将金属氧化物TFT放在高温下,通常在250℃和700℃之间是有利的。同时,期望在这些加工温度下保持金属氧化物的无定形性质。
因此,对在现有技术中的上述和其它缺陷进行补救是非常有利的。
因此,本发明的一个目的是提供一种新型改进的金属氧化物半导体材料。
本发明的另一个目的是提供一种新型改进的金属氧化物半导体材料,其具有改进的稳定性且在较高加工温度下变成多晶的趋势更低。
本发明的另一个目的是提供一种新型改进的金属氧化物半导体材料,其具有改进的稳定性、高载流子迁移率以及氧空位和载流子密度的良好控制。
发明内容
简言之,为了按照其优选实施方案实现本发明的期望目的,提供了一种稳定的无定形金属氧化物材料以用作半导体器件中的半导体,所述材料包含无定形半导体离子金属氧化物和无定形绝缘共价金属氧化物的混合物。稳定的无定形金属氧化物材料由式XOaYOb和X-O-Y的一种表示,其中YO是无定形绝缘共价金属氧化物,且XO是无定形半导体离子金属氧化物。
还在薄膜半导体器件中实现了本发明的期望目的,所述薄膜半导体器件具有包含无定形半导体离子金属氧化物和无定形绝缘共价金属氧化物的混合物的半导体层。以与半导体层连通的方式设置一对端子且所述一对端子限定导电槽,并以与导电槽连通的方式设置栅极端子(gate terminal),且进一步设置其以控制所述槽的导电。
本发明还包括一种淀积混合物的方法,所述方法包括在淀积过程期间使用氮来控制在所得半导体层中的载流子浓度。
附图说明
根据参照附图的优选实施方案的下述详细说明,对本领域的技术人员来说,本发明的前述及其它更具体的目的和优点将易于变得显而易见,其中:
图1是本发明具有上覆栅极(overlying gate)和底部源极/漏极(underlying source/drain)的TFT的简化层状图;
图2是本发明具有上覆栅极和上覆源极/漏极的TFT的简化层状图;
图3是本发明具有底部栅极和底部源极/漏极的TFT的简化层状图;以及
图4是本发明具有底部栅极和上覆源极/漏极的TFT的简化层状图。
具体实施方式
现在转到图1,对本发明一个具体实施方案TFT10的简化层状图进行说明。TFT10包括衬底12,其可以为柔性材料如塑料,或者任何其它方便的材料,诸如玻璃等。使用任何熟知的方法以间隔取向(spacedapart orientation)的方式在衬底12的上表面中或上(在下文中一般指“上”)形成源极13和漏极14。以与源极13和漏极14两者以及其间的空间部分叠加(overlying)的方式形成金属氧化物膜16。应理解,金属氧化物膜16是在源极/漏极部件之间传导载流子的有源层。在一个优选实施方案中,金属氧化物膜16的厚度小于l00nm,优选小于50nm。以与金属氧化物膜16叠加的方式形成薄栅极电介质层17,并以与源极13和漏极14之间的空间叠加的方式在栅极电介质层17上形成栅极叠层18。因此,TFT10是顶栅极、底源极/漏极型器件。
现在转到图2,对本发明另一个实施方案TFT20的简化层状图进行说明。TFT20包括衬底22,其可以为柔性材料如塑料,或者任何其它方便的材料,诸如玻璃等。在衬底22上淀积金属氧化物膜26,并以部分叠加的方式在金属氧化物膜26的上表面上形成源极23和漏极24,以便在上表面上形成间隔取向。以与栅极23和栅极24之间的空间中的金属氧化物膜26以及与邻近所述空间的栅极23和栅极24的部分叠加的方式形成薄栅极电介质层27。以与源极23和漏极24栅极之间的空间叠加的方式在栅极电介质层27设置栅极叠层28。因此,TFT20是一种顶栅极、顶源极/漏极型器件。
现在转到图3,对本发明另一个具体实施方案TFT30的简化层状图进行说明。TFT30包括衬底32,其可以为柔性材料如塑料,或者任何其它方便的材料,诸如玻璃等。通过任何方便且确定的方法在衬底32中形成栅极叠层38。以与栅极叠层38和衬底32的周围区域叠加的方式形成薄栅极电介质层37。使用任何熟知的方法以间隔取向的方式在栅极电介质层37的上表面中或上(在下文中一般指“上”)形成源极33和漏极34。以与源极33和漏极34两者以及其间的空间部分叠加的方式形成金属氧化物膜36。在金属氧化物膜36上形成任选的钝化层。因此,TFT30是一种底栅极、底源极/漏极型器件。
现在转到图4,对本发明另一个具体实施方案TFT40的简化层状图进行说明。TFT40包括衬底42,其可以为柔性材料如塑料,或者任何其它方便的材料,诸如玻璃等。通过任何方便且确定的方法在衬底42中形成栅极叠层48。以与栅极叠层48和衬底42的周围区域叠加的方式形成薄栅极电介质层47。以与栅极叠层48和周围区域叠加的方式在栅极电介质层47上形成金属氧化物膜46。以部分叠加的方式在金属氧化物膜46的上表面上形成源极43和漏极44,以便在与栅极叠层48叠加的上表面上限定其间的空间。在金属氧化物膜46的曝露部分以及源极43和漏极44的周围部分上形成任选的钝化层49。因此,TFT40是一种底栅极、顶源极/漏极型器件。
应理解,上述薄膜晶体管的四个例子仅示例性地说明了一些可能的实施方案。例如,上述例子的每一个都是单栅晶体管。双栅晶体管,即在沟道之上和之下的栅极,连同实际的所有例子都是已知的。意图是本发明适用于所有可能的或潜在的薄膜晶体管和其它薄膜器件,例如二极管等。而且,对本发明来说,应理解,在所有TFT例子中都将金属氧化物膜定义为被“淀积到衬底上”,即使在其间插入膜。
无定形金属氧化物半导体材料由于其高载流子迁移率而适合用于半导体器件的沟道层。对本发明来说,金属氧化物半导体材料包括氧化锌、氧化铟、氧化锡、氧化镓、氧化镉中的至少一种或其组合。然而,金属氧化物半导体是相对不稳定的并且在较高温度下具有变为多晶的趋势。多晶半导体金属氧化物由于在结构中具有包括相对大的粒度的许多缺陷,所以在半导体器件中是不期望的。
在本领域已知的是,目前标准的薄膜晶体管的沟道长度为小于约5微米。对本发明来说,将“无定形”定义为如下材料,其沿沟道长度的粒度远小于目前标准的薄膜晶体管的沟道长度,例如约100纳米以下。
一些无定形金属氧化物,诸如氧化铝、氧化硼、氧化硅、氧化镁、氧化铍及其组合是非常稳定的而且不易变成多晶。然而,这些金属氧化物不是良好的半导体,并且在其正常状态下不能被用于半导体器件中。
已经发现,通过将一些无定形绝缘金属氧化物与无定形金属氧化物半导体材料混合可以大大改善无定形金属氧化物半导体材料的稳定性。然而,因为无定形绝缘金属氧化物实际上是不导电的,所以必须提供无定形金属氧化物半导体材料通过所得混合物的连续网络。因此,载流子流(carrier flow)不会被与无定形金属氧化物半导体材料混合的无定形绝缘金属氧化物中断且复合氧化物的迁移率能够是高的。因此,通过稳定氧化物成分提高了复合氧化物的稳定性,且迁移率仍然是高的。而且,应理解,在复合混合物中可以包含具有不同化合价或其它特性的几种不同类型的无定形绝缘金属氧化物,从而获得不同的效果,至少要有提高稳定性的结果。
可用于复合混合物的一些典型的无定形绝缘金属氧化物包括AlO、SiO、MgO、BeO、BO等及其组合。通常,所述无定形绝缘金属氧化物本质上(in nature)是更加共价的,同时具有大于约6eV的相对高的能隙即Eg。为了便于理解,可以通常将所述无定形绝缘金属氧化物当作“共价金属氧化物”。
通常,无定形金属氧化物半导体材料本质上是更加或实际上离子的,同时具有相对低的能隙,即Eg小于约4eV。为了便于理解,可以通常将所述无定形半导体金属氧化物称作“离子金属氧化物”。
可以将不同化合价的金属,即周期表中不同族的金属及其混合物用于提高复合混合物中的稳定性或期望的半导体特性。应理解,一些共价金属氧化物会增加更多的稳定性,因为其不结晶的趋势更大(例如更高的能隙)。另外,添加至复合混合物中的稳定或共价金属氧化物的量由保持无定形金属氧化物半导体材料的连续网络的必要性来确定。
在本发明的复合混合物中,无定形金属氧化物半导体材料由XO表示且无定形绝缘金属氧化物由YO表示。因此,可以将复合混合物的化学式描述为XOaYOb,其中“a”为复合混合物中无定形金属氧化物半导体材料(离子金属氧化物)的量且“b”为复合混合物中无定形绝缘金属氧化物材料(共价金属氧化物)的量。应理解,“a”和“b”是非零的(大于零)并且满足复合混合物包含无定形金属氧化物半导体材料的连续网络的要求,“a”通常大于“b”。优选地,“b”大于全部材料的约5%。另外,无定形半导体离子金属氧化物的量优选大于混合物的约17%。
复合混合物中的无定形半导体离子金属(X)和无定形绝缘共价金属(Y)在一些情况下可以与氧形成原子键,在本文中以X-O-Y表示。在这种情况下应理解,式X-O-Y简单地代替了式XOaYOb。而且,应理解,在任意情况下在稳定的无定形金属氧化物材料中都包含无定形半导体离子金属氧化物和无定形绝缘共价金属氧化物的混合物。
从将稳定金属氧化物与无定形金属氧化物半导体材料混合而产生的另一个问题是稳定的金属氧化物趋于减少氧空位。如果在常规程序中的淀积期间使用氧(例如小于5%),则可以大量减少氧空位且复合材料的电导率(迁移率)会变得太低。例如,已经发现,通过在淀积期间使用氧,将载流子降低至小于1018载流子/cm3。因此,在复合混合物中使用氧来控制载流子浓度,尽管是可以的,但是是非常困难和敏感的。
已发现可以使用氮(N2)来降低载流子浓度,从而代替使用氧来在淀积期间控制载流子浓度。在淀积期间N2的存在可以降低载流子浓度,但由于与氧相比,氮的反应性较低,因此不会像氧那样强烈。因此,氮的使用敏感度更低且更易于得到期望的结果。
因此,本发明公开了一种新型改进的金属氧化物半导体材料,其具有改进的稳定性且在较高温度下变成多晶的趋势更低。另外,所述新型改进的金属氧化物半导体材料具有高载流子迁移率和良好的氧空位控制性。
本领域的技术人员可以容易地对本文中为了示例性说明而选择的实施方案进行各种变化和修改。只要这种修改和变化没有背离本发明的精神,都旨在将其包含在仅由权利要求书的合理解释所确定的范围内。
已经以这样清楚和简明的措辞对本发明进行了充分说明,使得本领域的技术人员能够理解并实践本发明,本发明的范围由权利要求书来限定。

Claims (21)

1.一种底栅极、顶源极/漏极结构的薄膜半导体器件,包含:
衬底;
设置在所述衬底上的栅极;
与所述栅极和所述衬底的周围区域呈叠加方式的栅极电介质层;
以与所述栅极叠加的方式设置在所述栅极电介质层上的金属氧化物层;
以其间具有空间的方式设置在所述金属氧化物层的上表面上的源极和漏极,所述空间与所述栅极呈叠加方式;
在所述源极和所述漏极以及其间空间中的所述金属氧化物上至少部分设置的钝化层;以及
所述金属氧化物层包含能隙小于4eV的无定形半导体离子金属氧化物和能隙大于6eV的无定形绝缘共价金属/非金属氧化物的混合物,所述无定形半导体离子金属氧化物的量大于混合物的17%且所述无定形绝缘共价金属/非金属氧化物的量大于混合物的5%,并且所述无定形绝缘共价金属/非金属氧化物的量足以防止所述无定形半导体离子金属氧化物在加工温度下变成多晶且粒度足够小以提供所述无定形半导体离子金属氧化物的连续网络。
2.如权利要求1所述的薄膜半导体器件,其中所述衬底由玻璃或塑料膜制成。
3.如权利要求1所述的薄膜半导体器件,其中所述衬底为刚性或柔性的。
4.如权利要求1所述的薄膜半导体器件,其中所述金属氧化物层具有小于100nm的厚度。
5.如权利要求1所述的薄膜半导体器件,其中所述金属氧化物层具有小于50nm的厚度。
6.如权利要求1所述的薄膜半导体器件,其中所述金属氧化物层中的粒度基本小于100nm。
7.如权利要求1所述的薄膜半导体器件,其中在所述金属氧化物层中,无定形半导体离子金属氧化物成分的量远大于无定形绝缘共价金属氧化物层的氧化物成分的量。
8.如权利要求1所述的薄膜半导体器件,其中在所述金属氧化物层中,无定形绝缘共价金属/非金属氧化物的量足以防止所述无定形半导体离子金属氧化物在约250℃至约700℃的范围内的加工温度下变成多晶。
9.如权利要求1所述的薄膜半导体器件,其中在所述金属氧化物层中,所述无定形半导体离子金属氧化物成分包含氧化锌、氧化铟、氧化锡、氧化镓、氧化镉中的一种及其组合。
10.如权利要求1所述的薄膜半导体器件,其中在所述金属氧化物层中,所述无定形绝缘共价金属/非金属氧化物成分包含氧化铝、氧化镁、氧化铍中的一种及其组合。
11.如权利要求1所述的薄膜半导体器件,其中在所述金属氧化物层中,所述无定形绝缘共价金属/非金属氧化物成分包含氧化硅、氧化硼中的一种及其组合。
12.如权利要求1所述的薄膜半导体器件,其中在所述金属氧化物层中,所述膜包含由式XOaYOb和X-O-Y的一种表示的金属氧化物混合物,其中Y是无定形绝缘共价金属/非金属氧化物YO中的金属/非金属,X是无定形半导体离子金属氧化物XO中的金属,且‘a’为复合混合物中无定形半导体离子金属氧化物的量,‘b’为复合混合物中无定形绝缘共价金属/非金属氧化物的量,且X-O-Y表示氧原子与金属X离子键合且与金属/非金属Y共价键合。
13.如权利要求1所述的薄膜半导体器件,其中所述器件被组装到有源矩阵显示器中。
14.如权利要求13所述的薄膜半导体器件,其中所述有源矩阵显示器是有源矩阵有机发光装置(AMOLED)。
15.一种形成底栅极、顶源极/漏极结构的薄膜半导体器件的方法,包括如下步骤:
提供支持衬底;
在所述支持衬底上形成栅极;
以与所述栅极和所述支持衬底的周围区域叠加的方式淀积栅极电介质层;
以与所述栅极叠加的方式在所述栅极电介质层之上淀积金属氧化物层;
以其间具有空间的方式在所述金属氧化物膜的上表面上形成源极和漏极,所述空间与所述栅极呈叠加方式;
在所述源极、所述漏极以及所述源极和所述漏极之间的空间中的所述金属氧化物上至少部分地形成钝化层;以及
所述金属氧化物层包含能隙小于4eV的无定形半导体离子金属氧化物和能隙大于6eV的无定形绝缘共价金属/非金属氧化物的混合物,所述无定形半导体离子金属氧化物的量大于混合物的17%且所述无定形绝缘共价金属/非金属氧化物的量大于混合物的5%,并且所述无定形绝缘共价金属/非金属氧化物的量足以防止所述无定形半导体离子金属氧化物在加工温度下变成多晶且粒度足够小以提供所述无定形半导体离子金属氧化物的连续网络。
16.如权利要求15所述的方法,其中所述淀积金属氧化物层的步骤包括在淀积期间使用氮气来控制所述金属氧化物层的载流子浓度。
17.如权利要求15所述的方法,其中所述淀积金属氧化物层的步骤包括淀积无定形半导体粒子金属氧化物,其包含氧化锌、氧化铟、氧化锡、氧化镓、氧化镉中的一种及其组合。
18.如权利要求15所述的方法,其中所述淀积金属氧化物层的步骤包括淀积无定形绝缘共价金属/非金属氧化物成分,其包含氧化铝、氧化镁、氧化铍中的一种及其组合。
19.如权利要求15所述的方法,其中所述淀积金属氧化物层的步骤包括淀积无定形绝缘共价金属/非金属氧化物成分,其包含氧化硅、氧化硼中的一种及其组合。
20.如权利要求15所述的方法,其中所述支持衬底为刚性或柔性的。
21.如权利要求15所述的方法,其中所述支持衬底由玻璃或塑料膜制成。
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Families Citing this family (35)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US9306078B2 (en) * 2008-09-08 2016-04-05 Cbrite Inc. Stable amorphous metal oxide semiconductor
JP5361651B2 (ja) 2008-10-22 2013-12-04 株式会社半導体エネルギー研究所 半導体装置の作製方法
KR101667909B1 (ko) 2008-10-24 2016-10-28 가부시키가이샤 한도오따이 에네루기 켄큐쇼 반도체장치의 제조방법
US8741702B2 (en) 2008-10-24 2014-06-03 Semiconductor Energy Laboratory Co., Ltd. Method for manufacturing semiconductor device
EP2180518B1 (en) 2008-10-24 2018-04-25 Semiconductor Energy Laboratory Co, Ltd. Method for manufacturing semiconductor device
WO2011010541A1 (en) 2009-07-18 2011-01-27 Semiconductor Energy Laboratory Co., Ltd. Semiconductor device and method for manufacturing the same
KR20230165355A (ko) * 2009-09-16 2023-12-05 가부시키가이샤 한도오따이 에네루기 켄큐쇼 표시 장치
WO2013039126A1 (en) * 2011-09-16 2013-03-21 Semiconductor Energy Laboratory Co., Ltd. Semiconductor device
JP5806905B2 (ja) 2011-09-30 2015-11-10 株式会社半導体エネルギー研究所 半導体装置
JP5912394B2 (ja) 2011-10-13 2016-04-27 株式会社半導体エネルギー研究所 半導体装置
US9236494B2 (en) 2011-12-13 2016-01-12 E Ink Holdings Inc. Field effect transistor
US9490374B1 (en) * 2012-05-04 2016-11-08 Radiation Monitoring Devices, Inc. Radiation detectors
US10367071B2 (en) 2014-12-19 2019-07-30 Nxp Usa, Inc. Method and structure for a large-grain high-k dielectric
WO2017066332A1 (en) 2015-10-13 2017-04-20 Amorphyx, Inc. Amorphous metal thin film nonlinear resistor
US9496415B1 (en) 2015-12-02 2016-11-15 International Business Machines Corporation Structure and process for overturned thin film device with self-aligned gate and S/D contacts
US10461197B2 (en) 2016-06-03 2019-10-29 Semiconductor Energy Laboratory Co., Ltd. Sputtering target, oxide semiconductor, oxynitride semiconductor, and transistor
JP6800092B2 (ja) * 2016-06-24 2020-12-16 株式会社半導体エネルギー研究所 トランジスタ及び表示装置
TWI726026B (zh) * 2016-06-27 2021-05-01 日商半導體能源硏究所股份有限公司 電晶體以及半導體裝置
TWI737665B (zh) 2016-07-01 2021-09-01 日商半導體能源硏究所股份有限公司 半導體裝置以及半導體裝置的製造方法
JP7068265B2 (ja) 2016-07-07 2022-05-16 アモルフィックス・インコーポレイテッド アモルファス金属ホットエレクトロントランジスタ
TWI811761B (zh) 2016-07-11 2023-08-11 日商半導體能源研究所股份有限公司 金屬氧化物及半導體裝置
TWI754542B (zh) 2016-07-11 2022-02-01 日商半導體能源研究所股份有限公司 濺射靶材及金屬氧化物
CN106784313A (zh) * 2016-12-27 2017-05-31 武汉华星光电技术有限公司 有机薄膜晶体管及其制备方法
GB201708242D0 (en) * 2017-05-23 2017-07-05 Univ Bradford Radiation shield
CN109841735B (zh) * 2017-09-30 2020-11-06 Tcl科技集团股份有限公司 Tft的制备方法、用于制备tft的墨水及其制备方法
WO2019125367A1 (en) * 2017-12-18 2019-06-27 Intel Corporation Substrate-gated group iii-v transistors and associated fabrication methods
WO2019175698A1 (ja) 2018-03-12 2019-09-19 株式会社半導体エネルギー研究所 金属酸化物、及び金属酸化物を有するトランジスタ
KR20200130466A (ko) 2018-03-30 2020-11-18 아모르픽스, 인크 비정질 금속 박막 트랜지스터
WO2020027243A1 (ja) * 2018-08-01 2020-02-06 出光興産株式会社 結晶構造化合物、酸化物焼結体、スパッタリングターゲット、結晶質酸化物薄膜、アモルファス酸化物薄膜、薄膜トランジスタ、及び電子機器
CN110164878B (zh) * 2019-06-10 2022-05-03 惠科股份有限公司 阵列基板及其制备方法
US11024736B2 (en) 2019-08-09 2021-06-01 Micron Technology, Inc. Transistor and methods of forming integrated circuitry
US10964811B2 (en) 2019-08-09 2021-03-30 Micron Technology, Inc. Transistor and methods of forming transistors
US11542597B2 (en) 2020-04-08 2023-01-03 Applied Materials, Inc. Selective deposition of metal oxide by pulsed chemical vapor deposition
US11501812B2 (en) * 2020-07-31 2022-11-15 Taiwan Semiconductor Manufacturing Co., Ltd. Semiconductor devices including ferroelectric memory and methods of forming the same
US11637175B2 (en) * 2020-12-09 2023-04-25 Micron Technology, Inc. Vertical transistors

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20030161204A1 (en) * 2002-02-22 2003-08-28 Mitsubishi Denki Kabushiki Kaisha Semiconductor memory device capable of performing burn-in test at high speed
US20040154704A1 (en) * 1994-10-18 2004-08-12 The Regents Of The University Of California And Symyx Technologies, Inc. Preparation and screening of crystalline inorganic materials
CN1930692A (zh) * 2004-03-12 2007-03-14 惠普开发有限公司 具有包含二元氧化物的混合物的沟道的半导体器件

Family Cites Families (17)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6380558B1 (en) * 1998-12-29 2002-04-30 Semiconductor Energy Laboratory Co., Ltd. Semiconductor device and method of fabricating the same
US7002179B2 (en) * 2003-03-14 2006-02-21 Rohm Co., Ltd. ZnO system semiconductor device
US7723394B2 (en) * 2003-11-17 2010-05-25 Los Alamos National Security, Llc Nanocrystal/sol-gel nanocomposites
US7242039B2 (en) 2004-03-12 2007-07-10 Hewlett-Packard Development Company, L.P. Semiconductor device
US7297977B2 (en) 2004-03-12 2007-11-20 Hewlett-Packard Development Company, L.P. Semiconductor device
US7145174B2 (en) 2004-03-12 2006-12-05 Hewlett-Packard Development Company, Lp. Semiconductor device
US7691353B2 (en) * 2004-06-17 2010-04-06 Burgener Ii Robert H Low dielectric constant group II-VI insulator
CN101057333B (zh) * 2004-11-10 2011-11-16 佳能株式会社 发光器件
US7829444B2 (en) * 2004-11-10 2010-11-09 Canon Kabushiki Kaisha Field effect transistor manufacturing method
JP2007053279A (ja) * 2005-08-19 2007-03-01 Elpida Memory Inc 半導体装置の製造方法
EP1998375A3 (en) * 2005-09-29 2012-01-18 Semiconductor Energy Laboratory Co, Ltd. Semiconductor device having oxide semiconductor layer and manufacturing method
US8642413B2 (en) * 2006-09-14 2014-02-04 Intel Corporation Formation of strain-inducing films using hydrogenated amorphous silicon
JP2010512664A (ja) * 2006-12-11 2010-04-22 ルーメンツ リミテッド ライアビリティ カンパニー 酸化亜鉛多接合光電池及び光電子装置
JP5196870B2 (ja) * 2007-05-23 2013-05-15 キヤノン株式会社 酸化物半導体を用いた電子素子及びその製造方法
TWI379438B (en) * 2007-03-02 2012-12-11 Miin Jang Chen Zinc-oxide-based semiconductor light-emitting device and method of fabricating the same
US20080299771A1 (en) * 2007-06-04 2008-12-04 Irving Lyn M Methods of making thin film transistors comprising zinc-oxide-based semiconductor materials and transistors made thereby
US9306078B2 (en) * 2008-09-08 2016-04-05 Cbrite Inc. Stable amorphous metal oxide semiconductor

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20040154704A1 (en) * 1994-10-18 2004-08-12 The Regents Of The University Of California And Symyx Technologies, Inc. Preparation and screening of crystalline inorganic materials
US20030161204A1 (en) * 2002-02-22 2003-08-28 Mitsubishi Denki Kabushiki Kaisha Semiconductor memory device capable of performing burn-in test at high speed
CN1930692A (zh) * 2004-03-12 2007-03-14 惠普开发有限公司 具有包含二元氧化物的混合物的沟道的半导体器件

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