CN103985761A - 薄膜晶体管元件与薄膜晶体管显示装置 - Google Patents
薄膜晶体管元件与薄膜晶体管显示装置 Download PDFInfo
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- 239000000463 material Substances 0.000 claims abstract description 11
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- 239000004973 liquid crystal related substance Substances 0.000 claims description 24
- 230000004888 barrier function Effects 0.000 claims description 16
- 229910052751 metal Inorganic materials 0.000 claims description 8
- 239000002184 metal Substances 0.000 claims description 8
- GYHNNYVSQQEPJS-UHFFFAOYSA-N Gallium Chemical compound [Ga] GYHNNYVSQQEPJS-UHFFFAOYSA-N 0.000 claims description 6
- 229910052733 gallium Inorganic materials 0.000 claims description 6
- 238000002955 isolation Methods 0.000 claims description 6
- HCHKCACWOHOZIP-UHFFFAOYSA-N Zinc Chemical compound [Zn] HCHKCACWOHOZIP-UHFFFAOYSA-N 0.000 claims description 5
- 239000011701 zinc Substances 0.000 claims description 5
- 229910052782 aluminium Inorganic materials 0.000 claims description 4
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- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 claims description 4
- 229910052738 indium Inorganic materials 0.000 claims description 4
- APFVFJFRJDLVQX-UHFFFAOYSA-N indium atom Chemical compound [In] APFVFJFRJDLVQX-UHFFFAOYSA-N 0.000 claims description 4
- 229910052725 zinc Inorganic materials 0.000 claims description 4
- ATJFFYVFTNAWJD-UHFFFAOYSA-N Tin Chemical compound [Sn] ATJFFYVFTNAWJD-UHFFFAOYSA-N 0.000 claims description 3
- 229910052735 hafnium Inorganic materials 0.000 claims description 3
- VBJZVLUMGGDVMO-UHFFFAOYSA-N hafnium atom Chemical compound [Hf] VBJZVLUMGGDVMO-UHFFFAOYSA-N 0.000 claims description 3
- 229910052718 tin Inorganic materials 0.000 claims description 3
- 239000011135 tin Substances 0.000 claims description 3
- 238000005286 illumination Methods 0.000 abstract description 3
- 238000009413 insulation Methods 0.000 abstract 2
- 229910044991 metal oxide Inorganic materials 0.000 description 12
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- YSRUGFMGLKANGO-UHFFFAOYSA-N zinc hafnium(4+) indium(3+) oxygen(2-) Chemical compound [O-2].[Zn+2].[In+3].[Hf+4] YSRUGFMGLKANGO-UHFFFAOYSA-N 0.000 description 3
- XLOMVQKBTHCTTD-UHFFFAOYSA-N zinc oxide Inorganic materials [Zn]=O XLOMVQKBTHCTTD-UHFFFAOYSA-N 0.000 description 3
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- 229910003437 indium oxide Inorganic materials 0.000 description 2
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- 239000000377 silicon dioxide Substances 0.000 description 1
- HQVNEWCFYHHQES-UHFFFAOYSA-N silicon nitride Chemical compound N12[Si]34N5[Si]62N3[Si]51N64 HQVNEWCFYHHQES-UHFFFAOYSA-N 0.000 description 1
- 239000011787 zinc oxide Substances 0.000 description 1
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- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
- H01L29/76—Unipolar devices, e.g. field effect transistors
- H01L29/772—Field effect transistors
- H01L29/78—Field effect transistors with field effect produced by an insulated gate
- H01L29/786—Thin film transistors, i.e. transistors with a channel being at least partly a thin film
- H01L29/7869—Thin film transistors, i.e. transistors with a channel being at least partly a thin film having a semiconductor body comprising an oxide semiconductor material, e.g. zinc oxide, copper aluminium oxide, cadmium stannate
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- H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
- H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body
- H01L27/1214—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
- H01L27/1222—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs with a particular composition, shape or crystalline structure of the active layer
- H01L27/1225—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs with a particular composition, shape or crystalline structure of the active layer with semiconductor materials not belonging to the group IV of the periodic table, e.g. InGaZnO
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- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
- H01L29/06—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
- H01L29/10—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions with semiconductor regions connected to an electrode not carrying current to be rectified, amplified or switched and such electrode being part of a semiconductor device which comprises three or more electrodes
- H01L29/1025—Channel region of field-effect devices
- H01L29/1029—Channel region of field-effect devices of field-effect transistors
- H01L29/1033—Channel region of field-effect devices of field-effect transistors with insulated gate, e.g. characterised by the length, the width, the geometric contour or the doping structure
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Abstract
本发明提供一种薄膜晶体管元件与薄膜晶体管显示装置,该薄膜晶体管元件包含一栅极、一源极、一漏极、一绝缘层以及一主动区。绝缘层使栅极与源极及漏极电性隔离。主动区与源极及漏极接触而分别具有一接触区,并产生一通道,通道具有一通道宽度与一通道长度。主动区包含一半导体材料,并具有多个主动区边缘。在平行通道宽度的方向上,该些接触区的至少一接触区边缘与和该接触区边缘最邻近的主动区边缘的间距是大于2.5微米且小于等于16微米。通过本发明,能减少元件在照光与负偏压操作下的阈值电压的飘移量,因而改善在照光与负偏压操作下不稳定的缺点,进而提升薄膜晶体管显示装置的显示效能。
Description
技术领域
本发明是关于一种显示装置,特别关于一种薄膜晶体管元件与薄膜晶体管显示装置。
背景技术
薄膜晶体管元件已广泛应用在各种高阶显示器中。由于市场的快速竞争,显示器的大小与显示色彩饱和度的需求快速增加,以致薄膜晶体管电性表现与稳定度的要求也随之提升。金属氧化物半导体(Metal oxide semiconductors,MOSs)薄膜晶体管可在低温中制备,并且拥有良好的电流输出特性、较低的漏电流与高于非晶硅薄膜晶体管(amorphous silicon thin-film transistor,a-SiTFT)十倍以上的电子迁移率,这可降低显示器的功率消耗并提升显示器操作频率,并有机会取代传统的非晶硅薄膜晶体管,成为下个世代的显示器中主流的驱动元件。
近年来普遍认为,金属氧化物(Metal oxide-based)薄膜晶体管(TFT)虽具有良好的电流特性,但是却容易有在照光与负偏压操作下(Negative GateBias Illumination Stress,NBIS)产生元件电性不稳定的现象。因此,如何提供一种薄膜晶体管元件,其能改善这种不稳定的缺点,进而提升显示器的性能,实为当前重要课题之一。
发明内容
有鉴于上述课题,本发明的目的为提供一种能够改善在照光与负偏压操作下不稳定的缺点,进而提升显示器性能的薄膜晶体管元件。
为达上述目的,依据本发明的一种薄膜晶体管元件包含一栅极、一源极、一漏极、一绝缘层以及一主动区(active area)。绝缘层使栅极与源极及漏极电性隔离。主动区与源极及漏极接触而分别具有一接触区,并产生一通道,通道具有一通道宽度与一通道长度。主动区包含一半导体材料,并具有多个主动区边缘。在平行通道宽度的方向上,该些接触区的至少一接触区边缘与和接触区边缘最邻近的主动区边缘的间距是大于2.5微米且小于等于16微米。
为达上述目的,依据本发明的一种薄膜晶体管显示装置包含多个薄膜晶体管元件。该等薄膜晶体管元件呈阵列设置,且各薄膜晶体管元件包含一栅极、一源极、一漏极、一绝缘层以及一主动区。绝缘层使栅极与源极及漏极电性隔离。主动区与源极及漏极接触而分别具有一接触区,并产生一通道,通道具有一通道宽度与一通道长度。主动区包含一半导体材料,并具有多个主动区边缘。在平行通道宽度的方向上,该些接触区的至少一接触区边缘与和接触区边缘最邻近的主动区边缘的间距是大于2.5微米且小于等于16微米。
在一实施例中,间距是大于等于3微米,且小于等于12微米。
在一实施例中,主动区在一俯视方向上为多边形、弧形、扇形或其组合。
在一实施例中,主动区在一俯视方向上为对称图形或不对称图形。
在一实施例中,半导体材料为至少一金属的氧化物状态,该金属为铟、镓、锌、铝、锡或铪。氧化物状态例如氧化铟镓锌、或氧化铟铪锌等。
在一实施例中,绝缘层位于栅极上,主动区、源极及漏极位于绝缘层上。
在一实施例中,源极与漏极分别经由一开口区与主动区接触。
承上所述,本发明的金属氧化物薄膜晶体管元件是调整其主动区的几何形状,使得至少一接触区的一接触区边缘与和接触区边缘最邻近的主动区的一主动区边缘的间距是大于2.5微米且小于等于16微米。藉此,当薄膜晶体管元件在照光负偏压操作时,因照光而产生大量的电洞(hole)是导引至不影响元件阈值电压的主动区的区域,而能减少元件在照光与负偏压操作下的阈值电压的飘移量,因而改善在照光与负偏压操作下不稳定的缺点,进而提升薄膜晶体管显示装置的显示效能。
附图说明
图1为本发明较佳实施例的一种薄膜晶体管元件的剖面示意图;
图2为图1所示的薄膜晶体管元件的一俯视示意图;
图3显示间距为2.5微米的条件下,薄膜晶体管元件在照光负偏压操作下的阈值电压的飘移量;
图4显示间距为16微米的条件下,薄膜晶体管元件在照光负偏压操作下的阈值电压的飘移量;
图5显示间距分别为3微米、12微米及16微米的条件下,薄膜晶体管元件在照光负偏压操作下的阈值电压的飘移量;
图6为本发明的阈值电压飘移量减少的效应原因的说明图;
图7至图9为本发明较佳实施例的薄膜晶体管元件的不同态样的俯视示意图;
图10为本发明较佳实施例的薄膜晶体管元件的不同态样的一剖面示意图;
图11为本发明较佳实施例的一种薄膜晶体管显示装置的示意图。
附图标记
1、1a~1c、2:薄膜晶体管元件
11、21:栅极
12、22:源极
13、23:漏极
14、24:绝缘层
15、15a~15c、25:主动区
16、26:基板
17:刻蚀停止层
3:薄膜晶体管显示装置
31:薄膜晶体管基板
32:彩色滤光基板
33:液晶层
34:背光模块
C1、C2:接触区
D、D1~D4:间距
H:电洞
L:通道长度
W:通道宽度
具体实施方式
以下将参照相关图式,说明依本发明较佳实施例的一种薄膜晶体管元件与薄膜晶体管显示装置,其中相同的元件将以相同的参照符号加以说明。
图1为本发明较佳实施例的一种薄膜晶体管元件1的剖面示意图,图2为图1所示的薄膜晶体管元件1的一俯视示意图。请参照图1及图2,薄膜晶体管元件1包含一栅极11、一源极12、一漏极13、一绝缘层14以及一主动区15。
在本实施例中,栅极11设置于一基板16上。基板16为玻璃基板,其亦可由其他材质制成,并可为一可挠性基板或一非可挠性基板。栅极11的材质例如包含钼(Mo)或铝(Al),其材质亦可为其他金属或金属化合物或多层组合。绝缘层14设置于栅极11上并覆盖栅极11,并作为一栅极绝缘层。绝缘层14的材质可包含氮化硅或氧化硅或其他绝缘材料。主动区15设置于绝缘层14上,主动区15可包含一半导体材料,半导体材料为至少一金属的氧化物状态,例如金属氧化物半导体(Metal oxide semiconductors,MOSs)。该金属例如为铟、镓、锌、铝、锡或铪。金属的氧化物状态例如但不限于氧化铟镓锌(Indium Gallium Zinc Oxide,IGZO)、氧化铟铪锌(Hafnium Indium ZincOxide,HfIZO)、或其组合。金属氧化物(Metal oxide-based)薄膜晶体管可在低温中制备,并且拥有良好的电流输出特性、较低的漏电流与高于非晶硅薄膜晶体管(amorphous silicon thin-film transistor,a-Si TFT)十倍以上的电子迁移率,这可降低显示装置的功率消耗并提升其操作频率。
在本实施例中,薄膜晶体管元件1更包含一刻蚀停止层(etch stop layer,ESL)17,其设置于主动区15上,并于主动区15处形成两开口区。源极12与漏极13设置于刻蚀停止层17上且部分位于该等开口区内。绝缘层14使栅极11与源极12及漏极13电性隔离。在本实施例中,主动区15与源极12及漏极13接触而分别具有一接触区C1、C2,并产生一通道,通道具有一通道宽度W与一通道长度L,在本例中,通道长度L大于通道宽度W。于此,源极12与漏极13经由刻蚀停止层17所形成的开口区而与主动区15接触,而产生接触区C1、C2。
请参照图2,在平行通道宽度W的方向上,至少一接触区C1的一接触区边缘与和该接触区边缘最邻近的主动区15的一主动区边缘的一间距D是大于2.5微米且小于等于16微米。本发明经过验证发现,当增加间距D的尺寸时,可有效改善薄膜晶体管元件1在照光与负偏压操作下不稳定的缺点,进而提升显示性能。而现有的间距D由于在增加像素开口率的需求下,都设计为半导体工艺所能作到的极限,即2.5微米以下。反观本发明,在发现此效应之后,将间距D增加而能提升显示效能。
图3显示间距D为2.5微米的条件下,薄膜晶体管元件1在照光负偏压操作(NBIS)下的阈值电压的飘移量,图4显示间距D为16微米的条件下,薄膜晶体管元件1在照光负偏压操作下的阈值电压的飘移量。由图3与图4可知,通过增加间距D,可有效减少阈值电压长时间操作下所产生的飘移量,因而改善在照光与负偏压操作下不稳定的缺点,进而提升薄膜晶体管显示装置的显示效能。
另外,图5显示间距D分别为3微米、12微米及16微米的条件下,薄膜晶体管元件1在照光负偏压操作下的阈值电压的飘移量。由图5可知,在不断增加间距D的同时,阈值电压的飘移量减少的效果也在递减,因此考量像素开口率的因素,将间距D的范围限制在大于2.5微米且小于等于16微米,可使元件及显示效能最佳化。另外,较佳者为间距D大于等于3微米,且小于等于12微米。
图6为上述效应原因的说明图,如图6所示,当薄膜晶体管元件在照光负偏压操作时,因照光而产生大量的电洞(hole)H导引(如图中箭头方向)至不影响元件阈值电压的主动区15的区域,而减少元件在照光与负偏压操作下的阈值电压的飘移量。
如图2所示,主动区15的一俯视图形为梯形。除了图2所示的主动区15的几何图形之外,主动区15亦可具有多种几何图形,只要至少一接触区C1或C2的一接触区边缘与和该接触区边缘最邻近的主动区15的一主动区边缘的间距D大于2.5微米且小于等于16微米即可。以下举例说明之。
如图7所示,薄膜晶体管元件1a的主动区15a具有另一种几何图形,使得漏极13与主动区15a的接触区C2的一接触区边缘与和该接触区边缘最邻近的主动区15a的一主动区边缘的间距D1是大于2.5微米且小于等于16微米。
如图8所示,薄膜晶体管元件1b的主动区15b具有另一种几何图形,使得源极12与主动区15b的接触区C1以及漏极13与主动区15b的接触区C2的一边缘与和其最邻近的主动区15b的一主动区边缘的间距D2、D3皆大于2.5微米且小于等于16微米。
如图9所示,薄膜晶体管元件1c的主动区15c具有另一种几何图形,使得源极12与主动区15c的接触区C1的一边缘与和其最邻近的主动区15c的一主动区边缘的间距D4大于2.5微米且小于等于16微米。于此,主动区15c的几何图形为多边形与弧形的组合。
上述主动区的几何图形仅为举例说明。主动区在一俯视方向上可例如为多边形、弧形、扇形或其组合。并且主动区在一俯视方向上可为对称图形或不对称图形。此外,各接触区的一接触区边缘与和其最邻近的该主动区的一主动区边缘之间距可皆大于2.5微米且小于等于16微米。
另外,图1所示的薄膜晶体管元件1的剖面结构仅为举例说明,而非用以限制本发明。本发明的薄膜晶体管元件可具有多种结构态样,以下以图10举例说明之。
如图10所示,本发明较佳实施例的另一种薄膜晶体管元件2包含一栅极21、一源极22、一漏极23、一绝缘层24以及一主动区25。栅极21设置于一基板26上,绝缘层24设置于基板26并覆盖栅极21,使栅极21与源极22及漏极23电性隔离。主动区25与源极22及漏极23接触而分别具有一接触区C1、C2,并产生一通道,且主动区25的材质包含一金属氧化物。此外,在平行通道宽度的方向上,至少一接触区C1、C2的一边缘与和其最邻近的该主动区的一主动区边缘的间距是大于2.5微米且小于等于16微米。
与薄膜晶体管元件1主要不同在于,薄膜晶体管元件2并无包含一刻蚀停止层,且源极22与漏极23并非经由一开口区而与主动区25接触,而是直接平躺在主动区25上并与之接触而产生接触区C1、C2。
在本发明中,薄膜晶体管元件可应用于任一薄膜晶体管显示装置,例如被动发光的显示装置(例如液晶显示装置)、或主动发光的显示装置(例如有机发光二极管显示装置)。以下是以液晶显示装置举例说明。
图11为本发明较佳实施例的一种薄膜晶体管显示装置3的示意图。请参照图11,薄膜晶体管显示装置3包含一薄膜晶体管基板31、一彩色滤光基板32、设置于两基板31、32之间的液晶层33以及一背光模块34。薄膜晶体管基板31与彩色滤光基板32相对设置,而背光模块34提供光线至两基板31、32及液晶层33,进而形成画面。其中,薄膜晶体管基板31包含多个薄膜晶体管元件,该等薄膜晶体管元件呈阵列设置并控制各像素的发光。该等薄膜晶体管元件的至少其中之一可应用上述任一薄膜晶体管元件1、1a~1c、2。其中,薄膜晶体管元件的栅极可电性连接一扫描线,薄膜晶体管元件的源极(或漏极)可电性连接一数据线,而漏极(或源极)可电性连接一像素电极。通过薄膜晶体管元件可控制各像素的发光时间与亮度,进而显示画面。并且通过增加该间距,可有效减少金属氧化物薄膜晶体管元件的阈值电压由于操作时间所产生的飘移量,因而改善在照光与负偏压操作下不稳定的缺点,进而提升薄膜晶体管显示装置的显示效能。
综上所述,本发明的金属氧化物薄膜晶体管元件是调整其主动区的几何形状,使得至少一接触区的一接触区边缘与和其最邻近的主动区的一主动区边缘的间距是大于2.5微米且小于等于16微米。藉此,当薄膜晶体管元件在照光负偏压操作时,因照光而产生大量的电洞导引至不影响元件阈值电压的主动区的区域,而能减少元件在照光与负偏压操作下的阈值电压的飘移量,因而改善在照光与负偏压操作下不稳定的缺点,进而提升薄膜晶体管显示装置的显示效能。
以上所述仅为举例性,而非为限制性者。任何未脱离本发明的精神与范畴,而对其进行的等效修改或变更,均应包含于权利要求书中。
Claims (11)
1.一种薄膜晶体管元件,其特征在于,所述薄膜晶体管元件包含:
一栅极;
一源极;
一漏极;
一绝缘层,使所述栅极与所述源极及所述漏极电性隔离;以及
一主动区,与所述源极及所述漏极接触而分别具有一接触区,并产生一通道,所述通道具有一通道宽度与一通道长度,所述主动区包含一半导体材料,并具有多个主动区边缘;
其中,在平行所述通道宽度的方向上,所述接触区的至少一接触区边缘与和所述接触区边缘最邻近的所述主动区边缘的间距大于2.5微米且小于等于16微米。
2.根据权利要求1所述的薄膜晶体管元件,其特征在于,所述间距大于等于3微米,且小于等于12微米。
3.根据权利要求1所述的薄膜晶体管元件,其特征在于,所述主动区在一俯视方向上为多边形、弧形、扇形或其组合。
4.根据权利要求1所述的薄膜晶体管元件,其特征在于,所述主动区在一俯视方向上为对称图形或不对称图形。
5.根据权利要求1所述的薄膜晶体管元件,其特征在于,所述半导体材料为至少一金属的氧化物状态,所述金属为铟、镓、锌、铝、锡或铪。
6.根据权利要求1所述的薄膜晶体管元件,其特征在于,所述源极与所述漏极分别经由一开口区与所述主动区接触。
7.一种薄膜晶体管显示装置,其特征在于,所述薄膜晶体管显示装置包含:
多个薄膜晶体管元件,所述薄膜晶体管元件呈阵列设置,且各所述薄膜晶体管元件包含:
一栅极;
一源极;
一漏极;
一绝缘层,使所述栅极与所述源极及所述漏极电性隔离;以及
一主动区,与所述源极及所述漏极接触而分别具有一接触区,并产生一通道,所述通道具有一通道宽度与一通道长度,所述主动区包含一半导体材料,并具有多个主动区边缘;
其中,在平行所述通道宽度的方向上,所述接触区的至少一接触区边缘与和所述接触区边缘最邻近的所述主动区边缘的间距大于2.5微米且小于等于16微米。
8.根据权利要求7所述的薄膜晶体管显示装置,其特征在于,所述间距大于等于3微米,且小于等于12微米。
9.根据权利要求7所述的薄膜晶体管显示装置,其特征在于,所述主动区在一俯视方向上为多边形、弧形、扇形或其组合。
10.根据权利要求7所述的薄膜晶体管显示装置,其特征在于,所述主动区在一俯视方向上为对称图形或不对称图形。
11.根据权利要求7所述的薄膜晶体管显示装置,其特征在于,所述源极与所述漏极分别经由一开口区与所述主动区接触。
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