CN103943632B - 一种阵列基板及其制备方法、液晶显示器 - Google Patents

一种阵列基板及其制备方法、液晶显示器 Download PDF

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CN103943632B
CN103943632B CN201310751479.8A CN201310751479A CN103943632B CN 103943632 B CN103943632 B CN 103943632B CN 201310751479 A CN201310751479 A CN 201310751479A CN 103943632 B CN103943632 B CN 103943632B
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electrode
active layer
grid
bridge
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CN103943632A (zh
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曹兆铿
楼均辉
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Tianma Microelectronics Co Ltd
Shanghai Tianma Microelectronics Co Ltd
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Tianma Microelectronics Co Ltd
Shanghai Tianma Microelectronics Co Ltd
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Abstract

本发明提供了一种阵列基板,包括显示区和设在所述显示区周围的驱动电路,其中,所述驱动电路包含多个TFT,至少一个TFT包括第一子TFT和第二子TFT:所述第一子TFT和第二子TFT之间通过一第一跨桥电连接,其中,所述第一跨桥的材料为透明导电材料。采用本发明方案得到的阵列基板,可解决采用薄膜晶体管制造栅电极驱动电路时,容易出现封框胶固化不良的问题。

Description

一种阵列基板及其制备方法、液晶显示器
技术领域
本发明涉及平板显示技术领域,尤其涉及一种阵列基板及其制备方法、液晶显示面板。
背景技术
如图1所示,为一现有显示面板1的结构示意图,包括:显示区10,布置在显示区10周围的栅极驱动电路20,显示区10下方的IC电路30,位于栅极驱动电路上的胶框区域(为使附图清晰显示,图中为标记),其中,显示区10包括多条栅极和多条数据线围绕而成的像素单元,各像素单元包含像素电极,通过与一TFT(Thin film transistor,薄膜晶体管)进行开关控制,进而显示图像。驱动电路20也包括多个TFT,每个TFT与一条不同的栅极或数据线连接,通过TFT的控制,将驱动电压加载至对应的栅极线或数据线,以实现对栅极或数据线的驱动。
现有驱动电路的TFT结构由于栅极遮挡光通过的原因,存在显示区周边胶框硬化不良的问题。
发明内容
有鉴于此,本发明提供了一种阵列基板及其制备方法、液晶显示器。
一种阵列基板,包括显示区和设在所述显示区周围的驱动电路,其中,所述驱动电路包含多个TFT,至少一个TFT包括第一子TFT和第二子TFT:所述第一子TFT和第二子TFT之间通过一第一跨桥电连接,其中,所述第一跨桥的的材料为透明导电材料。
本发明还提供了一种阵列基板的制造方法:包括:
步骤A:提供一基板,沉积第一金属层,图案化分别形成第一栅极和第二栅极,并在所述第一栅极和第二栅极上方沉积第一绝缘材料,形成栅绝缘层;
步骤B:在所述栅绝缘层上沉积半导体材料,并图案化分别形成位于第一栅极和第二栅极上方的第一有源层以及第二有源层;在所述第一有源层和第二有源层上方沉积第二绝缘材料,形成刻蚀阻挡层;在所述刻蚀阻挡层上沉积第二金属材料,分别图案化形成源极和漏极,且沉积第一透明导电材料,图案化形成第一跨桥;在所述刻蚀阻挡层、源极、漏极以及第一跨桥上方沉积第三绝缘材料,形成钝化层,并通过刻蚀工艺形成第一过孔、第二过孔、第三过孔以及第四过孔。
步骤C:在钝化层上沉积第二透明导电材料,并图案化形成第一透明导电电极、第二透明导电电极、第三透明导电电极以及第四透明导电电极;其中,所述第一透明导电电极通过所述第一过孔能使源极和第一有源层电连接,所述第二透明导电电极通过所述第二过孔能使第一有源层和第一跨桥电连接,所述第三透明导电电极通过第三过孔能使第二有源层与第一跨桥电连接,所述第四透明导电电极通过第四过孔能使第二有源层与漏极电连接。
本发明还提供了一种液晶显示器,包括:上述任一项的TFT阵列基板。
综上:采用上述本发明技术方案得到的阵列基板,可解决采用薄膜晶体管制造栅电极驱动电路时,容易出现封框胶固化不良的问题。
附图说明
图1为现有技术一显示面板的结构示意图;
图2为本发明一实施例薄膜晶体管阵列基板的结构示意图;
图3为图2中AA'位置的横截面示意图;
图4为图3实施例光透过的效果示意图;
图5为制造图2实施例薄膜晶体管阵列基板的工艺流程图;
图6为本发明另一实施例薄膜晶体管阵列基板的结构示意图;
图7为本发明另一实施例薄膜晶体管阵列基板的结构示意图;
图8为制造图7实施例薄膜晶体管阵列基板的工艺流程图;
图9为本发明另一实施例薄膜晶体管阵列基板的结构示意图;
图10为制造图9实施例薄膜晶体管阵列基板的工艺流程图。
具体实施方式
下面将结合本发明实施例中的附图,对本发明实施例中的技术方案进行清楚、完整地描述,显然,所描述的实施例仅仅是本发明一部分实施例,而不是全部的实施例。基于本发明中的实施例,本领域普通技术人员在没有作出创造性劳动前提下所获得的所有其他实施例,都属于本发明保护的范围。
本发明一实施例提供了一种阵列基板,该阵列基板栅驱动电路区域TFT的结构示意图可以如图2所示,图3为图2中AA’位置的横截面示意图,下面结合图2和图3对本实施例提供的薄膜晶体管阵列基板进行说明。
在本实施例中,阵列基板包括显示区和设在显示区周围的驱动电路,驱动电路包含多个TFT(Thin film transistor,薄膜晶体管),其中至少一个TFT包括第一子TFT 20a和第二子TFT 20b,第一子TFT 20a和第二子TFT 20b之间通过一第一跨桥110电连接。具体地,阵列基板包含一基板101,第一子TFT 20a包含设置在基板101上的第一栅极102a,以及第一栅极102a上方的栅绝缘层103,形成在栅绝缘层103上的第一有源层104a,形成在第一有源层104a上的刻蚀阻挡层105,形成在刻蚀阻挡层105上方且分别与第一有源层104a电连接的第一电极以及第二电极,其中,在本实施例中,第一电极包含互相接触的源极107a以及第一透明导电电极109a,源极107a与第一有源层104a通过第一透明导电电极109a电连接,第二电极包含与第一有源层104a电连接的第二透明导电电极109b;以及形成在刻蚀阻挡层105上的钝化层106。此外,第二子TFT 20b包含设置在基板101上的第二栅极102b,以及第二栅极102b上方的栅绝缘层103,形成在栅绝缘层103上的第二有源层104b,形成在第二有源层104b上的刻蚀阻挡层105,形成在刻蚀阻挡层105上方且分别与第二有源层电连接的第三电极以及第四电极,其中,第四电极包含漏极107b以及第四透明导电电极109d,其中,漏极107b与第二有源层104b通过第四透明导电电极109d电连接,第三电极包含第三透明导电电极109c;该第二子TFT 20b还包括形成在刻蚀阻挡层105上方的钝化层106。并且,第二透明导电电极109b与第三透明导电电极109c与第一跨桥110电连接。
进一步地,第一子TFT 20a和第二子TFT 20b的栅绝缘层、刻蚀阻挡层以及钝化层均为同层设置,且第一透明导电电极109a、第二透明导电电极109b、第三透明导电电极109c和第四透明导电电极109d为同层结构,另外,基板101上的第一栅极102a和第二栅极102b间隔设置,并形成间隔区域,第一跨桥110在垂直于基板平面的方向与该间隔区域重叠。
特别地,第一跨桥的的材料为透明导电材料,如选择为ITO(氧化铟锡)或IZO(氧化锌)。由此,如图4所示,当光(图中箭头方向为光通过的方向)从基板一侧射向本实施例的TFT结构时,在第一栅极102a和第二栅极102b之间的间隔区域上方,由于栅绝缘层、刻蚀阻挡层、钝化层以及第一跨桥均为透明材料,在间隙区域的光能有效通过设想TFT上方的封胶框区域,以使封框胶的固化效果显著增强。
此外,当显示区的像素结构为FFS(Fringe Field Switching,边缘场切换模式)时,由于在显示区的像素单元中需要形成位于不同层的像素电极和公共电极,该栅极驱动电路的第一、第二、第三、第四透明导电电极以及第一跨桥可分别与像素电极和公共电极位于同层,由此不需要增加额外的光罩工艺,能显著降低成本。
其中,基板通常采用玻璃、石英等透明材料;基板也可以由采用玻璃、石英等透明材料及其上的其他结构(如缓冲层等)构成。栅极通常采用金属材料,如Cr、Mo、Al、Ti和Cu中的一种或多种金属的合金。
有源层的形状通常为岛状,本实施例有源层的材料可以为氧化物半导体材料,具体地,可选铟镓锌氧化物、铟铝锌氧化物,铟钛锌氧化物和铟锌氧化物中的一种或几种,有源层的厚度一般为300~2000埃。由于氧化物半导体的迁移率可以达到20以上,能结合栅驱动电路来实现高分辨率甚至极高分辨率(2560*1600)的智能手机以及平板电脑的窄边框的要求。
刻蚀阻挡层通常覆盖整个基板范围,材料为有机感光材料。刻蚀阻挡层覆盖有源层,这样在后续刻蚀制备薄膜晶体管的源极、漏极时能防止对有源层造成刻蚀,因此称作刻蚀阻挡层。
钝化层一般可采用SiNx层,或SiO2和SiNx的复合层材料,也可选择有机感光材料,一方面由于其本身具有感光特性,在其内部形成第一过孔和第二过孔时,只需要曝光、显影等步骤即可,不需要刻蚀步骤,工艺可以简化。
本发明实施例还提供了上述实施例的TFT阵列基板的工艺流程图,如图5所示。从图5中可以看出,本发明实施例提供的TFT阵列基板的制备工艺步骤如下:
步骤A:提供一基板101,沉积第一金属层,图案化分别形成第一栅极102a和第二栅极102b,并在第一栅极102a和第二栅极102b上方沉积第一绝缘材料,形成栅绝缘层103;
步骤B:在栅绝缘层103上沉积半导体材料,并图案化分别形成位于第一栅极102a和第二栅极102b上方的第一有源层104a以及第二有源层104b;在第一有源层104a和第二有源层104b上方沉积第二绝缘材料,形成刻蚀阻挡层105;在刻蚀阻挡层105上沉积第二金属材料,分别图案化形成源极107a和漏极107b,且沉积第一透明导电材料,图案化形成第一跨桥110;在刻蚀阻挡层105、源极107a、漏极107b以及第一跨桥110上方沉积第三绝缘材料,形成钝化层106,并通过刻蚀工艺形成第一过孔108a、第二过孔108b、第三过孔108c以及第四过孔108d。
步骤C:在钝化层106上沉积第二透明导电材料,并图案化形成第一透明导电电极109a、第二透明导电电极109b、第三透明导电电极109c以及第四透明导电电极109d;其中,第一透明导电电极109a通过第一过孔能使源极107a和第一有源层104a电连接,第二透明导电电极109b通过第二过孔能使第一有源层104a和第一跨桥110电连接,第三透明导电电极109c通过第三过孔能使第二有源层104b与第一跨桥110电连接,第四透明导电电极109d通过第四过孔能使第二有源层104b与漏极107b电连接。
通过上述制备方法可得上述实施例的TFT结构。
本发明实施例还提供了一种阵列基板,该阵列基板像素区域的结构示意图可以如图6所示,下面结合图6对本实施例提供的薄膜晶体管阵列基板进行说明。与上一实施例相同的部分不再重述,其区别之处阐述如下:
本实施例的阵列基板,第二透明导电电极209b、第三透明导电电极209c与第一跨桥210为同层结构,且均设置在钝化层206的下方,如此设置,相较上一实施例可节省一层透明导电层,且由于透明导电电极形成在钝化层下方,可避免栅驱动电路暴露在外,以降低ESD(Electro-Static discharge,静电释放)风险。
本发明实施例还提供了一种阵列基板,该阵列基板像素区域的结构示意图可以如图7所示,下面结合图7对本实施例提供的薄膜晶体管阵列基板进行说明。与上一实施例相同的部分不再重述,其区别之处阐述如下:
该实施例的阵列基板,第一电极为与第一有源层304a直接接触的源极307a;第二电极包含第二透明导电电极309b,以及位于第一有源层304a和源极307a之间的第二金属层307c,其中,第二透明导电电极309b通过第二金属层307c与第一有源层304a电连接;第三电极包含第三透明导电电极309c,以及位于第二有源层304b和地第三透明导电电极309c之间的第三金属层307d,其中,第三透明导电电极309c通过第三金属层307d与第二有源层304b电连接;第四电极包含与第二有源层304b直接接触的漏极307b,并且,第二透明导电电极309b、第三透明导电电极309c与第一跨桥310为同层结构,在同一道工艺中制成。
本实施例将透明导电电极与第一跨桥采用同层结构设置,可节省工艺,降低成本,除此以外,由于分别与第一子TFT、第二子TFT的第一、第二有源层电连接的电极均为金属层材料,因此,该实施例的TFT结构除了能适用氧化物半导体作有源层以外,还能适用于a-Si制作有源层的TFT器件。此外,当有源层采用氧化物半导体材料时,也可将本实施例中的第三、第四金属层去除,将第一、第二有源层分别直接与第二、第三透明导电电极直接接触,实现第一有源层和第二有源层之间的电连接。
本发明实施例还提供了上述实施例的TFT阵列基板的工艺流程图,如图8所示。从图8中可以看出,本发明实施例提供的TFT阵列基板的制备工艺步骤如下:
步骤A:提供一基板301,沉积第一金属层,图案化分别形成第一栅极302a和第二栅极302b,并在第一栅极302a和第二栅极302b上方沉积第一绝缘材料,形成栅绝缘层303;
步骤B:在栅绝缘层303上沉积半导体材料,并图案化分别形成位于第一栅极302a和第二栅极302b上方的第一有源层304a以及第二有源层304b;在第一有源层304a和第二有源层304b上方沉积第二绝缘材料,形成刻蚀阻挡层305,且通过刻蚀工艺分别在形成位于第一有源层304a上的第一过孔308a和第二过孔308b,位于第二有源层304b上方的第三过孔308c和第四过孔308d;
步骤C:在刻蚀阻挡层305上沉积第二金属材料,分别图案化形成源极307a、第二金属层307c、第三金属层307d和漏极307b;其中,源极307a和第二金属层307c分别通过第一过孔和第二过孔与第一有源层304a电连接,第三金属层307d和漏极307b分别通过第三过孔和第四过孔与第二有源层304b电连接;
步骤D:沉积第一透明导电材料,图案化形成第一跨桥310,第一跨桥310与第二金属层307c和第三金属层307d电连接;在刻蚀阻挡层305、源极307a、漏极307b以及第一跨桥310上方沉积第三绝缘材料,形成钝化层306。
通过上述制备方法可得上述实施例的TFT结构。
本发明实施例还提供了一种阵列基板,该阵列基板像素区域的结构示意图可以如图9所示,下面结合图9对本实施例提供的薄膜晶体管阵列基板进行说明。与上一实施例相同的部分不再重述,其区别之处阐述如下:
本实施例的阵列基板,将第二透明电极409b、第三透明电极409c以及第一跨桥410设置为同层结构,且形成在钝化层406上方,如此设置,该TFT结构还可适用于TN-LCD(扭曲向列显示)或OLED(Organic Electroluminesence Display,有机电致发光显示)结构,除此以外,由于与有源层直接接触的是金属电极,该结构除适用氧化物半导体做有源层的结构外,也同样适用于a-Si制作有源层的结构。
本发明实施例还提供了上述实施例的TFT阵列基板的工艺流程图,如图10所示。从图10中可以看出,本发明实施例提供的TFT阵列基板的制备工艺步骤如下:
步骤A:提供一基板401,沉积第一金属层,图案化分别形成第一栅极402a和第二栅极402b,并在第一栅极402a和第二栅极402b上方沉积第一绝缘材料,形成栅绝缘层403;
步骤B:在栅绝缘层403上沉积半导体材料,并图案化分别形成位于第一栅极402a和第二栅极402b上方的第一有源层404a以及第二有源层404b;在第一有源层404a和第二有源层404b上方沉积第二绝缘材料,形成刻蚀阻挡层405,且通过刻蚀工艺分别在形成位于第一有源层404a上的第一过孔408a和第二过孔408b,位于第二有源层404b上方的第三过孔408c和第四过孔408d;
步骤C:在刻蚀阻挡层405上沉积第二金属材料,分别图案化形成源极407a、第二金属层407c、第三金属层407d和漏极407b;其中,源极407a和第二金属层407c分别通过第一过孔和第二过孔与第一有源层404a电连接,第三金属层407d和漏极407b分别通过第三过孔和第四过孔与第二有源层404b电连接;在刻蚀阻挡层405、源极407a以及漏极407b上方沉积第三绝缘材料,形成钝化层406,并通过刻蚀工艺形成第五过孔408e和第六过孔408f;
步骤D:沉积第一透明导电材料,图案化形成第一跨桥410,第一跨桥410通过第五过孔和第六过孔与第二金属层407c和第三金属层407d电连接。
通过上述制备方法可得上述实施例的TFT结构。
本发明还提供了一液晶显示器的实施例,包括上述任一种的阵列基板。
如上根据本发明的薄膜晶体管以及使用如上根据本发明的方法制造的薄膜晶体管可用于例如LCD或OLED等常规的平板显示器中。
本发明中描述的“上方”,是指位于基板平面的上方,可以是指材料之间的直接接触,也可以是间隔设置。
以上实施例是为更好的说明本发明技术方案,本领域技术人员所知,本发明也包括以上实施例技术方案实质等效或等同的方案,并不应以实施例具体情形作为对本发明权利要求的限制。此外,尽管已描述了本申请的优选实施例,但本领域内的技术人员一旦得知了基本创造性概念,则可对这些实施例做出另外的变更和修改。所以,所附权利要求意欲解释为包括优选实施例以及落入本申请范围的所有变更和修改。
显然,本领域的技术人员可以对本申请进行各种改动和变型而不脱离本申请的精神和范围。这样,倘若本申请的这些修改和变型属于本申请权利要求及其等同技术的范围之内,则本申请也意图包含这些改动和变型在内。

Claims (15)

1.一种阵列基板,包括显示区和设在所述显示区周围的驱动电路,其中,所述驱动电路包含多个TFT,至少一个TFT包括第一子TFT和第二子TFT:
所述第一子TFT和第二子TFT之间通过一第一跨桥电连接,其中,所述第一跨桥的材料为透明导电材料;
其中,所述阵列基板包含一基板,所述第一子TFT包含设置在所述基板上的第一栅极,以及第一栅极上方的栅绝缘层,形成在栅绝缘层上的第一有源层,形成在第一有源层上的刻蚀阻挡层,形成在刻蚀阻挡层上方且分别与所述第一有源层电连接的第一电极以及第二电极,形成在刻蚀阻挡层上方的钝化层;所述第二子TFT包含设置在所述基板上的第二栅极,以及第二栅极上方的栅绝缘层,形成在栅绝缘层上的第二有源层,形成在第二有源层上的刻蚀阻挡层,形成在刻蚀阻挡层上方且分别与所述第二有源层电连接的第三电极以及第四电极,形成在刻蚀阻挡层上方的钝化层,其中,所述基板上的第一栅极和第二栅极形成间隔区域,且所述第一跨桥在垂直方向上与所述间隔区域重叠;
所述栅绝缘层、刻蚀阻挡层和钝化层为透明材料。
2.如权利要求1所述的阵列基板,其特征在于,所述透明导电材料为ITO或IZO。
3.如权利要求1所述的阵列基板,其特征在于,所述第一电极包含源极以及第一透明导电电极,其中,所述源极与第一有源层通过所述第一透明导电电极电连接;所述第二电极包含第二透明导电电极;所述第四电极包含漏极以及第四透明导电电极,其中,所述漏极与第二有源层通过所述第四透明导电电极电连接;所述第三电极包含第三透明导电电极;其中,所述第二透明导电电极与第三透明导电电极与所述第一跨桥电连接。
4.如权利要求3所述的阵列基板,其特征在于,所述第一透明导电电极、第二透明导电电极、第三透明导电电极和第四透明导电电极为同层结构。
5.如权利要求3所述的阵列基板,其特征在于,所述第二透明导电电极、第三透明导电电极与第一跨桥为同层结构,且均位于所述钝化层的下方。
6.如权利要求1所述的阵列基板,其特征在于:所述第一电极包含与所述第一有源层直接接触的源极;所述第二电极包含第二透明导电电极;所述第三电极包含第三透明导电电极;所述第四电极包含与所述第二有源层直接接触的漏极,其中,所述第二透明导电电极、第三透明导电电极与第一跨桥为同层结构。
7.如权利要求6所述的阵列基板,其特征在于:所述第二电极还包含位于第一有源层和源极之间的第二金属层,其中,所述第二透明导电电极通过第二金属层与所述第一有源层电连接;所述第三电极还包含位于第二有源层和地第三透明导电电极之间的第三金属层,其中,所述第三透明导电电极通过第三金属层与所述第二有源层电连接。
8.如权利要求7所述的阵列基板,其特征在于:所述第二透明电极、第三透明电极以及第一跨桥形成在所述钝化层上。
9.如权利要求1所述的阵列基板,其特征在于,所述第一子TFT和第二子TFT的栅绝缘层,刻蚀阻挡层以及钝化层分别设置为同层结构。
10.如权利要求1所述的阵列基板,其特征在于,所述有源层的材料为氧化物半导体,或a-Si。
11.一种阵列基板的制造方法:用于制造设在显示区周围的驱动电路,包括:
步骤A:提供一基板,沉积第一金属层,图案化分别形成第一栅极和第二栅极,并在所述第一栅极和第二栅极上方沉积第一绝缘材料,形成栅绝缘层;
步骤B:在所述栅绝缘层上沉积半导体材料,并图案化分别形成位于第一栅极和第二栅极上方的第一有源层以及第二有源层;在所述第一有源层和第二有源层上方沉积第二绝缘材料,形成刻蚀阻挡层;在所述刻蚀阻挡层上沉积第二金属材料,分别图案化形成源极和漏极,且沉积第一透明导电材料,图案化形成第一跨桥;在所述刻蚀阻挡层、源极、漏极以及第一跨桥上方沉积第三绝缘材料,形成钝化层,并通过刻蚀工艺形成第一过孔、第二过孔、第三过孔以及第四过孔;
步骤C:在钝化层上沉积第二透明导电材料,并图案化形成第一透明导电电极、第二透明导电电极、第三透明导电电极以及第四透明导电电极;其中,所述第一透明导电电极通过所述第一过孔能使源极和第一有源层电连接,所述第二透明导电电极通过所述第二过孔能使第一有源层和第一跨桥电连接,所述第三透明导电电极通过第三过孔能使第二有源层与第一跨桥电连接,所述第四透明导电电极通过第四过孔能使第二有源层与漏极电连接;
其中,所述栅绝缘层、刻蚀阻挡层和钝化层为透明材料。
12.如权利要求11所述的制造方法,其特征在于:所述第二透明导电电极、第三透明导电电极与第一跨桥为同层设置,且在同一工艺中形成。
13.一种阵列基板的制造方法:用于制造设在显示区周围的驱动电路,包括:
步骤A:提供一基板,沉积第一金属层,图案化分别形成第一栅极和第二栅极,并在所述第一栅极和第二栅极上方沉积第一绝缘材料,形成栅绝缘层;
步骤B:在所述栅绝缘层上沉积半导体材料,并图案化分别形成位于第一栅极和第二栅极上方的第一有源层以及第二有源层;在所述第一有源层和第二有源层上方沉积第二绝缘材料,形成刻蚀阻挡层,且通过刻蚀工艺分别在形成位于第一有源层上的第一过孔和第二过孔,位于第二有源层上方的第三过孔和第四过孔;
步骤C:在所述刻蚀阻挡层上沉积第二金属材料,分别图案化形成源极、第二金属层、第三金属层和漏极;其中,所述源极和第二金属层分别通过第一过孔和第二过孔与所述第一有源层电连接,所述第三金属层和漏极分别通过第三过孔和第四过孔与所述第二有源层电连接;
步骤D:沉积第一透明导电材料,图案化形成第一跨桥,所述第一跨桥与所述第二金属层和第三金属层电连接;在所述刻蚀阻挡层、源极、漏极以及第一跨桥上方沉积第三绝缘材料,形成钝化层;
其中,所述栅绝缘层、刻蚀阻挡层和钝化层为透明材料。
14.一种阵列基板的制造方法:用于制造设在显示区周围的驱动电路,包括:
步骤A:提供一基板,沉积第一金属层,图案化分别形成第一栅极和第二栅极,并在所述第一栅极和第二栅极上方沉积第一绝缘材料,形成栅绝缘层;
步骤B:在所述栅绝缘层上沉积半导体材料,并图案化分别形成位于第一栅极和第二栅极上方的第一有源层以及第二有源层;在所述第一有源层和第二有源层上方沉积第二绝缘材料,形成刻蚀阻挡层,且通过刻蚀工艺分别在形成位于第一有源层上的第一过孔和第二过孔,位于第二有源层上方的第三过孔和第四过孔;
步骤C:在所述刻蚀阻挡层上沉积第二金属材料,分别图案化形成源极、第二金属层、第三金属层和漏极;其中,所述源极和第二金属层分别通过第一过孔和第二过孔与所述第一有源层电连接,所述第三金属层和漏极分别通过第三过孔和第四过孔与所述第二有源层电连接;在所述刻蚀阻挡层、源极以及漏极上方沉积第三绝缘材料,形成钝化层,并通过刻蚀工艺形成第五和第六过孔;
步骤D:沉积第一透明导电材料,图案化形成第一跨桥,所述第一跨桥通过第五过孔和第六过孔与所述第二金属层和第三金属层电连接;
其中,所述栅绝缘层、刻蚀阻挡层和钝化层为透明材料。
15.一种液晶显示器,包括:
如权利要求1-10任一项所述的阵列基板。
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