CN103887269B - 高频装置 - Google Patents

高频装置 Download PDF

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Publication number
CN103887269B
CN103887269B CN201310604642.8A CN201310604642A CN103887269B CN 103887269 B CN103887269 B CN 103887269B CN 201310604642 A CN201310604642 A CN 201310604642A CN 103887269 B CN103887269 B CN 103887269B
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CN
China
Prior art keywords
signal line
dielectric
metal
base plate
main surface
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
CN201310604642.8A
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English (en)
Chinese (zh)
Other versions
CN103887269A (zh
Inventor
三轮真
三轮真一
今井翔平
服部公春
吉冈贵章
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Mitsubishi Corp
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Mitsubishi Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Mitsubishi Corp filed Critical Mitsubishi Corp
Publication of CN103887269A publication Critical patent/CN103887269A/zh
Application granted granted Critical
Publication of CN103887269B publication Critical patent/CN103887269B/zh
Expired - Fee Related legal-status Critical Current
Anticipated expiration legal-status Critical

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Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/42Wire connectors; Manufacturing methods related thereto
    • H01L24/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L24/49Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/58Structural electrical arrangements for semiconductor devices not otherwise provided for, e.g. in combination with batteries
    • H01L23/64Impedance arrangements
    • H01L23/66High-frequency adaptations
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2223/00Details relating to semiconductor or other solid state devices covered by the group H01L23/00
    • H01L2223/58Structural electrical arrangements for semiconductor devices not otherwise provided for
    • H01L2223/64Impedance arrangements
    • H01L2223/66High-frequency adaptations
    • H01L2223/6644Packaging aspects of high-frequency amplifiers
    • H01L2223/6655Matching arrangements, e.g. arrangement of inductive and capacitive components
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/02Bonding areas; Manufacturing methods related thereto
    • H01L2224/04Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L2224/05Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
    • H01L2224/0554External layer
    • H01L2224/05599Material
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/44Structure, shape, material or disposition of the wire connectors prior to the connecting process
    • H01L2224/45Structure, shape, material or disposition of the wire connectors prior to the connecting process of an individual wire connector
    • H01L2224/45001Core members of the connector
    • H01L2224/45099Material
    • H01L2224/451Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805Shape
    • H01L2224/4809Loop shape
    • H01L2224/48091Arched
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/49Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/85Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a wire connector
    • H01L2224/8538Bonding interfaces outside the semiconductor or solid-state body
    • H01L2224/85399Material
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/42Wire connectors; Manufacturing methods related thereto
    • H01L24/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L24/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001Technical content checked by a classifier
    • H01L2924/00014Technical content checked by a classifier the subject-matter covered by the group, the symbol of which is combined with the symbol of this group, being disclosed without further technical details
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/19Details of hybrid assemblies other than the semiconductor or other solid state devices to be connected
    • H01L2924/191Disposition
    • H01L2924/19101Disposition of discrete passive components
    • H01L2924/19107Disposition of discrete passive components off-chip wires
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/30Technical effects
    • H01L2924/301Electrical effects
    • H01L2924/3011Impedance

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Computer Hardware Design (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Waveguides (AREA)
  • Microwave Amplifiers (AREA)
  • Wire Bonding (AREA)
  • Semiconductor Integrated Circuits (AREA)
CN201310604642.8A 2012-11-27 2013-11-26 高频装置 Expired - Fee Related CN103887269B (zh)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP2012-258889 2012-11-27
JP2012258889A JP6051814B2 (ja) 2012-11-27 2012-11-27 高周波装置

Publications (2)

Publication Number Publication Date
CN103887269A CN103887269A (zh) 2014-06-25
CN103887269B true CN103887269B (zh) 2017-01-04

Family

ID=50679189

Family Applications (1)

Application Number Title Priority Date Filing Date
CN201310604642.8A Expired - Fee Related CN103887269B (zh) 2012-11-27 2013-11-26 高频装置

Country Status (4)

Country Link
US (1) US9484321B2 (enExample)
JP (1) JP6051814B2 (enExample)
CN (1) CN103887269B (enExample)
DE (1) DE102013223500B4 (enExample)

Families Citing this family (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US9390048B2 (en) * 2013-12-04 2016-07-12 Lenovo Enterprise Solutions (Singapore) Pte. Ltd. Controlling characteristic impedance of a trace in a printed circuit board to compensate for external component loading
JP6462535B2 (ja) * 2015-08-28 2019-01-30 株式会社東芝 高周波半導体装置
JP6494474B2 (ja) * 2015-09-08 2019-04-03 株式会社東芝 高周波半導体装置
JP6852841B2 (ja) * 2016-12-28 2021-03-31 住友電工デバイス・イノベーション株式会社 半導体装置
EP3712932A4 (en) 2017-11-14 2021-07-14 NGK Insulators, Ltd. HOUSING AND SEMICONDUCTOR COMPONENT

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH05121913A (ja) * 1991-10-24 1993-05-18 Shinko Electric Ind Co Ltd 高周波素子用パツケージ
JPH1092975A (ja) * 1996-09-19 1998-04-10 Kyocera Corp 高周波回路用パッケージ

Family Cites Families (14)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS593557U (ja) * 1982-06-30 1984-01-11 三菱電機株式会社 モノリシツクマイクロ波集積回路
JPH0380601A (ja) * 1989-07-26 1991-04-05 Mitsubishi Electric Corp マイクロ波変換回路
JPH03119803A (ja) 1989-10-03 1991-05-22 Kyocera Corp マイクロ波平面回路調整方法
JPH03195049A (ja) 1989-12-25 1991-08-26 Hitachi Ltd 半導体集積回路装置
JPH08288701A (ja) 1995-04-14 1996-11-01 Mitsubishi Electric Corp マイクロ波集積回路装置
US6072211A (en) 1998-08-03 2000-06-06 Motorola, Inc. Semiconductor package
JP2001144510A (ja) * 1999-11-15 2001-05-25 Nec Corp マイクロ波回路の特性調整回路および特性調整方法
JP3728393B2 (ja) 2000-02-16 2005-12-21 三菱電機株式会社 半導体装置
JP4519637B2 (ja) 2004-12-28 2010-08-04 株式会社東芝 半導体装置
JP4575261B2 (ja) * 2005-09-14 2010-11-04 株式会社東芝 高周波用パッケージ
US7683480B2 (en) 2006-03-29 2010-03-23 Freescale Semiconductor, Inc. Methods and apparatus for a reduced inductance wirebond array
JP2011171697A (ja) 2010-01-22 2011-09-01 Toshiba Corp 高周波半導体装置
JP5450313B2 (ja) 2010-08-06 2014-03-26 株式会社東芝 高周波半導体用パッケージおよびその作製方法
JP5636834B2 (ja) * 2010-09-10 2014-12-10 富士通株式会社 高周波回路用パッケージ及び高周波回路装置

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH05121913A (ja) * 1991-10-24 1993-05-18 Shinko Electric Ind Co Ltd 高周波素子用パツケージ
JPH1092975A (ja) * 1996-09-19 1998-04-10 Kyocera Corp 高周波回路用パッケージ

Also Published As

Publication number Publication date
DE102013223500B4 (de) 2022-03-24
US9484321B2 (en) 2016-11-01
JP6051814B2 (ja) 2016-12-27
DE102013223500A1 (de) 2014-05-28
CN103887269A (zh) 2014-06-25
JP2014107398A (ja) 2014-06-09
US20140146506A1 (en) 2014-05-29

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Granted publication date: 20170104