CN103811481B - 具有金红石结晶相二氧化钛介电膜的半导体器件 - Google Patents

具有金红石结晶相二氧化钛介电膜的半导体器件 Download PDF

Info

Publication number
CN103811481B
CN103811481B CN201310356172.8A CN201310356172A CN103811481B CN 103811481 B CN103811481 B CN 103811481B CN 201310356172 A CN201310356172 A CN 201310356172A CN 103811481 B CN103811481 B CN 103811481B
Authority
CN
China
Prior art keywords
titanium dioxide
layer
rutile
dioxide layer
crystalline phase
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Active
Application number
CN201310356172.8A
Other languages
English (en)
Other versions
CN103811481A (zh
Inventor
谢君毅
维许瓦耐·巴赫特
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Nanya Technology Corp
Original Assignee
Nanya Technology Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Nanya Technology Corp filed Critical Nanya Technology Corp
Publication of CN103811481A publication Critical patent/CN103811481A/zh
Application granted granted Critical
Publication of CN103811481B publication Critical patent/CN103811481B/zh
Active legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L28/00Passive two-terminal components without a potential-jump or surface barrier for integrated circuits; Details thereof; Multistep manufacturing processes therefor
    • H01L28/40Capacitors
    • H01L28/60Electrodes
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L28/00Passive two-terminal components without a potential-jump or surface barrier for integrated circuits; Details thereof; Multistep manufacturing processes therefor
    • H01L28/40Capacitors
    • CCHEMISTRY; METALLURGY
    • C23COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
    • C23CCOATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
    • C23C16/00Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes
    • C23C16/22Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes characterised by the deposition of inorganic material, other than metallic material
    • C23C16/30Deposition of compounds, mixtures or solid solutions, e.g. borides, carbides, nitrides
    • C23C16/40Oxides
    • C23C16/405Oxides of refractory metals or yttrium
    • CCHEMISTRY; METALLURGY
    • C23COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
    • C23CCOATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
    • C23C16/00Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes
    • C23C16/44Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes characterised by the method of coating
    • C23C16/455Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes characterised by the method of coating characterised by the method used for introducing gases into reaction chamber or for modifying gas flows in reaction chamber
    • C23C16/45523Pulsed gas flow or change of composition over time
    • C23C16/45525Atomic layer deposition [ALD]
    • C23C16/45527Atomic layer deposition [ALD] characterized by the ALD cycle, e.g. different flows or temperatures during half-reactions, unusual pulsing sequence, use of precursor mixtures or auxiliary reactants or activations
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02107Forming insulating materials on a substrate
    • H01L21/02109Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates
    • H01L21/02112Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer
    • H01L21/02172Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing at least one metal element, e.g. metal oxides, metal nitrides, metal oxynitrides or metal carbides
    • H01L21/02175Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing at least one metal element, e.g. metal oxides, metal nitrides, metal oxynitrides or metal carbides characterised by the metal
    • H01L21/02186Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing at least one metal element, e.g. metal oxides, metal nitrides, metal oxynitrides or metal carbides characterised by the metal the material containing titanium, e.g. TiO2
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02107Forming insulating materials on a substrate
    • H01L21/02225Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer
    • H01L21/0226Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process
    • H01L21/02263Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process deposition from the gas or vapour phase
    • H01L21/02271Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process deposition from the gas or vapour phase deposition by decomposition or reaction of gaseous or vapour phase compounds, i.e. chemical vapour deposition
    • H01L21/0228Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process deposition from the gas or vapour phase deposition by decomposition or reaction of gaseous or vapour phase compounds, i.e. chemical vapour deposition deposition by cyclic CVD, e.g. ALD, ALE, pulsed CVD

Landscapes

  • Engineering & Computer Science (AREA)
  • Chemical & Material Sciences (AREA)
  • Power Engineering (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Computer Hardware Design (AREA)
  • Chemical Kinetics & Catalysis (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Organic Chemistry (AREA)
  • General Chemical & Material Sciences (AREA)
  • Materials Engineering (AREA)
  • Mechanical Engineering (AREA)
  • Metallurgy (AREA)
  • Manufacturing & Machinery (AREA)
  • Inorganic Chemistry (AREA)
  • Semiconductor Memories (AREA)
  • Formation Of Insulating Films (AREA)
  • Chemical Vapour Deposition (AREA)
  • Ceramic Engineering (AREA)

Abstract

本发明公开了一种电容结构,其包含有一第一电极,设于一基材上;一模板层,设于所述第一电极上;一二氧化钛介电层,设于所述模板层上,其中所述二氧化钛介电层仅单纯具有金红石结晶相;以及一第二电极,位于所述二氧化钛介电层上。

Description

具有金红石结晶相二氧化钛介电膜的半导体器件
技术领域
本发明涉及一种半导体器件,尤其涉及一种改良的高介电常数(high-k)介电层,使用这种介电层的电容结构,并例示出其制造方法。
背景技术
随着动态随机存取存储器的金属-绝缘-金属电容的微缩,内存工艺中因此有必要导入高介电常数介电材,例如二氧化钛。已知二氧化钛具有不同的结晶相,其介电常数也不同,其中两种已知的二氧化钛结晶相是锐钛矿(anatase)及金红石(rutile)。由于金红石结晶相的二氧化钛具有比锐钛矿结晶相的二氧化钛更高的介电常数(k>90),因此通常会希望增加金红石结晶相的二氧化钛在电容介电薄膜中的比例。
二氧化钛介电层通常利用原子层沉积(atomic layer deposition,ALD)法形成。然而,在原子层沉积过程中,二氧化钛往往是以锐钛矿结晶相为主。为了要形成具有金红石结晶相及低漏电的二氧化钛介电层,仍需要再以掺质掺杂、后退火(600℃或更高温)处理以及/或结合模板层进行的臭氧原子层沉积才能达到。前述掺质掺杂方法的问题是高成本、低产出率,且不容易控制其分布。前述后退火方法的缺点是额外的热预算及机械应力可能影响晶体管器件。前述的结合模板层进行的臭氧原子层沉积法,其问题在于沉积速率过慢(单一ALD循环约),且可能有刻蚀或氧化下层的风险。
另外一种沉积二氧化钛介电层的作法是利用水基(water-based)原子层沉积法,其在ALD循环中以水蒸气作为氧化剂。这种水基原子层沉积法的沉积速率较前述臭氧原子层沉积法快,因此具有高产出率,然而,以水基原子层沉积法形成的二氧化钛其结晶相是以锐钛矿为主。为了在水基原子层沉积过程中形成金红石结晶相的二氧化钛,必须沉积至少厚达10nm的二氧化钛,或者以相对较高的工艺温度进行。
由上可知,业界目前仍需要改良的方法来沉积高介电常数材料,例如,金红石结晶相的二氧化钛(或简称金红石二氧化钛),且所述方法具有高沉积/成长速率,同时能保持低漏电特性,并且避免上述先前技艺的诸多缺点。
发明内容
根据本发明实施例,本发明提供一种电容结构,包含有一第一电极,设于一基材上;一模板层,设于所述第一电极上;一二氧化钛介电层,设于所述模板层上,其中所述二氧化钛介电层仅单纯具有金红石结晶相;以及一第二电极,位于所述二氧化钛介电层上。所述二氧化钛介电层是以修正后的水基ALD工艺形成。
为让本发明的上述目的、特征及优点能更明显易懂,下文中特举出本发明的优选实施方式,并配合附图作详细说明如下。然而如下的优选实施方式与附图仅供参考与说明用,并非用来对本发明加以限制。
附图说明
图1为依据本发明实施例绘示的部分电容结构的横断面示意图。
图2例示出形成图1中电容结构的流程图。
图3例示出修正后的水基ALD工艺。
图4表示出以修正后的水基ALD形成的二氧化钛的X射线绕射光谱(相对强度对2theta作图),光谱区间为2theta=20至2theta=60之间。
图5表示出以臭氧脉冲/吹净比例20:1进行修正后的水基ALD形成的二氧化钛层的X射线绕射光谱。
其中,附图标记说明如下:
10 基材 100 制造流程
20 电容结构 102 步骤
22 第一电极 104 步骤
23 模板层 106 步骤
24 高介电常数介电层 108 步骤
26 第二电极
具体实施方式
下文中将参照附图说明本发明细节,该些附图中的内容也构成了说明书细节描述的一部份,并且以可实行实施例的特例描述方式来绘示。下文实施例已描述足够的细节使得本领域的一般技术人员得具以实施。当然,也可实行其它的实施例,或是在不悖离文中所述实施例的前提下作出任何结构性、逻辑性、及电性上的改变。因此,下文的细节描述不应被视为是限制,反之,其中所包含的实施例将由随附的权利要求书来加以界定。
图1为依据本发明实施例所绘示的部分电容结构的横断面示意图。如图1所示,电容结构20设于一基材10上,例如硅基材。当然,基材10也可能是其它的半导体基材,在此不设限。电容结构20包含有一第一电极22、一模板层(template layer)23设于第一电极22上、一高介电常数介电层24设于模板层23上,以及一第二电极26设于高介电常数介电层24上。前述第一电极22可以是贵金属材料,例如钌(Ru)。前述模板层23可以是钌、氧化钌(RuO2)、铱(Ir)或氧化铱(IrO2)。前述第一电极22可以利用任何适合的方法形成,例如化学气相沉积(chemical vapor deposition,CVD)法、原子层沉积(atomic layer deposition,ALD)法、物理气相沉积(physical vapor deposition,PVD)法或溅射(sputtering)法。前述第二电极26可以是贵金属材料或其它合适的导电材料,例如金属氧化物或金属氮化物。举例来说,第二电极26可以是钌、铂(Pt)、铱、氧化钌、氧化铱、氮化钛(TiN)、氮化钽(TaN)、氮化钨(WN)等等。
根据本发明实施例,前述直接沉积在模板层23上的高介电常数介电层24为金红石结晶相的二氧化钛,且为单纯的金红石结晶相,仅存有金红石结晶相。换句话说,从X射线绕射(x-ray diffraction)光谱中基本上是看不到相对于锐钛矿二氧化钛的信号。根据本发明实施例,高介电常数介电层24的厚度约为8nm或更薄。根据本发明实施例,高介电常数介电层24中不掺杂如铝等杂质。
请参阅图2和图3,并同时参考图1,图2例示出形成电容结构20的流程图,图3例示出修正后的水基ALD工艺。如图2所示,工艺流程100包括四个连续的主要步骤102~108。在步骤102中,第一电极22,例如钌或氮化钛,被沉积到基材10上。接着进行步骤104,于第一电极22上形成一模板层23。接着在步骤106,进行一修正后的水基原子层沉积(modifiedwater-based ALD)法,于模板层23上直接沉积一金红石结晶相二氧化钛层24。根据本发明实施例,前述金红石结晶相二氧化钛层24的厚度约为8nm或更薄。最后,在步骤108中,于金红石结晶相二氧化钛层24形成一第二电极26。在步骤106之后,不需要进行任何的后退火处理或热处理。
根据本发明实施例,前述修正后的水基原子层沉积法可包含有多个钛ALD循环,而各个钛ALD循环包含有:(1)于一反应腔供应一钛先驱物(钛脉冲);(2)以惰性气体吹净所述反应腔;(3)于所述反应腔供应水蒸气(水脉冲);以及(4)再次以惰性气体吹净所述反应腔。根据本发明实施例,反应温度可以介于150℃至450℃之间,例如285℃。当钛先驱物,例如四氯化钛(TiCl4)供应到反应腔时,部分的钛先驱物被吸附到基材10的显露表面。吹净气体,例如氩气,接着将未被吸附的钛前趋物移除,然后使水蒸气(作为氧化剂)与吸附到基材10表面的钛先驱物反应,如此形成单一原子层的二氧化钛。
如图3所示,根据本发明实施例,前述修正后的水基ALD工艺可以包含有多个阶段。例如,在第一阶段中,前述的ALD循环可以重复进行n次,如此先沉积一第一二氧化钛层在模板层23上。举例来说,n可以是介于5到80的整数。根据本发明实施例,最初沉积在模版层23上的第一二氧化钛层可以是锐钛矿二氧化钛。第一阶段结束,然后继续进行臭氧脉冲及吹净步骤,将最初沉积在模板层23上的整层第一二氧化钛层从锐钛矿二氧化钛转换成金红石二氧化钛。前述臭氧脉冲可持续进行约5秒钟或更长。然后,在第二阶段中,前述的ALD循环可以继续重复进行m次,如此再沉积一第二二氧化钛层在已转换成金红石结晶相的第一二氧化钛层上。举例来说,m可以是介于5到80的整数,而n可以不等于m。同样的,第二阶段结束,然后继续进行臭氧脉冲及吹净步骤,将整层第二二氧化钛层转换成金红石二氧化钛。根据本发明实施例,前述钛ALD循环次数比臭氧脉冲及吹净步骤的比例(或简称臭氧脉冲/吹净比例),可以介于80:1至5:1之间。
图4表示出以修正后的水基ALD形成的二氧化钛的X射线绕射光谱(相对强度对2theta作图),光谱区间为2theta=20至2theta=60间。如图4所示,由不同的臭氧脉冲/吹净比例,介于50:1至10:1,形成的二氧化钛层,在2theta=27附近有明显的信号峰值,证实了居间的臭氧脉冲实质上帮助了金红石结晶相二氧化钛的晶化。图4中同时表示出未进行臭氧脉冲的结果,此时8nm厚的水基ALD二氧化钛层为非晶相(amorphous)。图5表示出以臭氧脉冲/吹净谱,其中臭氧脉冲进行的时间有所不同,分别是10秒、20秒及40秒。
以上所述仅为本发明的优选实施例而已,并不用于限制本发明,对于本领域的技术人员来说,本发明可以有各种更改和变化。凡在本发明的精神和原则之内,所作的任何修改、等同替换、改进等,均应包含在本发明的保护范围之内。

Claims (3)

1.一种形成电容结构的方法,其特征在于,包含:
在一基底上形成一第一电极;
在所述第一电极上形成一模版层;
操作一第一原子层沉积阶段,包含5到80次的原子层沉积循环,以水蒸气作为氧化剂,在所述模版层上沉积一第一二氧化钛层;
操作一臭氧脉冲及一吹除步骤,将整层所述第一二氧化钛层转换成金红石结晶相,形成一第一金红石二氧化钛层;
操作一第二原子层沉积阶段,包含5到80次的所述原子层沉积循环,在所述第一金红石二氧化钛层上沉积一第二二氧化钛层;以及
操作所述臭氧脉冲及所述吹除步骤,将整层所述第二二氧化钛层转换成金红石结晶相,在所述第一金红石二氧化钛层上形成一第二金红石二氧化钛层。
2.如权利要求1所述的形成电容结构的方法,其特征在于,所述原子层沉积循环依序包含:
于一反应腔供应一钛前趋物;
以惰性气体吹除所述反应腔;
于所述反应腔供应所述水蒸气;以及
再次以所述惰性气体吹除所述反应腔。
3.如权利要求2所述的形成电容结构的方法,其特征在于,各所述原子层沉积循环是于150℃至450℃的反应温度下进行。
CN201310356172.8A 2012-11-12 2013-08-15 具有金红石结晶相二氧化钛介电膜的半导体器件 Active CN103811481B (zh)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US13/674,929 2012-11-12
US13/674,929 US20140131835A1 (en) 2012-11-12 2012-11-12 Semiconductor device with rutile titanium oxide dielectric film

Publications (2)

Publication Number Publication Date
CN103811481A CN103811481A (zh) 2014-05-21
CN103811481B true CN103811481B (zh) 2016-12-28

Family

ID=50680922

Family Applications (1)

Application Number Title Priority Date Filing Date
CN201310356172.8A Active CN103811481B (zh) 2012-11-12 2013-08-15 具有金红石结晶相二氧化钛介电膜的半导体器件

Country Status (3)

Country Link
US (2) US20140131835A1 (zh)
CN (1) CN103811481B (zh)
TW (1) TWI553812B (zh)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20140185182A1 (en) * 2013-01-02 2014-07-03 Nanya Technology Corp. Semiconductor device with rutile titanium oxide dielectric film

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN1289724A (zh) * 2000-10-16 2001-04-04 南京大学 由四氯化钛常温水解合成大比表面积纳米金红石型二氧化钛的方法
CN1988078A (zh) * 2005-12-22 2007-06-27 财团法人工业技术研究院 金属-绝缘体-金属电容器

Family Cites Families (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100717768B1 (ko) * 2005-08-30 2007-05-11 주식회사 하이닉스반도체 반도체 소자의 캐패시터 및 그 형성방법과, 비휘발성메모리 소자 및 그 제조방법
US20090065896A1 (en) * 2007-09-07 2009-03-12 Seoul National University Industry Foundation CAPACITOR HAVING Ru ELECTRODE AND TiO2 DIELECTRIC LAYER FOR SEMICONDUCTOR DEVICE AND METHOD OF FABRICATING THE SAME
JP2010192520A (ja) * 2009-02-16 2010-09-02 Elpida Memory Inc 半導体装置の製造方法
JP5647792B2 (ja) * 2009-04-01 2015-01-07 ピーエスフォー ルクスコ エスエイアールエルPS4 Luxco S.a.r.l. キャパシタ用容量絶縁膜の製造方法
CN101859645A (zh) * 2009-04-09 2010-10-13 王永军 一种大功率的超级电容动力电池
US7968452B2 (en) * 2009-06-30 2011-06-28 Intermolecular, Inc. Titanium-based high-K dielectric films
EP2434529B1 (en) * 2010-09-28 2020-02-12 IMEC vzw Metal-insulator-metal capacitor for use in semiconductor devices and manufacuring method therfor
US8609553B2 (en) * 2011-02-07 2013-12-17 Micron Technology, Inc. Methods of forming rutile titanium dioxide and associated methods of forming semiconductor structures

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN1289724A (zh) * 2000-10-16 2001-04-04 南京大学 由四氯化钛常温水解合成大比表面积纳米金红石型二氧化钛的方法
CN1988078A (zh) * 2005-12-22 2007-06-27 财团法人工业技术研究院 金属-绝缘体-金属电容器

Also Published As

Publication number Publication date
US20140131835A1 (en) 2014-05-15
US9202860B2 (en) 2015-12-01
US20140134821A1 (en) 2014-05-15
CN103811481A (zh) 2014-05-21
TWI553812B (zh) 2016-10-11
TW201419480A (zh) 2014-05-16

Similar Documents

Publication Publication Date Title
US9646820B2 (en) Methods for forming conductive titanium oxide thin films
CN101050522B (zh) 形成四方氧化锆层的方法及制造具有该层的电容器的方法
JP5647792B2 (ja) キャパシタ用容量絶縁膜の製造方法
US8592294B2 (en) High temperature atomic layer deposition of dielectric oxides
JP5094057B2 (ja) 半導体素子のキャパシタ製造方法
TW200816314A (en) ALD of Zr-substituted BaTio3 films as gate dielectrics
JP2011060825A (ja) 半導体装置及びその製造方法
CN103348455A (zh) 形成金红石二氧化钛的方法以及形成半导体结构的相关方法
TWI491005B (zh) 具有金紅石結晶相二氧化鈦介電膜之半導體元件的製作方法
TW544915B (en) A capacitor for semiconductor devices and a method of fabricating such capacitors
JP2001203339A (ja) 半導体素子のキャパシタ製造方法
CN103811481B (zh) 具有金红石结晶相二氧化钛介电膜的半导体器件
TW466750B (en) Semiconductor device and production thereof
Kukli et al. Atomic layer deposition rate, phase composition and performance of HfO2 films on noble metal and alkoxylated silicon substrates
TW201044426A (en) Capacitor and process for manufacturing capacitor
KR100780953B1 (ko) 하부 전극의 제조방법 및 이를 포함하는 캐패시터의제조방법
KR20080038713A (ko) 원자층 증착을 이용하는 커패시터 제조 방법
CN111900150B (zh) 电容及其制备方法、应用
KR101060771B1 (ko) 반도체 소자의 전극 제조 방법
KR100373160B1 (ko) 반도체 소자의 캐패시터 제조방법
TW525290B (en) High dielectric constant capacitor
CN114678283A (zh) 电容器电解质膜及其制备方法
KR20060008030A (ko) 반도체 소자의 캐패시터 형성방법
Bhat et al. Huang et al.
KR20100138024A (ko) 반도체 메모리소자의 커패시터 및 그 제조방법

Legal Events

Date Code Title Description
C06 Publication
PB01 Publication
C10 Entry into substantive examination
SE01 Entry into force of request for substantive examination
C14 Grant of patent or utility model
GR01 Patent grant