CN103760727B - 薄膜晶体管阵列基板、液晶显示面板及液晶显示面板的修复方法 - Google Patents

薄膜晶体管阵列基板、液晶显示面板及液晶显示面板的修复方法 Download PDF

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CN103760727B
CN103760727B CN201310754221.3A CN201310754221A CN103760727B CN 103760727 B CN103760727 B CN 103760727B CN 201310754221 A CN201310754221 A CN 201310754221A CN 103760727 B CN103760727 B CN 103760727B
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film transistor
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CN103760727A (zh
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阙祥灯
蓝世才
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TCL China Star Optoelectronics Technology Co Ltd
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Shenzhen China Star Optoelectronics Technology Co Ltd
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Abstract

本发明实施例公开了一种薄膜晶体管阵列基板，包括均朝第一方向延伸的多条数据线、均朝与第一方向垂直的第二方向延伸的多条扫描线、由数据线及扫描线定义的多个像素及具主干线及生长线的公共电极。主干线与扫描线平行，生长线自主干线垂直延伸。每个像素包括像素电极、薄膜晶体管、部分主干线及两条生长线。薄膜晶体管与像素电极、数据线及扫描线均电性连接。两条生长线的投影与像素电极有交叠。每个像素均设置有与生长线有交叠的共用区域。共用区域用于被打穿以使像素电极与生长线电性连接，及用于被打穿后与在第二方向上相邻的另一被打穿的共用区域电性连接以使与两个共用区域对应的生长线电性连接。另，本发明还提供液晶显示面板及其修复方法。

Description

薄膜晶体管阵列基板、液晶显示面板及液晶显示面板的修复方法
技术领域
本发明涉及液晶显示器领域，尤其涉及一种薄膜晶体管(ThinFilmTransistorArray，TFT)阵列基板、一种具有该薄膜晶体管阵列基板的液晶显示面板及一种液晶显示面板的修复方法。
背景技术
液晶显示面板一般采用主动式薄膜晶体管阵列进行驱动，薄膜晶体管阵列基板上的每个像素需要连接纵横交错的扫描线及数据线进行选中及输入显示电压的操作。因现有的薄膜晶体管阵列基板的像素多达几百万，所需要的扫描线及数据线也近万条。在制作薄膜晶体管阵列基板时，最终制作完成的薄膜晶体管阵列基板难免会存在点缺陷或线缺陷。目前，业界对点缺陷的修复通常的做法是切断TFT给入透明导电薄膜(铟锡金属氧化物)的信号，同时将透明导电薄膜和公共电极线(comline)短路，从而将亮点处修复成常暗状态，此过程需要生长公共电极线。业界对线缺陷的修复通常是采用修补配线的方式来完成，其中也需要生长公共电极线。然而，一旦薄膜晶体管阵列基板中同时存在上述的点缺陷及线缺陷，业界通常对点缺陷的修复及线缺陷的修复都是独立进行，不仅布线结构复杂，而且所需要的生长的线的距离也较长，如此便会降低液晶显示面板的开口率。
因此，有必要提供能够解决上述问题的薄膜晶体管阵列基板、液晶显示面板及液晶显示面板的修复方法。
发明内容
为了解决上述技术问题，本发明提供了一种薄膜晶体管阵列基板，包括多条彼此相互平行并朝第一方向延伸的数据线、多条彼此相互平行并朝与第一方向垂直的第二方向延伸的扫描线、由该多条数据线及该多条扫描线定义的多个像素及具有一条主干线及多条生长线的公共电极。该主干线与该多条扫描线平行，该生长线自该主干线垂直延伸。每个像素包括一个像素电极、一个薄膜晶体管、部分主干线以及两条生长线。该薄膜晶体管与该像素电极、对应的数据线及对应的扫描线均电性连接。该两条生长线的投影与该像素电极有交叠。每个像素均设置有共用区域，该共用区域与该生长线有交叠。该共用区域用于被打穿以使该像素电极与对应的生长线电性连接，及用于被打穿后与在该第二方向上相邻的另一被打穿的共用区域电性连接以使与该两个共用区域对应的生长线电性连接。
其中，每个像素内的两条生长线均自对应的主干线相对的两端垂直延伸，每条生长线均与在该第一方向上相邻的像素内的最邻近的生长线处于同一直线上。
其中，该薄膜晶体管阵列基板进一步包括屏蔽金属，该屏蔽金属包括多个第一屏蔽区、多个第二屏蔽区及该多个共用区域，该多个第一屏蔽区与多条直线上的生长线对应并与数据线间隔，该多个第二屏蔽区与该多个像素一一对应，并分别位于对应像素内的像素电极所在区域，每个第二屏蔽区均通过共用区域与两端的第一屏蔽区连接。
其中，每个像素内的第二屏蔽区包括纵横交错的两段或者是包括沿第二方向的一段。
其中，该共用区域为该主干线上的一部分，该两条生长线自该共用区域相背的两侧垂直延伸。
其中，该共用区域的形状为圆形、三角形、四边形或其他多边形。
其中，该像素电极由透明导电薄膜形成。
其中，该多条扫描线是以第一金属层制成，用来传输扫描信号，该公共电极是以第一金属层制成，该多条数据线是以第二金属层制成，用来传输数据信号。
本发明还提供了一种液晶显示面板，包括如上所述之薄膜晶体管阵列基板。
本发明还提供了一种液晶显示面板的修复方法，该液晶面板的修复方法用于修复如上所述的薄膜晶体管阵列基板上的点缺陷及线缺陷。该液晶面板的修复方法包括：当像素存在点缺陷时，切断该像素中的薄膜晶体管对该像素中的像素电极的信号，并在该像素内的共用区域上通过激光打孔焊接的方式使该像素电极与与其交叠的生长线短路；及当主干线在与数据线相交叠处存在断线缺陷时，在该主干线沿着该第二方向所在两个像素内的两个共用区域上均通过激光打孔并在孔内镀金属及在两个孔之间架上金属线以使与该两个共用区域对应的生长线电性连接。
本发明提供的薄膜晶体管阵列基板、液晶显示面板及液晶面板修复方法均设置有公用区域，并利用该共用区域同时完成点缺陷的修复及线缺陷的修复，不仅布线结构简单，而且其中用到的生长线较分别修复点缺陷及线缺陷时用到的生长线短，如此有效降低液晶显示面板的开口率。
附图说明
为了更清楚地说明本发明实施例或现有技术中的技术方案，下面将对实施例或现有技术描述中所需要使用的附图作简单地介绍，显而易见地，下面描述中的附图仅仅是本发明的一些实施例，对于本领域普通技术人员来讲，在不付出创造性劳动性的前提下，还可以根据这些附图获得其他的附图。
图1是本发明第一实施例所提供的薄膜晶体管阵列基板的示意图；
图2是本发明第三实施例所提供的薄膜晶体管阵列基板的示意图。
具体实施方式
下面将结合本发明实施例中的附图，对本发明实施例中的技术方案进行清楚、完整地描述，显然，所描述的实施例仅仅是本发明一部分实施例，而不是全部的实施例。基于本发明中的实施例，本领域普通技术人员在没有作出创造性劳动前提下所获得的所有其他实施例，都属于本发明保护的范围。
第一实施例
请参阅图1，本发明第一实施例所提供的薄膜晶体管阵列基板100包括纵横交错的多条数据线及多条扫描线。为了便于解释，本实施例仅以该薄膜晶体管阵列基板100包括三条数据线G1、G2及G3及两条扫描线S1及S2为例来说明。该三条数据线G1、G2及G3彼此相互平行并朝第一方向(水平方向)延伸，该两条扫描线S1及S2彼此相互平行并朝第二方向(垂直方向)延伸。该薄膜晶体管阵列基板100进一步包括一个公共电极10、由该三条数据线G1、G2及G3及该两条扫描线S1及S2彼此纵横交错定义的四个像素P11、P12、P21及P22、以及一个屏蔽金属30。其中，该两条扫描线S1及S2是以第一金属层制成，用来传输扫描信号。该公共电极10也是以第一金属层制成。该三条数据线G1、G2及G3是以第二金属层制成，用来传输数据信号。该第一金属层及该第二金属层之间有氮化硅绝缘层隔离。
该公共电极10包括一条主干线12及八条生长线14。该主干线12位于该两条扫描线S1及S2之间并与该两条扫描线S1及S2平行。即，该主干线12也朝第二方向延伸。该四个像素P11、P12、P21及P22均匀分布在该主干线12相背的两侧。该八条生长线14均匀分布在该主干线12相背的两侧，且各像素P11、P12、P21及P22的区域中均具有两条生长线14。
各像素P11、P12、P21及P22均包括一个像素电极22、一个薄膜晶体管24、部分主干线12及两条生长线14。本实施例中，该像素电极22由透明导电薄膜形成，具体材料为铟锡金属氧化物。该薄膜晶体管24的栅极与该扫描线S2(仅以像素P12为例)电性连接，源极与该数据线G1(仅以像素P12为例)电性连接，漏极与该像素电极22电性连接。该两条生长线14均自对应的部分主干线12相对的两端垂直延伸，且每条生长线14均与在该第一方向上相邻的像素P11内的最邻近的生长线14处于同一直线上，即该八条生长线14在该第一方向上两两共形成三条直线。该两条生长线14的投影与该像素电极22均有交叠。
该屏蔽金属30包括三个第一屏蔽区32、四个第二屏蔽区34及八个共用区域36。该三个第一屏蔽区32的投影与该三条直线上的生长线14有交叠，且该三个第一屏蔽区32分别与该三条数据线G1、G2及G3均相邻且间隔。该四个第二屏蔽区34与该四个像素P11、P12、P21及P22一一对应，并分别位于对应像素P11、P12、P21及P22的像素电极22所在区域。其中，像素P12及P22中的第二屏蔽区34包括纵横交错的两段，而像素P11及P21中的第二屏蔽区34仅包括沿第二方向的一段。各像素P11、P12、P21及P22中均分布有两个共用区域36，且该两个共用区域36分别自各像素P11、P12、P21及P22区域内的两个第一屏蔽区32延伸。每个第二屏蔽区34均通过该两个共用区域36与两端的第一屏蔽区32连接。本实施例中，该共用区域36为三角形。
可以理解，该共用区域36并不局限于本实施例中为三角形，还可以是圆形、四边形或其他多边形，规则或不规则的形状均可，该共用区域36的大小也没有局限，只要满足每个第二屏蔽区34均能通过该两个共用区域36与两端的第一屏蔽区32连接即可。另外，在其他实施例中，各像素P11、P12、P21及P22中的第二屏蔽区34可全部为包括纵横交错的两段，也可全部为仅包括沿第二方向的一段，还可以是上述两种结构的任意组合。
第二实施例
一种用于修复如第一实施例所述的薄膜晶体管阵列基板100上的点缺陷及线缺陷的液晶面板修复方法包括：
当像素P12内存在点缺陷时，即P12为亮点时，则切断该像素P12中的薄膜晶体管24对该像素P12中的像素电极22的信号，并在该像素P12内的其中一个共用区域36，例如B1处的共用区域36上通过激光打孔焊接的方式使该像素电极22与与其交叠的生长线14短路，从而将P12内的亮点修复成常暗状态。
当主干线12在与数据线G2相交叠处(A处)存在断线时，在该主干线12沿着该第二方向所在的两个像素P12及P22内的两个共用区域36(即B1处的共用区域36及B2处的共用区域36)上均通过激光打孔，并在两个孔内镀金属及在两个孔之间架上金属线以使与该两个共用区域36对应的生长线14电性连接。
当主干线12与数据线G2相交叠处(A处)的氮化硅绝缘破洞造成短路，或者是当该相交叠处(A处)的主干线12与数据线G2被静电击伤而造成短路时，则先将该相交叠处(A处)的主干线12切断以避免该相交叠处(A处)的主干线12与数据线G2短路，然后在该主干线12沿着该第二方向所在的两个像素P12及P22内的两个共用区域36(即B1处的共用区域36及B2处的共用区域36)上均通过激光打孔，最后在两个孔内镀金属及在两个孔之间架上金属线以使与该两个共用区域36对应的生长线14电性连接。
第三实施例
请参阅图2，本发明第三实施例所提供的薄膜晶体管阵列基板200包括相互纵横交错的多条数据线及多条扫描线。为了便于解释，本实施例仅以该薄膜晶体管阵列基板200包括三条数据线G1、G2及G3及两条扫描线S1及S2为例来说明。该三条数据线G1、G2及G3彼此相互平行并朝第一方向(垂直方向)延伸，该两条扫描线S1及S2彼此相互平行并朝第二方向(水平方向)延伸。该薄膜晶体管阵列基板100进一步包括一个公共电极40、由该三条数据线G1、G2及G3及该两条扫描线S1及S2彼此纵横交错定义的两个像素P11及P12。其中，该两条扫描线S1及S2是以第一金属层制成，用来传输扫描信号。该公共电极40也是以第一金属层制成。该三条数据线G1、G2及G3是以第二金属层制成，用来传输数据信号。该第一金属层及该第二金属层之间有氮化硅绝缘层隔离。
该公共电极40包括一条主干线42及四条生长线44。该主干线42位于该两条扫描线S1及S2之间并与该两条扫描线S1及S2平行。即，该主干线42也朝第二方向延伸。该主干线42穿过该两个像素P11及P12。该四条生长线44均匀分布在该主干线42相背的两侧，且各像素P11及P12的区域中均具有两条生长线44。
各像素P11及P12均包括一个像素电极52及一个薄膜晶体管54、部分主干线42及两条生长线44。本实施例中，该像素电极52由透明导电薄膜形成，具体材料为铟锡金属氧化物。该薄膜晶体管54的栅极与该扫描线S2(仅以像素P12为例)电性连接，源极与该数据线G2(仅以像素P12为例)电性连接，漏极与该像素电极52电性连接。该部分主干线42上定义一个共用区域A，该两条生长线44均自对该共用区域A(三角形所示区域)相背的两侧垂直延伸。该两条生长线44的投影与该像素电极52均有交叠。像素P11的结构与像素P12的结构完全相同，在此不再赘述。
可以理解，该共用区域A并不局限于本实施例中为三角形，还可以是圆形、四边形或其他多边形，规则或不规则的形状均可，该共用区域A的大小也没有局限。
第四实施例
一种用于修复如第三实施例所述的薄膜晶体管阵列基板200上的点缺陷及线缺陷的液晶面板修复方法包括：
当像素P12内存在点缺陷时，即P12为亮点时，则切断该像素P12中的薄膜晶体管54对该像素P12中的像素电极52的信号，并在该像素P12内的共用区域A上通过激光打孔焊接的方式使该像素电极52与与其交叠的主干线42短路，从而将P12内的亮点修复成常暗状态。
当主干线42在像素P11及P12中两个共用区域A之间存在断线时，在该两个共用区域A上均通过激光打孔，并在两个孔内镀金属及在两个孔之间架上金属线以使与该两个共用区域A对应的生长线44电性连接。
当主干线42与数据线G2相交叠处(C处)的氮化硅绝缘破洞造成短路，或者是当该相交叠处(C处)的主干线42与数据线G2被静电击伤而造成短路时，则先将该相交叠处(C处)的主干线42切断以避免该相交叠处(C处)的主干线42与数据线G2短路，然后在该两个共用区域A上均通过激光打孔，并在两个孔内镀金属及在两个孔之间架上金属线以使与该两个共用区域A对应的生长线44电性连接。
此外，本发明还提供一种液晶显示面板，包括如第一实施例中所述的薄膜晶体管阵列基板100或者如第三实施例中所述的薄膜晶体管阵列基板200，在此不做详述。
本发明提供的薄膜晶体管阵列基板100及200、液晶显示面板及液晶面板修复方法均设置有一个公用区域36或公用区域A，并利用该共用区域36或公用区域A同时完成点缺陷的修复及线缺陷的修复，不仅布线结构简单，而且其中用到的生长线较独立完成两种缺陷的修复时用到的生长线短，如此有效降低液晶显示面板的开口率。
以上所揭露的仅为本发明一种较佳实施例而已，当然不能以此来限定本发明之权利范围，因此依本发明权利要求所作的等同变化，仍属本发明所涵盖的范围。

Claims (7)

1.一种薄膜晶体管阵列基板，包括多条彼此相互平行并朝第一方向延伸的数据线、多条彼此相互平行并朝与第一方向垂直的第二方向延伸的扫描线、由该多条数据线及该多条扫描线定义的多个像素及具有一条主干线及多条生长线的公共电极，其特征在于，该主干线与该多条扫描线平行，该生长线自该主干线垂直延伸，每个像素包括一个像素电极、一个薄膜晶体管、部分主干线以及两条生长线，该薄膜晶体管与该像素电极、对应的数据线及对应的扫描线均电性连接，该两条生长线的投影与该像素电极有交叠，每个像素均设置有共用区域，该共用区域与该生长线有交叠，该共用区域用于被打穿以使该像素电极与对应的生长线电性连接，及用于被打穿后与在该第二方向上相邻的另一被打穿的共用区域电性连接以使与该两个共用区域对应的生长线电性连接，每个像素内的两条生长线均自对应的主干线相对的两端垂直延伸，每条生长线均与在该第一方向上相邻的像素内的最邻近的生长线处于同一直线上，该薄膜晶体管阵列基板进一步包括屏蔽金属，该屏蔽金属包括多个第一屏蔽区、多个第二屏蔽区及该多个共用区域，该多个第一屏蔽区与多条直线上的生长线对应并与数据线间隔，该多个第二屏蔽区与该多个像素一一对应，并分别位于对应像素内的像素电极所在区域，每个第二屏蔽区均通过共用区域与两端的第一屏蔽区连接。
2.如权利要求1所述的薄膜晶体管阵列基板，其特征在于，每个像素内的第二屏蔽区包括纵横交错的两段或者是包括沿第二方向的一段。
3.如权利要求1所述的薄膜晶体管阵列基板，其特征在于，该共用区域的形状为圆形、三角形、四边形或其他多边形。
4.如权利要求1所述的薄膜晶体管阵列基板，其特征在于，该像素电极由透明导电薄膜形成。
5.如权利要求1所述的薄膜晶体管阵列基板，其特征在于，该多条扫描线是以第一金属层制成，用来传输扫描信号，该公共电极是以第一金属层制成，该多条数据线是以第二金属层制成，用来传输数据信号。
6.一种液晶显示面板，包括如权利要求1-5中任意一项所述之薄膜晶体管阵列基板。
7.一种液晶显示面板的修复方法，该液晶显示面板的修复方法用于修复如权利要求1所述的薄膜晶体管阵列基板上的点缺陷及线缺陷，该液晶显示面板的修复方法包括：
当像素存在点缺陷时，切断该像素中的薄膜晶体管对该像素中的像素电极的信号，并在该像素内的共用区域上通过激光打孔焊接的方式使该像素电极与与其交叠的生长线短路；及
当主干线在与数据线相交叠处存在断线缺陷时，在该主干线沿着该第二方向所在两个像素内的两个共用区域上均通过激光打孔并在孔内镀金属及在两个孔之间架上金属线以使与该两个共用区域对应的生长线电性连接。
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