CN103745990A - Depletion algan/gan mishemt high voltage device and manufacturing method thereof - Google Patents

Depletion algan/gan mishemt high voltage device and manufacturing method thereof Download PDF

Info

Publication number
CN103745990A
CN103745990A CN201410029319.7A CN201410029319A CN103745990A CN 103745990 A CN103745990 A CN 103745990A CN 201410029319 A CN201410029319 A CN 201410029319A CN 103745990 A CN103745990 A CN 103745990A
Authority
CN
China
Prior art keywords
algan
gan
layer
grid
depletion
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
CN201410029319.7A
Other languages
Chinese (zh)
Other versions
CN103745990B (en
Inventor
冯倩
杜锴
杜鸣
张春福
梁日泉
郝跃
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Xidian University
Original Assignee
Xidian University
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Xidian University filed Critical Xidian University
Priority to CN201410029319.7A priority Critical patent/CN103745990B/en
Publication of CN103745990A publication Critical patent/CN103745990A/en
Application granted granted Critical
Publication of CN103745990B publication Critical patent/CN103745990B/en
Expired - Fee Related legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Images

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76Unipolar devices, e.g. field effect transistors
    • H01L29/772Field effect transistors
    • H01L29/778Field effect transistors with two-dimensional charge carrier gas channel, e.g. HEMT ; with two-dimensional charge-carrier layer formed at a heterojunction interface
    • H01L29/7786Field effect transistors with two-dimensional charge carrier gas channel, e.g. HEMT ; with two-dimensional charge-carrier layer formed at a heterojunction interface with direct single heterostructure, i.e. with wide bandgap layer formed on top of active layer, e.g. direct single heterostructure MIS-like HEMT
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/02Semiconductor bodies ; Multistep manufacturing processes therefor
    • H01L29/06Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
    • H01L29/0603Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions
    • H01L29/0607Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions for preventing surface leakage or controlling electric field concentration
    • H01L29/0611Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions for preventing surface leakage or controlling electric field concentration for increasing or controlling the breakdown voltage of reverse biased devices
    • H01L29/0615Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions for preventing surface leakage or controlling electric field concentration for increasing or controlling the breakdown voltage of reverse biased devices by the doping profile or the shape or the arrangement of the PN junction, or with supplementary regions, e.g. junction termination extension [JTE]
    • H01L29/063Reduced surface field [RESURF] pn-junction structures
    • H01L29/0634Multiple reduced surface field (multi-RESURF) structures, e.g. double RESURF, charge compensation, cool, superjunction (SJ), 3D-RESURF, composite buffer (CB) structures
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/40Electrodes ; Multistep manufacturing processes therefor
    • H01L29/41Electrodes ; Multistep manufacturing processes therefor characterised by their shape, relative sizes or dispositions
    • H01L29/423Electrodes ; Multistep manufacturing processes therefor characterised by their shape, relative sizes or dispositions not carrying the current to be rectified, amplified or switched
    • H01L29/42312Gate electrodes for field effect devices
    • H01L29/42316Gate electrodes for field effect devices for field-effect transistors
    • H01L29/4232Gate electrodes for field effect devices for field-effect transistors with insulated gate
    • H01L29/42356Disposition, e.g. buried gate electrode
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/66007Multistep manufacturing processes
    • H01L29/66075Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
    • H01L29/66227Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
    • H01L29/66409Unipolar field-effect transistors
    • H01L29/66446Unipolar field-effect transistors with an active layer made of a group 13/15 material, e.g. group 13/15 velocity modulation transistor [VMT], group 13/15 negative resistance FET [NERFET]
    • H01L29/66462Unipolar field-effect transistors with an active layer made of a group 13/15 material, e.g. group 13/15 velocity modulation transistor [VMT], group 13/15 negative resistance FET [NERFET] with a heterojunction interface channel or gate, e.g. HFET, HIGFET, SISFET, HJFET, HEMT

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Ceramic Engineering (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Manufacturing & Machinery (AREA)
  • Chemical & Material Sciences (AREA)
  • Composite Materials (AREA)
  • Junction Field-Effect Transistors (AREA)

Abstract

The invention discloses a depletion AlGaN/GaN MISHEMT high voltage device and a manufacturing method thereof. The device sequentially comprises a substrate, a GaN buffer layer, an intrinsic AlGaN (or GaN) channel layer, an AlN isolated layer and an AlGaN barrier layer from bottom to top; the AlGaN barrier layer is provided with a source, a grid and a drain, and an insulating medium layer is arranged between the grid and the AlGaN barrier layer; a linear AlGaN layer, a P-type GaN (or InGaN) epitaxial layer and a base are sequentially extended on the AlGaN barrier layer between the grid and the drain. The depletion AlGaN/GaN MISHEMT high voltage device and the manufacturing method have the advantages that when the device is switched on, the concentration of 2-dimensional electron gas in a first area and a second area between the grid and the drain is increased, and resistance is reduced; when the device is switched off, the concentration of the 2-dimensional electron gas in the first area is reduced, the concentration of the 2-dimensional electron gas in the second area is the same as that when the device is switched on, the width of a depletion area of the device is increased, electric field distribution is changed, and the breakdown voltage of the device is improved; an insulated gate structure prevents the grid from leaking current, and the performance of the device is improved.

Description

Depletion-mode AlGaN/GaN MISHEMT high tension apparatus and preparation method thereof
Technical field
The present invention relates to a kind of high tension apparatus and preparation method thereof, be specifically related to high tension apparatus of a kind of depletion-mode AlGaN/GaN high pressure, low on-resistance and preparation method thereof, the AlGaN/GaN MISHEMT High Electron Mobility Transistor that can be used for making high pressure low on-resistance, belongs to microelectronics technology.
Background technology
Take in recent years that the third generation broad stopband gap semiconductor that SiC and GaN be representative is large with its energy gap, breakdown electric field is high, thermal conductivity is high, saturated electrons speed is large and the characteristic such as heterojunction boundary two-dimensional electron gas height, be subject to extensive concern.In theory, utilize the devices such as high electron mobility transistor (HEMT) that these materials make, LED, laser diode LD to there is obvious advantageous characteristic than existing device, therefore researcher has carried out extensive and deep research to it both at home and abroad in the last few years, and has obtained the achievement in research attracting people's attention.
AlGaN/GaN heterojunction high electron mobility transistor (HEMT) is demonstrating advantageous advantage aspect high-temperature device and HIGH-POWERED MICROWAVES device, and pursuit device high-frequency, high pressure, high power have attracted numerous research.In recent years, make the another study hotspot that higher frequency high pressure AlGaN/GaN HEMT becomes concern.Due to after AlGaN/GaN heterojunction grown, just there are a large amount of two-dimensional electron gas 2DEG in heterojunction boundary, and its mobility is very high, so we can obtain higher device frequency characteristic.Aspect raising AlGaN/GaN heterojunction electron mobility transistor puncture voltage, people have carried out a large amount of research, find that puncturing of AlGaN/GaN HEMT device mainly occurs in grid by drain terminal, therefore to improve the puncture voltage of device, must make the electric field redistribution in grid leak region, especially reduce grid by the electric field of drain terminal, for this reason, people have proposed to adopt the method for field plate structure:
1. adopt field plate structure.Referring to Yuji Ando, Akio Wakejima, the Novel AlGaN/GaN dual-field-plate FET with high gain of Yasuhiro Okamoto etc., increased linearity and stability, IEDM2005, pp.576-579,2005(two field plate field-effect transistors with high-gain, high linearity and stability).In AlGaN/GaN HEMT device, adopt grid field plate and source field plate structure simultaneously, the puncture voltage of device is brought up to the 250V adopting two field plates from the 125V of independent employing grid field plate, and reduced gate leakage capacitance, improved the linearity and the stability of device.
2. adopt super-junction structures.Referring to Akira Nakajima, Yasunobu Sumida, GaN based super heterojunction field effect transistors using the polarization junction concept(super junction field effect transistor based on GaN that utilizes polarization knot of Mahesh H).In this device architecture, have 2DEG and 2DEH simultaneously, when grid forward bias, there is not any variation in the concentration of 2DEG, therefore the conducting resistance of device can not increase, when grid reverse bias, 2DEG in raceway groove can exhaust due to electric discharge, thereby has improved the puncture voltage (being increased to 560V from 110V) of device, and conducting resistance is 6.1m Ω cm 2.
Yet all there is the weak point that conducting resistance is larger in the high tension apparatus with above-mentioned two kinds of structures.
Summary of the invention
For solving the deficiencies in the prior art, the object of the present invention is to provide a kind of depletion-mode AlGaN/GaN MISHEMT high-voltage device structure meeting the application requirements of high pressure, low on-resistance, and the method with good controllability and repeated this depletion-mode AlGaN/GaN MISHEMT high tension apparatus of making.
In order to realize above-mentioned target, the present invention adopts following technical scheme:
A kind of depletion-mode AlGaN/GaN MISHEMT high tension apparatus, it is characterized in that, comprise successively from bottom to up: substrate, GaN resilient coating, intrinsic GaN or AlGaN channel layer, AlN separator and AlGaN barrier layer, on AlGaN barrier layer, along continuous straight runs has successively: source electrode, grid and drain electrode, between aforementioned grid and AlGaN barrier layer, be also provided with insulating medium layer, in extension above the AlGaN barrier layer between grid and drain electrode, have between linear AlGaN layer and linear AlGaN layer and drain electrode and leave gap, subregion extension on linear AlGaN layer has P type GaN or InGaN epitaxial loayer, and there is the base stage being electrically connected to grid on P type GaN or InGaN epitaxial loayer, the width of P type GaN or InGaN epitaxial loayer is less than the width of linear AlGaN layer, aforementioned AlGaN barrier layer is comprised of the i type AlGaN layer of lower floor and the N-shaped AlGaN layer on upper strata, the upper surface of aforementioned source electrode, grid, drain electrode and base stage is also formed with and adds thick electrode, and the both sides that add thick electrode are all formed with passivation layer.
Aforesaid depletion-mode AlGaN/GaN MISHEMT high tension apparatus, is characterized in that, aforesaid substrate is sapphire, carborundum, GaN or MgO.
Aforesaid depletion-mode AlGaN/GaN MISHEMT high tension apparatus, is characterized in that, in aforementioned AlGaN barrier layer, the ratio of component of Al and Ga can regulate, and the component of Al, Ga, N is respectively x, 1-x, 1,1>x>0.
Aforesaid depletion-mode AlGaN/GaN MISHEMT high tension apparatus, it is characterized in that, in aforementioned linear AlGaN layer, the component of Al is increased to y by x linearity, and the ratio of component of Al and Ga can regulate, the component of Al, Ga, N is respectively y, 1-y, 1,1>y>x>0.
Aforesaid depletion-mode AlGaN/GaN MISHEMT high tension apparatus, it is characterized in that, in aforementioned intrinsic AlGaN channel layer, the component of Al is less than x, and the ratio of component of Al and Ga can regulate, the component of Al, Ga, N is respectively z, 1-z, 1,1>x>z>0.
Aforesaid depletion-mode AlGaN/GaN MISHEMT high tension apparatus, is characterized in that, aforementioned dielectric dielectric layer is SiN, Al 2o 3or HfO 2.
Aforesaid depletion-mode AlGaN/GaN MISHEMT high tension apparatus, is characterized in that, aforementioned passivation layer is SiN, Al 2o 3or HfO 2.
Aforesaid depletion-mode AlGaN/GaN MISHEMT high tension apparatus, is characterized in that, the linear AlGaN layer between aforementioned grid and drain electrode and the width >=0.5 μ m in the gap between drain electrode.
Aforesaid depletion-mode AlGaN/GaN MISHEMT high tension apparatus, is characterized in that, in aforementioned P type InGaN epitaxial loayer, the constant or In component of In component increases gradually.
The method of making aforesaid depletion-mode AlGaN/GaN MISHEMT high tension apparatus, is characterized in that, comprises the following steps:
(1) the linear AlGaN/AlGaN/GaN material of epitaxially grown p-GaN/ is carried out to organic washing, by mobile washed with de-ionized water and put into HCl:H 2in the solution of O=1:1, corrode 30-60s, finally by mobile washed with de-ionized water and dry up with high pure nitrogen;
(2) the AlGaN/GaN heterojunction material cleaning up is carried out to photoetching and dry etching, be formed with source region table top;
(3) to preparing the AlGaN/GaN heterojunction material of table top, carry out photoetching, form the etched area of P type GaN or InGaN, linear AlGaN layer, put into ICP dry etching reative cell etching, the P type GaN of the subregion between Zone Full, grid leak and grid between grid source, source electrode and drain electrode top or InGaN layer and linear AlGaN layer are all etched away, form grid leak the 3rd region;
(4) device is carried out to photoetching, then put into electron beam evaporation platform deposit metal ohmic contact Ti/Al/Ni/Au=20/120/45/50nm and peel off, finally in nitrogen environment, carry out the rapid thermal annealing of 850 ℃ of 35s, form ohmic contact;
(5) device for preparing ohmic contact is carried out to photoetching, form the etched area of P type GaN or InGaN epitaxial loayer, put into ICP dry etching reative cell etching, P type GaN or the InGaN epitaxial loayer of subregion between grid and drain electrode are etched away, form grid leak first area and second area;
(6) device for preparing ohmic contact is put into atomic layer deposition apparatus deposit Al 2o 3medium, thickness is 5-10nm;
(7) to completing the device of deposit, carry out photoetching, form Al 2o 3the corrosion region of medium, then puts into the solution 30s of HF:H2O=1:10, erodes grid with the Al of exterior domain 2o 3;
(8) device that completes corrosion is carried out to photoetching, form base region, then put into electron beam evaporation platform deposit Ni/Au=20/20nm and peel off, finally in atmospheric environment, carry out the annealing of 550 ℃ of 10min, form base stage ohmic contact;
(9) to completing device prepared by base stage, carry out photoetching, form gate metal region, then put into electron beam evaporation platform deposit Ni/Au=20/200nm and peel off, complete the preparation of gate electrode;
(10) by completing device prepared by grid, put into PECVD reative cell deposit SiN passivating film, the thickness of passivating film is 200nm-300nm;
(11) device is cleaned again, photoetching development, form the etched area of SiN passivating film, and put into ICP dry etching reative cell, the SiN passivating film that source electrode, grid and drain electrode are covered above etches away;
(12) device is cleaned, photoetching development, and put into the thick electrode that adds of electron beam evaporation platform deposit Ti/Au=20/200nm, complete the preparation of integral device.
Usefulness of the present invention is:
1, between grid leak, the formation in first area, second area and the 3rd region makes: during break-over of device, the 2DEG concentration of first area and second area increases, and resistance is reduced, and has reached the object that reduces device conducting resistance; The 2DEG of device when cut-off first area is reduced, and the 2DEG in second area and the 3rd region is identical during with break-over of device, has increased the width of device depletion region, has changed Electric Field Distribution, has reached the object of raising device electric breakdown strength;
2, the present invention adopts insulated gate structure (insulating medium layer of grid and below), has avoided gate leakage current, has improved device performance;
3, method of the present invention, has good controllability and repeatability.
Accompanying drawing explanation
Fig. 1 is the cross-sectional view of a specific embodiment of depletion-mode AlGaN/GaN MISHEMT high tension apparatus of the present invention;
Fig. 2 is the fabrication processing figure of depletion-mode AlGaN/GaN MISHEMT high tension apparatus of the present invention.
The implication of Reference numeral in figure: 1-substrate, 2-GaN resilient coating, 3-intrinsic GaN channel layer, 4-AlN separator, 5-AlGaN barrier layer, 501-i type AlGaN layer, 502-n type AlGaN layer, 6-source electrode, 7-grid, 8-drain electrode, 9-insulating medium layer, the linear AlGaN layer of 10-, 11-P type GaN epitaxial loayer, 12-base stage, 13-adds thick electrode, 14-passivation layer, D1 represents first area, and D2 represents second area, and D3 represents the 3rd region.
Embodiment
Below in conjunction with the drawings and specific embodiments, the present invention is done to concrete introduction.
First, introduce the structure of depletion-mode AlGaN/GaN MISHEMT high tension apparatus of the present invention.
With reference to Fig. 1, depletion-mode AlGaN/GaN MISHEMT high tension apparatus of the present invention, its structure comprises from bottom to up successively: substrate 1, GaN resilient coating 2, intrinsic GaN channel layer 3(intrinsic GaN channel layer 3 can also substitute with AlGaN channel layer), AlN separator 4 and AlGaN barrier layer 5, AlGaN barrier layer 5 is comprised of the i type AlGaN layer 501 of lower floor and the N-shaped AlGaN layer 502 on upper strata, wherein, on AlGaN barrier layer 5, along continuous straight runs has successively: source electrode 6, grid 7 and drain electrode 8, and be also provided with insulating medium layer 9 between grid 7 and AlGaN barrier layer 5, insulating medium layer 9 preferably adopts SiN, Al 2o 3or HfO 2deng insulating material, make.Above the AlGaN barrier layer 5 between grid 7 and drain electrode 8, extension has linear AlGaN layer 10, and leaves gap, the width >=0.5 μ m in gap between linear AlGaN layer 10 and drain electrode 8.Subregion extension on linear AlGaN layer 10 has P type GaN epitaxial loayer 11(P type GaN epitaxial loayer 11 to substitute with InGaN epitaxial loayer, in P type InGaN epitaxial loayer, constant or the In component of In component increases gradually), and on P type GaN epitaxial loayer 11, have the base stage 12 being electrically connected to grid 7, the width of P type GaN epitaxial loayer 11 is less than the width of linear AlGaN layer 10.In addition, the upper surface of source electrode 6, grid 7, drain electrode 8 and base stage 12 is also formed with and adds thick electrode 13, and the both sides that add thick electrode 13 are all formed with passivation layer 14, and passivation layer 14 preferably adopts SiN, Al 2o 3or HfO 2deng insulating material, make.
As a kind of preferred scheme, substrate is sapphire, carborundum, GaN or MgO.
As a kind of preferred scheme, in AlGaN barrier layer 5, the ratio of component of Al and Ga can regulate, and the component of Al, Ga, N is respectively x, 1-x, 1,0<x<1, i.e. Al xga 1-xn.
More preferably, in linear AlGaN layer 10, the component of Al is increased to y by x linearity, and the ratio of component of Al and Ga can regulate, the component of Al, Ga, N is respectively y, 1-y, 1,1>y>x>0, i.e. Al yga1 -yn.
Suppose, the thickness of linear AlGaN layer 10 is L, and the distance of the lower surface of the linear AlGaN layer 10 of distance is L 1the weight content of the Al of place is: (y-x) * L 1/ L.
If intrinsic GaN channel layer 3 use intrinsic AlGaN channel layers substitute, in intrinsic AlGaN channel layer, the component of Al is less than x, and the ratio of component of Al and Ga can regulate, the component of Al, Ga, N is respectively z, 1-z, 1,1>x>z>0, i.e. Al zga 1-zn.
Next, introduce the method for making above-mentioned depletion-mode AlGaN/GaN MISHEMT high tension apparatus.
With reference to Fig. 2, this manufacture method comprises the following steps:
1, the linear AlGaN/AlGaN/GaN material of epitaxially grown p-GaN/ is carried out to organic washing, by mobile washed with de-ionized water and put into HCl:H 2in the solution of O=1:1, corrode 30-60s, finally by mobile washed with de-ionized water and dry up with high pure nitrogen.
2, the AlGaN/GaN heterojunction material cleaning up is carried out to photoetching and dry etching, be formed with source region table top;
3, to preparing the AlGaN/GaN heterojunction material of table top, carry out photoetching, form the etched area of P type GaN etched area (or InGaN etched area) and linear AlGaN layer, put into ICP dry etching reative cell etching, process conditions are: upper electrode power is 200W, lower electrode power is 20W, chamber pressure is 1.5Pa, Cl 2flow be 10sccm, N 2flow be 10sccm, etch period is 5min-8min.By P type GaN(or the InGaN of the subregion between Zone Full, grid leak and grid between grid source, source electrode and drain electrode top) layer and linear AlGaN layer all etch away, and forms grid leak the 3rd region D3.
4, device is carried out to photoetching, then put into electron beam evaporation platform deposit metal ohmic contact Ti/Al/Ni/Au=20/120/45/50nm and peel off, finally in nitrogen environment, carry out the rapid thermal annealing of 850 ℃ of 35s, form ohmic contact.
5, the device for preparing ohmic contact is carried out to photoetching, forms P type GaN(or InGaN) etched area of epitaxial loayer, put into ICP dry etching reative cell etching, process conditions are: upper electrode power is 200W, lower electrode power is 20W, and chamber pressure is 1.5Pa, Cl 2flow be 10sccm, N 2flow be 10sccm, etch period is 3min-5min.By P type GaN(or the InGaN of subregion between grid and drain electrode) epitaxial loayer etches away, and forms grid leak first area D1 and second area D2.
6, the device for preparing ohmic contact is put into atomic layer deposition apparatus deposit Al 2o 3medium, thickness is 5-10nm, and process conditions are: growth temperature is 300 ℃, and pressure is 2000Pa, H 2the flow of O and TMAl is 150sccm.
7, to completing the device of deposit, carry out photoetching, form Al 2o 3the corrosion region of medium, then puts into the solution 30s of HF:H2O=1:10, erodes grid with the Al of exterior domain 2o 3.
8, the device that completes corrosion is carried out to photoetching, form base region, then put into electron beam evaporation platform deposit Ni/Au=20/20nm and peel off, finally in atmospheric environment, carry out the annealing of 550 ℃ of 10min, form base stage ohmic contact.
9, to completing device prepared by base stage, carry out photoetching, form gate metal region, then put into electron beam evaporation platform deposit Ni/Au=20/200nm and peel off, complete the preparation of gate electrode.
10, by completing device prepared by grid, put into PECVD reative cell deposit SiN passivating film, the thickness of passivating film is 200nm-300nm, and process conditions are: the flow of SiH4 is 40sccm, and the flow of NH3 is 10sccm, chamber pressure is 1-2Pa, and radio-frequency power is 40W.
11, device is cleaned again, photoetching development, form the etched area of SiN passivating film, and put into ICP dry etching reative cell, process conditions are: upper electrode power is 200W, and lower electrode power is 20W, and chamber pressure is 1.5Pa, the flow of CF4 is 20sccm, the flow of Ar gas is 10sccm, and etch period is 10min, and the SiN passivating film that source electrode, grid and drain electrode are covered above etches away.
12, device is cleaned, photoetching development, and put into the thick electrode that adds of electron beam evaporation platform deposit Ti/Au=20/200nm, complete the preparation of integral device.
As can be seen here, method of the present invention has good controllability and repeatability.
Due to high tension apparatus of the present invention, it is formed with: first area D1, second area D2 and the 3rd region D3 between grid leak, thus make:
(1) during break-over of device, the AlGaN/GaN interface 2DEG concentration under first area D1 and second area D2 increases, and resistance is reduced, and has reached the object that reduces device conducting resistance.
(2) when device ends, while being grid 7 voltages≤threshold voltage, 2DEG in raceway groove under grid 7 is depleted, meanwhile because base stage 12 is electrically connected to grid 7, therefore the 2DEG concentration under the D1 of first area reduces (being even reduced to 50%) to some extent, the width of the depletion region of device is increased to some extent, can bear the region of high electric field and be widened, reached the object that improves device electric breakdown strength; In addition, the 2DEG concentration under second area D2 is identical during with break-over of device, has increased the width of device depletion region, has changed Electric Field Distribution, has reached the object that improves device electric breakdown strength.
In addition, because high tension apparatus of the present invention has adopted insulated gate structure (insulating medium layer of grid and below), avoid gate leakage current, improved device performance.
It should be noted that, above-described embodiment does not limit the present invention in any form, and all employings are equal to replaces or technical scheme that the mode of equivalent transformation obtains, all drops in protection scope of the present invention.

Claims (10)

1. depletion-mode AlGaN/GaN MISHEMT high tension apparatus, it is characterized in that, comprise successively from bottom to up: substrate, GaN resilient coating, intrinsic GaN or AlGaN channel layer, AlN separator and AlGaN barrier layer, on AlGaN barrier layer, along continuous straight runs has successively: source electrode, grid and drain electrode, between described grid and AlGaN barrier layer, be also provided with insulating medium layer, in extension above the AlGaN barrier layer between grid and drain electrode, have between linear AlGaN layer and linear AlGaN layer and drain electrode and leave gap, subregion extension on linear AlGaN layer has P type GaN or InGaN epitaxial loayer, and there is the base stage being electrically connected to grid on P type GaN or InGaN epitaxial loayer, the width of P type GaN or InGaN epitaxial loayer is less than the width of linear AlGaN layer, described AlGaN barrier layer is comprised of the i type AlGaN layer of lower floor and the N-shaped AlGaN layer on upper strata, the upper surface of described source electrode, grid, drain electrode and base stage is also formed with and adds thick electrode, and the both sides that add thick electrode are all formed with passivation layer.
2. depletion-mode AlGaN/GaN MISHEMT high tension apparatus according to claim 1, is characterized in that, described substrate is sapphire, carborundum, GaN or MgO.
3. depletion-mode AlGaN/GaN MISHEMT high tension apparatus according to claim 1, it is characterized in that, in described AlGaN barrier layer, the ratio of component of Al and Ga can regulate, the component of Al, Ga, N is respectively x, 1-x, 1,1>x>0.
4. depletion-mode AlGaN/GaN MISHEMT high tension apparatus according to claim 3, it is characterized in that, in described linear AlGaN layer, the component of Al is increased to y by x linearity, and the ratio of component of Al and Ga can regulate, the component of Al, Ga, N is respectively y, 1-y, 1,1>y>x>0.
5. depletion-mode AlGaN/GaN MISHEMT high tension apparatus according to claim 3, it is characterized in that, in described intrinsic AlGaN channel layer, the component of Al is less than x, and the ratio of component of Al and Ga can regulate, the component of Al, Ga, N is respectively z, 1-z, 1,1>x>z>0.
6. depletion-mode AlGaN/GaN MISHEMT high tension apparatus according to claim 1, is characterized in that, described insulating medium layer is SiN, Al 2o 3or HfO 2.
7. depletion-mode AlGaN/GaN MISHEMT high tension apparatus according to claim 1, is characterized in that, described passivation layer is SiN, Al 2o 3or HfO 2.
8. depletion-mode AlGaN/GaN MISHEMT high tension apparatus according to claim 1, is characterized in that, the linear AlGaN layer between described grid and drain electrode and the width >=0.5 μ m in the gap between drain electrode.
9. depletion-mode AlGaN/GaN MISHEMT high tension apparatus according to claim 1, is characterized in that, in described P type InGaN epitaxial loayer, the constant or In component of In component increases gradually.
10. make the method for depletion-mode AlGaN/GaN MISHEMT high tension apparatus claimed in claim 1, it is characterized in that, comprise the following steps:
(1) the linear AlGaN/AlGaN/GaN material of epitaxially grown p-GaN/ is carried out to organic washing, by mobile washed with de-ionized water and put into HCl:H 2in the solution of O=1:1, corrode 30-60s, finally by mobile washed with de-ionized water and dry up with high pure nitrogen;
(2) the AlGaN/GaN heterojunction material cleaning up is carried out to photoetching and dry etching, be formed with source region table top;
(3) to preparing the AlGaN/GaN heterojunction material of table top, carry out photoetching, form the etched area of P type GaN or InGaN, linear AlGaN layer, put into ICP dry etching reative cell etching, the P type GaN of the subregion between Zone Full, grid leak and grid between grid source, source electrode and drain electrode top or InGaN layer and linear AlGaN layer are all etched away, form grid leak the 3rd region;
(4) device is carried out to photoetching, then put into electron beam evaporation platform deposit metal ohmic contact Ti/Al/Ni/Au=20/120/45/50nm and peel off, finally in nitrogen environment, carry out the rapid thermal annealing of 850 ℃ of 35s, form ohmic contact;
(5) device for preparing ohmic contact is carried out to photoetching, form the etched area of P type GaN or InGaN epitaxial loayer, put into ICP dry etching reative cell etching, P type GaN or the InGaN epitaxial loayer of subregion between grid and drain electrode are etched away, form grid leak first area and second area;
(6) device for preparing ohmic contact is put into atomic layer deposition apparatus deposit Al 2o 3medium, thickness is 5-10nm;
(7) to completing the device of deposit, carry out photoetching, form Al 2o 3the corrosion region of medium, then puts into the solution 30s of HF:H2O=1:10, erodes grid with the Al of exterior domain 2o 3;
(8) device that completes corrosion is carried out to photoetching, form base region, then put into electron beam evaporation platform deposit Ni/Au=20/20nm and peel off, finally in atmospheric environment, carry out the annealing of 550 ℃ of 10min, form base stage ohmic contact;
(9) to completing device prepared by base stage, carry out photoetching, form gate metal region, then put into electron beam evaporation platform deposit Ni/Au=20/200nm and peel off, complete the preparation of gate electrode;
(10) by completing device prepared by grid, put into PECVD reative cell deposit SiN passivating film, the thickness of passivating film is 200nm-300nm;
(11) device is cleaned again, photoetching development, form the etched area of SiN passivating film, and put into ICP dry etching reative cell, the SiN passivating film that source electrode, grid and drain electrode are covered above etches away;
(12) device is cleaned, photoetching development, and put into the thick electrode that adds of electron beam evaporation platform deposit Ti/Au=20/200nm, complete the preparation of integral device.
CN201410029319.7A 2014-01-22 2014-01-22 Depletion-mode AlGaN/GaN MISHEMT high tension apparatus and preparation method thereof Expired - Fee Related CN103745990B (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN201410029319.7A CN103745990B (en) 2014-01-22 2014-01-22 Depletion-mode AlGaN/GaN MISHEMT high tension apparatus and preparation method thereof

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN201410029319.7A CN103745990B (en) 2014-01-22 2014-01-22 Depletion-mode AlGaN/GaN MISHEMT high tension apparatus and preparation method thereof

Publications (2)

Publication Number Publication Date
CN103745990A true CN103745990A (en) 2014-04-23
CN103745990B CN103745990B (en) 2016-03-02

Family

ID=50502998

Family Applications (1)

Application Number Title Priority Date Filing Date
CN201410029319.7A Expired - Fee Related CN103745990B (en) 2014-01-22 2014-01-22 Depletion-mode AlGaN/GaN MISHEMT high tension apparatus and preparation method thereof

Country Status (1)

Country Link
CN (1) CN103745990B (en)

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN105870164A (en) * 2016-03-30 2016-08-17 宁波大学 Gallium nitride-based transistor with high electron mobility
CN107346785A (en) * 2017-05-22 2017-11-14 中国电子科技集团公司第五十五研究所 A kind of N polarity AlGaN/GaN high electron mobility FETs
CN109314135A (en) * 2016-07-01 2019-02-05 英特尔公司 Grid pile stack for GaN E mode transistor performance designs
CN110600549A (en) * 2019-10-21 2019-12-20 中证博芯(重庆)半导体有限公司 Enhanced AlGaN/GaN MOS-HEMT device structure and preparation method thereof

Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP1973163A2 (en) * 2007-03-23 2008-09-24 Cree, Inc. High temperature performance capable gallium nitride transistor
CN101312207A (en) * 2007-05-21 2008-11-26 张乃千 Enhancement type gallium nitride HEMT device structure
US20090072240A1 (en) * 2007-09-14 2009-03-19 Transphorm Inc. III-Nitride Devices with Recessed Gates
US7655962B2 (en) * 2007-02-23 2010-02-02 Sensor Electronic Technology, Inc. Enhancement mode insulated gate heterostructure field-effect transistor with electrically isolated RF-enhanced source contact
CN103178107A (en) * 2011-12-23 2013-06-26 台湾积体电路制造股份有限公司 High electron mobility transistor structure with improved breakdown voltage performance
US20130200387A1 (en) * 2012-02-06 2013-08-08 Samsung Electronics Co., Ltd. Nitride based heterojunction semiconductor device and manufacturing method thereof

Patent Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7655962B2 (en) * 2007-02-23 2010-02-02 Sensor Electronic Technology, Inc. Enhancement mode insulated gate heterostructure field-effect transistor with electrically isolated RF-enhanced source contact
EP1973163A2 (en) * 2007-03-23 2008-09-24 Cree, Inc. High temperature performance capable gallium nitride transistor
CN101312207A (en) * 2007-05-21 2008-11-26 张乃千 Enhancement type gallium nitride HEMT device structure
US20090072240A1 (en) * 2007-09-14 2009-03-19 Transphorm Inc. III-Nitride Devices with Recessed Gates
CN103178107A (en) * 2011-12-23 2013-06-26 台湾积体电路制造股份有限公司 High electron mobility transistor structure with improved breakdown voltage performance
US20130200387A1 (en) * 2012-02-06 2013-08-08 Samsung Electronics Co., Ltd. Nitride based heterojunction semiconductor device and manufacturing method thereof

Cited By (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN105870164A (en) * 2016-03-30 2016-08-17 宁波大学 Gallium nitride-based transistor with high electron mobility
CN105870164B (en) * 2016-03-30 2019-07-23 宁波大学 A kind of GaN base transistor with high electronic transfer rate
CN109314135A (en) * 2016-07-01 2019-02-05 英特尔公司 Grid pile stack for GaN E mode transistor performance designs
CN109314135B (en) * 2016-07-01 2023-03-10 英特尔公司 Gate stack design for GaN E-mode transistor performance
CN107346785A (en) * 2017-05-22 2017-11-14 中国电子科技集团公司第五十五研究所 A kind of N polarity AlGaN/GaN high electron mobility FETs
CN107346785B (en) * 2017-05-22 2019-11-26 中国电子科技集团公司第五十五研究所 A kind of N polarity AlGaN/GaN high electron mobility field-effect tube
CN110600549A (en) * 2019-10-21 2019-12-20 中证博芯(重庆)半导体有限公司 Enhanced AlGaN/GaN MOS-HEMT device structure and preparation method thereof
CN110600549B (en) * 2019-10-21 2023-12-08 重庆麦兜实业有限公司 Enhanced AlGaN/GaN MOS-HEMT device structure and preparation method thereof

Also Published As

Publication number Publication date
CN103745990B (en) 2016-03-02

Similar Documents

Publication Publication Date Title
CN103745992B (en) AlGaN/GaN MISHEMT high tension apparatus based on compound drain electrode and preparation method thereof
CN105355659A (en) Trench-gate AlGaN/GaN HEMT device structure and manufacturing method
CN105448964A (en) Composite stepped field plate trench gate AlGaN/GaN HEMT high-voltage device structure and manufacturing method therefor
CN104037221B (en) Compound field plate high-performance AlGaN/GaN HEMT element structure based on polarization effect and manufacturing method
CN103904114B (en) Add source field plate enhanced AlGaN/GaN HEMT device architecture and preparation method thereof
CN104037218A (en) High-performance AlGaN/GaN HEMT high-voltage element structure based on polarization effect and manufacturing method
CN105448975A (en) Composite step field plate grooved-gate high electron mobility transistor (HEMT) high-voltage device and fabrication method thereof
CN103745990B (en) Depletion-mode AlGaN/GaN MISHEMT high tension apparatus and preparation method thereof
CN104064595B (en) A kind of enhanced AlGaN based on slot grid structure/GaN MISHEMT device architecture and preparation method thereof
CN103762234B (en) Based on the AlGaN/GaN MISHEMT high tension apparatus and preparation method thereof of super junction leakage field plate
CN103794643B (en) A kind of based on groove grid high tension apparatus and preparation method thereof
CN104037217B (en) AlGaN/GaN HEMT switching element structure based on composite dipole layer and manufacturing method
CN104037215B (en) Reinforced AlGaN/GaN MISHEMT element structure based on polymer and manufacturing method thereof
CN103779406A (en) Depletion mode insulated gate AlGaN/GaN device structure with added source field plate and manufacturing method thereof
CN104037222B (en) High-voltage trench gate AlGaN/GaN HEMT device structure based on organic polymer polarization effect and manufacturing method of high-voltage trench gate AlGaN/GaN HEMT device structure based on organic polymer polarization effect
CN103745993B (en) Based on the AlGaN/GaN MISHEMT high tension apparatus and preparation method thereof of superjunction
CN103779411B (en) High voltage device based on super junction groove gates and manufacturing method of high voltage device
CN103904110B (en) Add grid field plate depletion type insulated gate AlGaN/GaN device architecture and preparation method thereof
CN103779409B (en) Depletion-type AlGaN/GaN HEMT structure and manufacturing method thereof
CN103762235B (en) AlGaN/GaN high tension apparatus based on super junction leakage field plate and preparation method thereof
CN103745991B (en) AlGaN/GaN high tension apparatus based on super knot and preparation method thereof
CN103839996A (en) Groove grid high-voltage device based on composite drain electrode and method for manufacturing same
CN104037220A (en) Reinforced AlGaN/GaN MISHEMT element structure based on dipole layer floating grid structure and manufacturing method thereof
CN103996707A (en) Gated field plate enhanced AlGaN/GaN HEMT (High Electron Mobility Transistor) device structure and preparation method thereof
CN103779407B (en) Add source field plate depletion-mode AlGaN/GaN HEMT device architecture and preparation method thereof

Legal Events

Date Code Title Description
C06 Publication
PB01 Publication
C10 Entry into substantive examination
SE01 Entry into force of request for substantive examination
C14 Grant of patent or utility model
GR01 Patent grant
CF01 Termination of patent right due to non-payment of annual fee

Granted publication date: 20160302

Termination date: 20210122

CF01 Termination of patent right due to non-payment of annual fee