CN105870164A - Gallium nitride-based transistor with high electron mobility - Google Patents
Gallium nitride-based transistor with high electron mobility Download PDFInfo
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- CN105870164A CN105870164A CN201610191581.0A CN201610191581A CN105870164A CN 105870164 A CN105870164 A CN 105870164A CN 201610191581 A CN201610191581 A CN 201610191581A CN 105870164 A CN105870164 A CN 105870164A
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- 229910002601 GaN Inorganic materials 0.000 title abstract description 121
- JMASRVWKEDWRBT-UHFFFAOYSA-N Gallium nitride Chemical compound [Ga]#N JMASRVWKEDWRBT-UHFFFAOYSA-N 0.000 title abstract description 118
- 230000004888 barrier function Effects 0.000 claims abstract description 55
- 239000000463 material Substances 0.000 claims abstract description 17
- 229910052751 metal Inorganic materials 0.000 claims abstract description 11
- 239000002184 metal Substances 0.000 claims abstract description 11
- 239000000758 substrate Substances 0.000 claims abstract description 9
- 238000000034 method Methods 0.000 claims description 9
- 229910002704 AlGaN Inorganic materials 0.000 abstract description 19
- 230000010287 polarization Effects 0.000 abstract description 14
- 230000005684 electric field Effects 0.000 description 20
- 230000000694 effects Effects 0.000 description 12
- 238000010586 diagram Methods 0.000 description 11
- 238000005036 potential barrier Methods 0.000 description 10
- 230000015556 catabolic process Effects 0.000 description 9
- 238000005516 engineering process Methods 0.000 description 7
- 230000008569 process Effects 0.000 description 7
- 230000008901 benefit Effects 0.000 description 4
- 239000012535 impurity Substances 0.000 description 4
- 230000005611 electricity Effects 0.000 description 3
- 238000010893 electron trap Methods 0.000 description 3
- 238000002360 preparation method Methods 0.000 description 3
- IJGRMHOSHXDMSA-UHFFFAOYSA-N Atomic nitrogen Chemical compound N#N IJGRMHOSHXDMSA-UHFFFAOYSA-N 0.000 description 2
- 240000002853 Nelumbo nucifera Species 0.000 description 2
- 235000006508 Nelumbo nucifera Nutrition 0.000 description 2
- 235000006510 Nelumbo pentapetala Nutrition 0.000 description 2
- 230000008859 change Effects 0.000 description 2
- 230000007423 decrease Effects 0.000 description 2
- 238000005530 etching Methods 0.000 description 2
- PCHJSUWPFVWCPO-UHFFFAOYSA-N gold Chemical compound [Au] PCHJSUWPFVWCPO-UHFFFAOYSA-N 0.000 description 2
- 239000010931 gold Substances 0.000 description 2
- 229910052737 gold Inorganic materials 0.000 description 2
- 238000005498 polishing Methods 0.000 description 2
- 239000004065 semiconductor Substances 0.000 description 2
- 238000004088 simulation Methods 0.000 description 2
- GYHNNYVSQQEPJS-UHFFFAOYSA-N Gallium Chemical compound [Ga] GYHNNYVSQQEPJS-UHFFFAOYSA-N 0.000 description 1
- 206010030113 Oedema Diseases 0.000 description 1
- AJGDITRVXRPLBY-UHFFFAOYSA-N aluminum indium Chemical compound [Al].[In] AJGDITRVXRPLBY-UHFFFAOYSA-N 0.000 description 1
- 239000013078 crystal Substances 0.000 description 1
- 230000007812 deficiency Effects 0.000 description 1
- 239000004744 fabric Substances 0.000 description 1
- 230000005669 field effect Effects 0.000 description 1
- 229910052733 gallium Inorganic materials 0.000 description 1
- 239000004047 hole gas Substances 0.000 description 1
- 230000005527 interface trap Effects 0.000 description 1
- 230000007246 mechanism Effects 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 229910052757 nitrogen Inorganic materials 0.000 description 1
- 230000000737 periodic effect Effects 0.000 description 1
- 230000035935 pregnancy Effects 0.000 description 1
- 230000004223 radioprotective effect Effects 0.000 description 1
- 230000009467 reduction Effects 0.000 description 1
- 239000000126 substance Substances 0.000 description 1
- 230000001629 suppression Effects 0.000 description 1
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
- H01L29/76—Unipolar devices, e.g. field effect transistors
- H01L29/772—Field effect transistors
- H01L29/778—Field effect transistors with two-dimensional charge carrier gas channel, e.g. HEMT ; with two-dimensional charge-carrier layer formed at a heterojunction interface
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
- H01L29/06—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
- H01L29/0684—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by the shape, relative sizes or dispositions of the semiconductor regions or junctions between the regions
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
- H01L29/06—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
- H01L29/10—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions with semiconductor regions connected to an electrode not carrying current to be rectified, amplified or switched and such electrode being part of a semiconductor device which comprises three or more electrodes
- H01L29/1025—Channel region of field-effect devices
- H01L29/1029—Channel region of field-effect devices of field-effect transistors
- H01L29/1033—Channel region of field-effect devices of field-effect transistors with insulated gate, e.g. characterised by the length, the width, the geometric contour or the doping structure
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
- H01L29/12—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by the materials of which they are formed
- H01L29/20—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by the materials of which they are formed including, apart from doping materials or other impurities, only AIIIBV compounds
- H01L29/2003—Nitride compounds
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Abstract
The invention relates to a gallium nitride-based transistor with high electron mobility. The gallium nitride-based transistor comprises a substrate, a GaN (gallium nitride) buffer layer, a channel layer, a barrier layer, and a source electrode, a drain electrode and a grid electrode on the barrier layer, a charge compensation layer between the grid electrode and the drain electrode, and a metal electrode and an insulating medium on the charge compensation layer from the bottom up in sequence; the gallium nitride-based transistor is characterized in that the channel layer, the barrier layer and the charge compensation layer are all made from the GaN material; the channel layer and the barrier layer are opposite in the direction of polarization; and the barrier layer and the charge compensation layer are opposite in the direction of polarization. Due to the polarized charge imbalance between the channel layer and the barrier layer, and between the barrier layer and the charge compensation layer, charges of the same quantity and opposite types are generated, and a charge automatically-balanced super-junction structure is formed; the problems of low reliability and low output power and the like caused by the reason that AlGaN and other materials are adopted for the barrier layer are solved; and meanwhile, the problem of charge imbalance of the existing super-junction GaN electric appliance is solved as well, so that that the performance of the device is improved.
Description
Technical field
The present invention relates to field of semiconductor devices, particularly relate to a kind of GaN base transistor with high electronic transfer rate.
Background technology
Gallium nitride (GaN) based high electron mobility transistor (HEMT) not only has that energy gap is big, critical to be punctured
The excellent specific properties such as electric field height, electron saturation velocities height, good heat conductivity, radioprotective and good chemical stability, GaN
Material can also form the two dimension electricity with high concentration and high mobility with the material such as aluminum indium gallium nitrogen (AlxInyGa1-x-yN)
Edema of the legs during pregnancy (2DEG) hetero-junctions raceway groove.Therefore, GaN HEMT is particularly well-suited to high pressure, high-power and high temperature application neck
Territory, is one of most potential transistor of applied power electronics.
Prior art GaN HEMT, as it is shown in figure 1, device generally uses the materials such as AlGaN as barrier layer, passes through
Between GaN channel layer and AlGaN potential barrier, polarization charge is uneven and that formed 2DEG serves as conducting channel.But
Technology is had to use the GaN HEMT of the barrier layer such as AlGaN to there is following deficiency:
Stress is produced, between channel layer and barrier layer owing to GaN material is different with AlGaN material lattice paprmeter
Forming electron trap in hetero-junctions raceway groove and AlGaN potential barrier, the existence of electron trap not only can reduce raceway groove 2DEG
Concentration, limits device output power, can cause current collapse effect simultaneously, reduces reliability and the life-span of device；
The lack of alignment of Al and the Ga element in AlGaN potential barrier, interferes its Periodic Potential, causes conjunction
Gold scattering, reduces raceway groove 2DEG mobility and device output power；
Stress relaxation and inverse piezoelectric polarization in AlGaN potential barrier can substantially reduce raceway groove 2DEG concentration, and cause
Current collapse effect, affects output and the range of application of device.
The impact that AlGaN potential barrier stress distribution uniformity all can be produced by multiple device preparation technology, and barrier layer should
The uneven meeting of variation cloth causes the polarization Coulombian field to raceway groove 2DEG to scatter, thus reduce raceway groove 2DEG mobility and
Device output power.
Additionally, the breakdown voltage actual value having made GaN HEMT at present still has relatively compared with its theoretical pressure limit
Big gap, its main cause is that the problem of gate electric field concentration effect is difficult to the most effectively be solved.Work as GaN
When HEMT is under high drain voltage, raceway groove electric lines of force is concentrated and is pointed to gate edge, forms peak electric field at gate edge,
Make device, in the pressure of relatively low drain, avalanche breakdown just occur, it is impossible to give full play to the pressure advantage of height of GaN material.
2011, Nakajima et al. (GaN-based super heterojunction field effect transistors using
The polarization junction concept.IEEE Electron Device Letters, 2011,32 (4): 542-544) propose
A kind of superjunction AlGaN/GaN HEMT device solves gate electric field concentration effect.This HEMT device structure such as Fig. 2
Shown in, device grown one layer of GaN layer and p-type GaN layer in the AlGaN potential barrier between grid and drain electrode.By
In the imbalance of GaN layer Yu AlGaN potential barrier interfacial polarization electric charge, in GaN layer and the meeting of AlGaN potential barrier interface
Forming two-dimensional hole gas (2DHG), 2DHG is mainly derived from the impurity ionization in p-type GaN layer.When device bears
Time pressure, forming super-junction structure in 2DHG and raceway groove between 2DEG, the two mutually exhausts, smooth electric field distribution in channel,
Thus boost device breakdown voltage.
For the superjunction AlGaN/GaN HEMT device of prior art, owing to device channel 2DEG derives from AlGaN
Barrier layer surface trap discharges, 2DEG with 2DHG source is different, simultaneously because p-type GaN material exists, " freezeout is imitated
Should ", it is difficult to accomplish charge balance between 2DEG and 2DHG, and the charge unbalance problem in superjunction, can be due to device
Part raceway groove produces peak value electric field and causes punch through voltage and decline, it is impossible to give full play to super-junction structure resistance to the height of GaN material
Pressure feature.Additionally, " freeze-out effect " in p-type GaN material also can affect the heat stability of device.GaN layer and AlGaN
The interface trap produced due to stress between barrier layer can cause current collapse effect, reduces the reliability of device.
Summary of the invention
The technical problem to be solved is to provide one can either avoid using AlGaN for above-mentioned prior art
The problems such as the output decline caused Deng barrier layer and reliability, can solve again existing superjunction GaN HEMT electric charge not
The GaN base transistor with high electronic transfer rate of equilibrium problem.
The present invention solves the technical scheme that above-mentioned technical problem used: a kind of gallium nitride based high electron mobility crystal
Pipe, main by substrate, GaN cushion, channel layer, barrier layer, the source electrode on barrier layer, drain electrode
With grid, source electrode and drain electrode are Ohmic contact, grid is Schottky contacts, the charge compensating layer between grid and drain electrode,
Metal electrode on charge compensating layer and dielectric composition, it is characterised in that: described channel layer, barrier layer and electricity
It is contrary that lotus layer of compensation is GaN material, channel layer and barrier layer polarised direction, barrier layer and charge compensating layer polarization side
To on the contrary.
Device operation principle is as follows: although channel layer and barrier layer are GaN material, but due to the two polarised direction phase
Instead, interface will form the clean polarization charge of high concentration, thus produces the 2DEG (or 2DHG) of high concentration, serves as device
The conducting channel of part；It is similar to, between barrier layer and charge compensating layer, the 2DHG (or 2DEG) of high concentration will be formed.
Owing to channel layer, barrier layer and charge compensating layer are GaN material, with barrier layer and electricity between channel layer and barrier layer
The charge type formed between lotus layer of compensation is contrary, and density is identical, defines therebetween the super-junction structure of charge balance.
Further, between described GaN channel layer and GaN barrier layer, GaN barrier layer and GaN charge compensation
Between Ceng, all combined by the technique of bonding.
In order to avoid drain and gate is directly turned on by GaN charge compensating layer, described GaN charge compensating layer can not
It is connected with drain and gate simultaneously.
Further, described dielectric is high K medium, and relative dielectric constant is more than 15.
In order to avoid GaN charge compensating layer appearance potential floating, preferably controlling device property, described GaN electric charge is mended
Repay preparation on layer and have metal electrode, between metal electrode and charge compensating layer, form Ohmic contact or Schottky contacts, metal
Electrode potential is between grid voltage and drain voltage.
Compared with prior art, it is an advantage of the current invention that: 1, device cushion, channel layer, barrier layer and electric charge are mended
Repay layer and be GaN material, in device, there is not strain, can effectively reduce electron trap densities in device, suppression device
Current collapse effect, improves device output power and reliability；2, it is GaN material due to barrier layer, conjunction will not be produced
, simultaneously because strain will not be produced in barrier layer, the most there is not the problem that stress distribution is uneven, will not produce in gold scattering
Polarization Coulomb field scattering, can be effectively improved channel carrier mobility, thus improve device frequency characteristic and output；
3, not having inverse piezoelectric polarization in barrier layer, device bias voltage will not change channel carrier concentration, can effectively change
Kind device current pull-in effect；4, the current-carrying formed between channel layer and barrier layer and between barrier layer and charge compensating layer
Subtype is contrary, concentration is identical, can form therebetween the super-junction structure of charge balance, can be effectively improved prior art and surpass
The problem of charge unbalance in knot GaN HEMT, simultaneously because mend with barrier layer and electric charge between channel layer and barrier layer
Repay the carrier between layer and derive from polarization charge, rather than impurity ionization, " freeze-out effect " will not be produced, can be effective
Boost device reliability.
Accompanying drawing explanation
Fig. 1 is the GaN HEMT-structure schematic diagram of prior art；
Fig. 2 is the superjunction GaN HEMT-structure schematic diagram of prior art；
Fig. 3 is the GaN HEMT-structure schematic diagram that the present invention proposes；
Fig. 4 A is the GaN HEMT process flow diagram in the embodiment of the present invention；
Fig. 4 B is the GaN HEMT process flow diagram in the embodiment of the present invention；
Fig. 4 C is the GaN HEMT process flow diagram in the embodiment of the present invention；
Fig. 4 D is the GaN HEMT process flow diagram in the embodiment of the present invention；
Fig. 4 E is the GaN HEMT process flow diagram in the embodiment of the present invention；
Fig. 4 F is the GaN HEMT process flow diagram in the embodiment of the present invention；
Fig. 4 G is the GaN HEMT process flow diagram in the embodiment of the present invention；
Fig. 5 be the GaN HEMT gate pole in the embodiment of the present invention and drain electrode between band structure schematic diagram；
Fig. 6 is the GaN HEMT transfer characteristic curve in the embodiment of the present invention；
Fig. 7 is the GaN HEMT that proposes of the present invention and prior art GaN HEMT channel laterally Electric Field Distribution when puncturing
Relatively；
When Fig. 8 is temperature 300k, the GaN HEMT that the present invention proposes punctures with prior art superjunction GaN HEMT
Time channel laterally Electric Field Distribution compare；
When Fig. 9 is temperature 200k, the GaN HEMT that the present invention proposes punctures with prior art superjunction GaN HEMT
Time channel laterally Electric Field Distribution compare
Wherein, the parts that in figure, reference is corresponding are entitled:
101-substrate, 102-GaN cushion, 103-GaN channel layer, 104-GaN barrier layer, 105-source electrode,
106-drains, 107-grid, 108-GaN charge compensating layer, 109-dielectric, 110-metal electrode.
Detailed description of the invention
Below in conjunction with accompanying drawing embodiment, the present invention is described in further detail.
Fig. 4 A～Fig. 4 G is device architecture preparation technology schematic flow sheet proposed by the invention.Fig. 4 A is device extension
Preparing, GaN cushion 102 and GaN channel layer 103 is prepared on substrate 101, and its polarised direction is upwards,
GaN barrier layer 104 is prepared on substrate 1011, and its polarised direction is similarly upwards.In Fig. 4 B, by GaN raceway groove
Layer 103 and GaN barrier layer 104 are combined by bonding technology, now GaN cushion 102 and GaN raceway groove
Upwards, and GaN barrier layer 104 polarised direction becomes downward to layer 103 polarised direction, at GaN channel layer 103 and GaN
Barrier layer 104 interface is uneven due to polarization charge, can form the 2DEG of high concentration, serve as the conducting channel of device.
In Fig. 4 C, substrate 1011 is peeled off, and by chemically-mechanicapolish polishing thinning for GaN barrier layer 104 with etching technics
To intended thickness；Being prepared on substrate 1012 by GaN charge compensating layer 108, its polarised direction is downward simultaneously.
In Fig. 4 D, GaN barrier layer 104 and GaN charge compensating layer 108 is combined by bonding technology, now
GaN charge compensating layer 108 polarised direction becomes upwards, owing to polarization charge is uneven, and GaN barrier layer 104 and GaN
Charge compensating layer 108 interface will form the 2DHG of high concentration.In Fig. 4 E, substrate 1012 is peeled off, and by changing
Learn mechanical polishing and GaN charge compensating layer 108 is machined to intended thickness and shape by etching technics.In Fig. 4 F, shape
Become grid 107, source electrode 105, drain electrode 106 and metal electrode.In Fig. 4 G, form dielectric 109.
In order to verify the working mechanism of device architecture proposed by the invention, device shown in Fig. 4 G is emulated, emulation
Parameter is given by table 1.Wherein charge compensating layer is positioned at and is connected with grid 107, and the distance of distance drain electrode 106 is 2 μm,
On charge compensating layer, dielectric 109 thickness is 50nm.
Table 1 device simulation structural parameters
Fig. 5 show between device grids 107 and drain electrode 106 vertically band structure simulation result.Can from figure
To find out, in charge compensating layer and barrier layer interface, valence band is bent upwards close to fermi level, is formed in this interface
The 2DHG of high concentration, and at barrier layer with channel layer interface, conduction band is bent downwardly, and defines height in this interface
The 2DEG of concentration.Barrier layer and channel layer interface 2DEG charging device conducting channel, and charge compensating layer and barrier layer
The 2DHG at interface and raceway groove 2DEG forms super-junction structure, mutually exhausts when device bears pressure, extended device electric field
Region, smooth electric field distribution in channel, thus boost device is pressure.
Fig. 6 show the transfer characteristic curve of device proposed by the invention.It can be seen that with prior art GaN
HEMT transfer characteristic is similar to, and device is depletion type, and threshold voltage is-8.8V, and when grid voltage is 0V, drain 106 voltages
During for 0.5V, device drain 106 electric current density is 0.47A/mm.
In order to be further characterized by inventing the pressure advantage of proposed GaN HEMT, Fig. 7 compares GaN proposed by the invention
Channel laterally Electric Field Distribution when HEMT and prior art GaN HEMT (device architecture is as shown in Figure 1) punctures,
Have AlGaN potential barrier 104 thickness in technology GaN HEMT be 30nm, Al component be 0.25, raceway groove 2DEG is dense
Degree is 1.03 × 1013cm-2, other parameters of device are identical with table 1.Device electric breakdown strength is defined as (grid under cut-off state
107 voltages=-10V), 106 electric current densities that drain reach drain electrode 106 voltage during 1mA/mm.It can be seen that
Due to grid 107 electric field concentration effect, edge, prior art GaN HEMT gate pole 107 forms peak electric field, device
The most breakdown compared with low drain pressure, breakdown voltage is 145V.And for GaN HEMT proposed by the invention, due to
The 2DHG and the raceway groove 2DEG that are formed between high leakage pressure GaN charge compensating layer 108 and GaN barrier layer 104 are mutual
Exhausting, raceway groove defines smooth Electric Field Distribution, and device electric breakdown strength is 1296V, is prior art GaN HEMT
8.94 times.
In order to be further characterized by the reliability advantage of GaN HEMT proposed by the invention, simulate the present invention under different temperatures
Proposed GaN HEMT compares with prior art superjunction GaN HEMT voltage endurance.Prior art superjunction GaN
HEMT device structure is as in figure 2 it is shown, GaN layer thickness is 10nm；P-type GaN layer thickness is 40nm, adulterates dense
Degree is 3 × 1020cm-3, during 300k, p-type GaN layer impurity ionization rate is 1%, and during 300k, 2DHG concentration is
1.2×1013cm-2, GaN layer and p-type GaN layer length are 4 μm；AlGaN potential barrier 104 thickness is 30nm,
Al component is 0.25, and raceway groove 2DEG concentration is 1.03 × 1013cm-2, other parameters of device are identical with table 1.Fig. 8 is
Channel laterally Electric Field Distribution when the GaN HEMT that during 300k, the present invention proposes and prior art superjunction GaN HEMT punctures
Relatively.It can be seen that owing to, in prior art superjunction GaN HEMT, 2DHG concentration is higher than raceway groove 2DEG
Concentration, when device bears pressure, 2DHG cannot be completely depleted, forms peak electric field at GaN layer edge, and device hits
Wearing voltage is 1017V.And the GaN HEMT that the present invention proposes is due to 2DHG and 2DEG charge balance, in raceway groove
Being formed without peak electric field, device is pressure improves 27.4% for 1296V, relatively prior art superjunction GaN HEMT.
When the GaN HEMT that when Fig. 9 is 200k, the present invention proposes and prior art superjunction GaN HEMT punctures, raceway groove is horizontal
Compare to Electric Field Distribution.Due to the present invention propose GaN HEMT do not exist " freeze-out effect ", device electric breakdown strength with
During 300k identical, be still 1296V.And for prior art superjunction GaN HEMT, due to p-type in p-type GaN layer
There is " freeze-out effect " in impurity, 2DHG concentration strongly reduces along with the reduction of temperature, and 2DHG cannot completely depleted ditch
Road 2DEG, device forms peak electric field, significantly reduces, only 194V during breakdown voltage relatively 300k at grid 107 edge.
Although above-described embodiment illustrates as a example by GaN base transistor with high electronic transfer rate (GaN HEMT),
But proposed structure is applicable to the various structures transistor that other semi-conducting materials various are constituted.
The above, be only presently preferred embodiments of the present invention, and the present invention not does any pro forma restriction, every depends on
Any simple modification of being made above example according to the technical spirit of the present invention, equivalent variations, each fall within the guarantor of the present invention
Within the scope of protecting.
Claims (7)
- null1. a GaN base transistor with high electronic transfer rate，Main by substrate (101)，GaN cushion (102)，Channel layer (103)，Barrier layer (104)，Source electrode (105) on barrier layer (104)、Drain electrode (106) and grid (107)，Charge compensating layer (108) between grid (107) and drain electrode (106)，Metal electrode (110) on charge compensating layer (108) and dielectric (109) composition，It is characterized in that: described channel layer (103)、Barrier layer (104) and charge compensating layer (108) are GaN material，Channel layer (103) and barrier layer (104) polarised direction are contrary，Barrier layer (104) and charge compensating layer (108) polarised direction are contrary.
- GaN base transistor with high electronic transfer rate the most according to claim 1, it is characterized in that: between described channel layer (103) and barrier layer (104), between barrier layer (104) and charge compensating layer (108), all combined by the technique of bonding.
- GaN base transistor with high electronic transfer rate the most according to claim 1 and 2, it is characterised in that: described charge compensating layer (108) can not be connected with drain electrode (106) and grid (107) simultaneously.
- GaN base transistor with high electronic transfer rate the most according to claim 3, it is characterised in that: described metal electrode (110) current potential is between grid (107) voltage and drain electrode (106) voltage.
- GaN base transistor with high electronic transfer rate the most according to claim 1, described dielectric (109) is high K medium, and relative dielectric constant is more than 15.
- GaN base transistor with high electronic transfer rate the most according to claim 1, it is characterised in that: form Ohmic contact between described metal electrode (110) and charge compensating layer (108).
- GaN base transistor with high electronic transfer rate the most according to claim 1, it is characterised in that: form Schottky contacts between described metal electrode (110) and charge compensating layer (108).
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Cited By (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| WO2018157523A1 (en) * | 2017-03-03 | 2018-09-07 | 上海新傲科技股份有限公司 | Gallium nitride high electron mobility transistor having high breakdown voltage and formation method therefor |
| CN110504330A (en) * | 2019-07-29 | 2019-11-26 | 广微集成技术（深圳）有限公司 | A kind of Schottky diode and preparation method thereof |
| TWI682465B (en) * | 2018-05-02 | 2020-01-11 | 黃志仁 | Semiconductor structure for wide bandgap normally off mosfet |
| US10840343B1 (en) | 2019-11-01 | 2020-11-17 | Chih-Jen Huang | Semiconductor structure for wide bandgap normally off MOSFET |
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