CN103794643B - A kind of based on groove grid high tension apparatus and preparation method thereof - Google Patents
A kind of based on groove grid high tension apparatus and preparation method thereof Download PDFInfo
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- 238000002360 preparation method Methods 0.000 title claims abstract description 11
- 229910002704 AlGaN Inorganic materials 0.000 claims abstract description 112
- 238000005036 potential barrier Methods 0.000 claims abstract description 32
- 150000001875 compounds Chemical class 0.000 claims abstract description 22
- 238000002161 passivation Methods 0.000 claims abstract description 11
- 239000000758 substrate Substances 0.000 claims abstract description 7
- 239000011248 coating agent Substances 0.000 claims abstract description 4
- 238000000576 coating method Methods 0.000 claims abstract description 4
- 229910002601 GaN Inorganic materials 0.000 claims description 52
- 238000001259 photo etching Methods 0.000 claims description 27
- 238000001312 dry etching Methods 0.000 claims description 24
- 239000000470 constituent Substances 0.000 claims description 20
- 238000000034 method Methods 0.000 claims description 19
- 230000008569 process Effects 0.000 claims description 14
- IJGRMHOSHXDMSA-UHFFFAOYSA-N Atomic nitrogen Chemical compound N#N IJGRMHOSHXDMSA-UHFFFAOYSA-N 0.000 claims description 12
- 238000005566 electron beam evaporation Methods 0.000 claims description 12
- 239000000463 material Substances 0.000 claims description 10
- XKRFYHLGVUSROY-UHFFFAOYSA-N Argon Chemical compound [Ar] XKRFYHLGVUSROY-UHFFFAOYSA-N 0.000 claims description 6
- 239000008367 deionised water Substances 0.000 claims description 6
- 239000002184 metal Substances 0.000 claims description 6
- 229910052757 nitrogen Inorganic materials 0.000 claims description 6
- 238000000623 plasma-assisted chemical vapour deposition Methods 0.000 claims description 6
- 230000015572 biosynthetic process Effects 0.000 claims description 5
- 229910010271 silicon carbide Inorganic materials 0.000 claims description 4
- 238000000137 annealing Methods 0.000 claims description 3
- 229910052786 argon Inorganic materials 0.000 claims description 3
- 230000007797 corrosion Effects 0.000 claims description 3
- 238000005260 corrosion Methods 0.000 claims description 3
- 239000007789 gas Substances 0.000 claims description 3
- CPLXHLVBOLITMK-UHFFFAOYSA-N magnesium oxide Inorganic materials [Mg]=O CPLXHLVBOLITMK-UHFFFAOYSA-N 0.000 claims description 3
- 238000004151 rapid thermal annealing Methods 0.000 claims description 3
- 229910052594 sapphire Inorganic materials 0.000 claims description 3
- 239000010980 sapphire Substances 0.000 claims description 3
- 238000005406 washing Methods 0.000 claims description 3
- 238000004519 manufacturing process Methods 0.000 claims 2
- 230000015556 catabolic process Effects 0.000 abstract description 9
- 230000009467 reduction Effects 0.000 abstract description 6
- 230000001276 controlling effect Effects 0.000 abstract description 3
- 230000001105 regulatory effect Effects 0.000 abstract description 3
- 230000005684 electric field Effects 0.000 description 10
- 230000008901 benefit Effects 0.000 description 2
- 230000008859 change Effects 0.000 description 2
- 238000005516 engineering process Methods 0.000 description 2
- 238000012986 modification Methods 0.000 description 2
- 230000004048 modification Effects 0.000 description 2
- 230000005533 two-dimensional electron gas Effects 0.000 description 2
- 230000009471 action Effects 0.000 description 1
- 230000009286 beneficial effect Effects 0.000 description 1
- 230000007812 deficiency Effects 0.000 description 1
- 238000009826 distribution Methods 0.000 description 1
- 230000008030 elimination Effects 0.000 description 1
- 238000003379 elimination reaction Methods 0.000 description 1
- 238000004377 microelectronic Methods 0.000 description 1
- 229910003465 moissanite Inorganic materials 0.000 description 1
- 229920006395 saturated elastomer Polymers 0.000 description 1
- 239000004065 semiconductor Substances 0.000 description 1
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
- H01L29/76—Unipolar devices, e.g. field effect transistors
- H01L29/772—Field effect transistors
- H01L29/778—Field effect transistors with two-dimensional charge carrier gas channel, e.g. HEMT ; with two-dimensional charge-carrier layer formed at a heterojunction interface
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
- H01L29/06—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
- H01L29/0603—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions
- H01L29/0607—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions for preventing surface leakage or controlling electric field concentration
- H01L29/0611—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions for preventing surface leakage or controlling electric field concentration for increasing or controlling the breakdown voltage of reverse biased devices
- H01L29/0615—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions for preventing surface leakage or controlling electric field concentration for increasing or controlling the breakdown voltage of reverse biased devices by the doping profile or the shape or the arrangement of the PN junction, or with supplementary regions, e.g. junction termination extension [JTE]
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/40—Electrodes ; Multistep manufacturing processes therefor
- H01L29/41—Electrodes ; Multistep manufacturing processes therefor characterised by their shape, relative sizes or dispositions
- H01L29/423—Electrodes ; Multistep manufacturing processes therefor characterised by their shape, relative sizes or dispositions not carrying the current to be rectified, amplified or switched
- H01L29/42312—Gate electrodes for field effect devices
- H01L29/42316—Gate electrodes for field effect devices for field-effect transistors
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
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- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/66007—Multistep manufacturing processes
- H01L29/66075—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
- H01L29/66227—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
- H01L29/66409—Unipolar field-effect transistors
- H01L29/66446—Unipolar field-effect transistors with an active layer made of a group 13/15 material, e.g. group 13/15 velocity modulation transistor [VMT], group 13/15 negative resistance FET [NERFET]
- H01L29/66462—Unipolar field-effect transistors with an active layer made of a group 13/15 material, e.g. group 13/15 velocity modulation transistor [VMT], group 13/15 negative resistance FET [NERFET] with a heterojunction interface channel or gate, e.g. HFET, HIGFET, SISFET, HJFET, HEMT
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Abstract
The invention discloses a kind of based on groove grid high tension apparatus and preparation method thereof, comprise substrate successively from bottom to top, GaN resilient coating, GaN channel layer, AlN separator, intrinsic AlGaN layer and AlGaN potential barrier, described AlGaN potential barrier is interval with source electrode, grid and compound drain electrode, linear AlGaN potential barrier is also provided with between described grid and compound drain electrode, the linear AlGaN layer of extension above the subregion of AlGaN potential barrier, above the subregion of linear AlGaN layer, extension has p-GaN layer, P-GaN layer is provided with base stage, the top layer of said structure is also deposited with passivation layer in interval, be deposited with in the interval of described passivation layer and add thick electrode.The conducting resistance of the present invention when break-over of device is reduced, and the puncture voltage when cut-off state is improved, the raising of device electric breakdown strength and the reduction of conducting resistance are taken into account, adopt slot grid structure simultaneously, enhance the regulating and controlling effect of grid to raceway groove 2DEG, improve the frequency performance of device.<!-- 2 -->
Description
Technical field
The present invention relates to microelectronics technology, especially relate to a kind of based on groove grid high tension apparatus and preparation method thereof.
Background technology
, the characteristic such as breakdown electric field high, thermal conductivity high, saturated electrons speed large and heterojunction boundary two-dimensional electron gas high large with its energy gap with SiC and GaN the 3rd bandwidth bandgap semiconductor that is representative, makes it be subject to extensive concern in recent years.In theory, the device such as high electron mobility transistor (HEMT), LED, laser diode LD utilizing these materials to make has obvious advantageous characteristic than existing device, therefore researcher has carried out extensive and deep research to it both at home and abroad in the last few years, and achieves the achievement in research attracted people's attention.
AlGaN/GaN heterojunction high electron mobility transistor (HEMT) has shown advantageous advantage in high-temperature device and HIGH-POWERED MICROWAVES device, and pursuit device high-frequency, high pressure, high power have attracted numerous research.In recent years, the another study hotspot that higher frequency high pressure AlGaN/GaNHEMT becomes concern is made.After AlGaN/GaN heterojunction grown, just there is a large amount of two-dimensional electron gas 2DEG in heterojunction boundary, and its mobility is very high, and therefore we can obtain higher device frequency characteristic.In raising AlGaN/GaN heterojunction electron mobility transistor puncture voltage, people have carried out large quantifier elimination, find that puncturing of AlGaN/GaNHEMT device mainly occurs in grid by drain terminal, therefore the puncture voltage of device will be improved, the electric field redistribution in grid leak region must be made, especially reduce the electric field of grid by drain terminal, for this reason, there has been proposed the method adopting field plate structure:
1. adopt field plate structure.See the NovelAlGaN/GaNdual-field-plateFETwithhighgain of YujiAndo, AkioWakejima, YasuhiroOkamoto etc., increasedlinearityandstability, IEDM2005, pp.576-579,2005.In AlGaN/GaNHEMT device, adopt grid field plate and source field plate structure simultaneously, the puncture voltage of device is adopted the 250V after two field plate from adopting separately the 125V of grid field plate to bring up to, and reduces gate leakage capacitance, improve the linearity and the stability of device
2. adopt super-junction structures.See the GaNbasedsuperheterojunctionfieldeffecttransistorsusingth epolarizationjunctionconcept of AkiraNakajima, YasunobuSumida, MaheshH.Have 2DEG and 2DEH in this device architecture simultaneously, when grid forward bias, there is not any change in the concentration of 2DEG, therefore the conducting resistance of device can not increase, when gate backbias, 2DEG in raceway groove can exhaust due to electric discharge, thus improves the puncture voltage (being increased to 560V from 110V) of device, and conducting resistance is 6.1m Ω cm
2.
Summary of the invention
The present invention in order to overcome above-mentioned deficiency, provide a kind of take into account puncture voltage increase and the reduction of conducting resistance, and the one that improve the frequency performance of device is based on groove grid high tension apparatus.
Technical scheme of the present invention is as follows:
A kind of based on groove grid high tension apparatus, comprise substrate successively from bottom to top, GaN resilient coating, GaN channel layer, AlN separator, intrinsic AlGaN layer and AlGaN potential barrier, described AlGaN potential barrier is interval with source electrode, grid and compound drain electrode, also AlGaN potential barrier is provided with between described grid and compound drain electrode, the linear AlGaN layer of extension above the subregion of AlGaN potential barrier, above the subregion of linear AlGaN layer, extension has p-GaN layer, p-GaN layer is provided with base stage, the top layer of said structure is also deposited with passivation layer in interval, be deposited with in the interval of described passivation layer and add thick electrode.
Described substrate is one or more in sapphire, carborundum, GaN and MgO.
In described AlGaN potential barrier, the constituent content of Al is between 0 ~ 1, and the constituent content of Ga and the constituent content sum of Al are 1.
In described linear AlGaN layer, the component content of Al is between 0 ~ 1, and is linearly increased to y from x, and the thickness of linear AlGaN layer is L, and wherein the Al constituent content at arbitrary thickness L1 place is (y-x) × L1/L.
SiN, Al is comprised in described passivation layer
2o
3and HFO
2in one or more.
P-GaN layer between described grid and compound drain electrode and the simultaneous peak width d of linear AlGaN layer
1> 0, only the peak width d of linear AlGaN layer
2> 0, only has the peak width of AlGaN potential barrier to be d
3>=0.5 μm.
Wherein, GaN channel layer can replace with AlGaN channel layer, and during with AlGaN channel layer, in AlGaN channel layer, the constituent content of Al is less than the constituent content of Al in AlGaN potential barrier.P-GaN layer can replace by InGaN layer, and when using InGaN layer, the constant or In component of the constituent content of In increases gradually.
The present invention is a kind of based on groove grid high tension apparatus, the linear AlGaN layer of extension above the subregion of the AlGaN potential barrier between grid and drain electrode, and extension has p-GaN layer above the subregion of linear AlGaN layer, and preparation has electrode in p-GaN layer.P-GaN epitaxial loayer and the simultaneous region of linear AlGaN layer between grid and drain electrode are referred to as first area, and only the region of linear AlGaN layer is referred to as second area, only has the region of AlGaN potential barrier to be called the 3rd region.Such structure can make device when conducting state, namely during gate electrode voltage >=0V, the increase of AlGaN/GaN interface 2DEG concentration immediately below first area is almost identical with the increase of the 2DEG concentration of the AlGaN/GaN interface immediately below second area, all be greater than the 2DEG concentration in the 3rd region, therefore the resistance of first area and second area reduces all to some extent, and the conducting resistance of device have also been obtained reduction; When device is in cut-off state, namely during gate electrode voltage≤threshold voltage, 2DEG in grid lower channel is depleted, meanwhile because base electrode is electrically connected with gate electrode, therefore the 2DEG concentration immediately below first area reduces to some extent, is even reduced to 50%, and the depletion region of device is widened to some extent, the region bearing high electric field is widened, and device electric breakdown strength is improved; In addition, the 2DEG concentration immediately below second area is identical with during conducting state, is conducive to the redistribution of electric field, and the 3rd region guarantees that peak electric field there will not be in drain electrode, and device electric breakdown strength is improved again.Therefore the conducting resistance of this structure when break-over of device is reduced, and the puncture voltage when cut-off state is improved, and has taken into account the raising of device electric breakdown strength and the reduction of conducting resistance.Device adopts slot grid structure simultaneously, enhances the regulating and controlling effect of grid to raceway groove 2DEG, improves the frequency performance of device.
Above-mentioned a kind of making step based on groove grid high tension apparatus is as follows:
(1) the linear AlGaN/AlGaN/GaN material of epitaxially grown p-GaN/ is carried out to the step of organic washing;
(2) photoetching and dry etching are carried out to the linear AlGaN/AlGaN/GaN material of the p-GaN/ cleaned up,
Be formed with the step of region meas;
(3) photoetching is carried out to the linear AlGaN/AlGaN/GaN material of the p-GaN/ preparing table top, form the etched area of p-GaN and linear AlGaN layer, put into ICP dry etching reative cell again, by the step that the p-GaN layer above Zone Full between grid and source electrode and the drain electrode of grid, source electrode and compound and linear AlGaN layer all etch away;
(4) photoetching is carried out to device, then put into electron beam evaporation platform deposit metal ohmic contact Ti/Al/Ni/Au, and peel off, finally in nitrogen environment, carry out 850 DEG C, the rapid thermal annealing of 35s, form the step of ohmic contact;
(5) photoetching is carried out to the device preparing ohmic contact, form the etched area of p-GaN layer, put into ICP dry etching reative cell again, the p-GaN layer of subregion between grid and compound drain electrode is etched away, the first area simultaneously between formation grid and compound drain electrode and the step of second area;
(6) photoetching is carried out to device, form base region, then put into electron beam evaporation platform deposit Ni/Au and peel off, finally in atmospheric environment, carrying out 550 DEG C, the annealing of 10min, form the step of base ohmic contact;
(7) carrying out photoetching to completing device prepared by base stage, forming grid etch region, then putting into ICP dry etching reative cell, AlGaN potential barrier being etched away 5 ~ 10nm, and then removes etch residue, forming the step of slot grid structure;
(8) photoetching is carried out to device, form gate metal, grid source field plate and drain electrode field plate region, drain electrode and the drain electrode of drain electrode field plate composition compound, then put into electron beam evaporation platform deposit Ni/Au=20/200nm and peel off, completing the step of the preparation of gate electrode, grid source field plate and drain electrode field plate;
(9) device completing gate electrode and prepared by the field plate that drains is put into the step of PECVD reative cell deposit SiN passivating film;
(10) device is cleaned, photoetching development, the step that etches away of SiN film that source electrode, grid and compound drain electrodes are covered;
(11) device is cleaned again, photoetching development, and put into electron beam evaporation platform deposit Ti/Au and add thick electrode, complete the preparation of integral device.
Wherein, in step (1), adopt the washed with de-ionized water of flowing and put into HCl:H
2carry out corrosion 30 ~ 60s in the solution of O=1:1, finally with flowing washed with de-ionized water and dry up with high pure nitrogen;
In step (3), the process conditions in ICP dry etching reative cell are: upper electrode power is 200W, and lower electrode power is 20W, and chamber pressure is 1.5Pa, Cl
2flow be 10sccm, N
2flow be 10sccm, etch period is 5min ~ 8min;
In step (5), the process conditions in ICP dry etching reative cell are: upper electrode power is 200W, and lower electrode power is 20W, and chamber pressure is 1.5Pa, Cl
2flow be 10sccm, N
2flow be 10sccm, etch period is 3min ~ 5min; In this step, first area is p-GaN layer and the simultaneous region of linear AlGaN layer, and second area is the region of only linear AlGaN layer;
In step (9), the process conditions of PECVD reative cell are: SiH
4flow be 40sccm, NH
3flow be 10sccm, chamber pressure is 1 ~ 2Pa, and radio-frequency power is 40W, the SiN passivating film that deposit 200nm ~ 300nm is thick;
In step (10), the process conditions in ICP dry etching reative cell are: upper electrode power is 200W, and lower electrode power is 20W, and chamber pressure is 1.5Pa, CF
4flow be 20sccm, the flow of argon gas is 10sccm, and etch period is 10min.
Beneficial effect of the present invention is as follows:
1. the present invention adopts first area between device gate-drain, the 2DEG concentration of the formation in second area and the 3rd region first area and second area when making break-over of device increases, and resistance is reduced, and reaches the object reducing device on-resistance;
2. the present invention adopt first area between device gate-drain, the formation in second area and the 3rd region when device is ended the 2DEG of first area reduced, second area is identical with during break-over of device with the 2DEG in the 3rd region, add the width of device depletion region, change Electric Field Distribution, reach the object improving device electric breakdown strength
3. the present invention adopts slot grid structure, enhances the control action of grid to raceway groove 2DEG, improves the frequency performance of device.
Accompanying drawing explanation
Fig. 1 is a kind of structural representation based on groove grid high tension apparatus in the present invention;
Fig. 2 is Making programme figure of the present invention.
Embodiment
In order to make objects and advantages of the present invention clearly understand, below in conjunction with drawings and Examples, the present invention is further elaborated.Should be appreciated that specific embodiment described herein only in order to explain the present invention, be not intended to limit the present invention.
One is as shown in Figure 1 based on groove grid high tension apparatus, comprise substrate 1 successively from bottom to top, GaN resilient coating 2, GaN channel layer 3, AlN separator 4, intrinsic AlGaN layer 5 and AlGaN potential barrier 6, described AlGaN potential barrier 6 is interval with source electrode 7, grid 8 and compound drain electrode 9, AlGaN potential barrier 6 is also provided with between described grid 8 and compound drain electrode 9, the linear AlGaN layer 10 of extension above the subregion of AlGaN potential barrier 6, above the subregion of linear AlGaN layer 10, extension has p-GaN11, p-GaN layer 11 is provided with base stage 12, the top layer of said structure is also deposited with passivation layer 13 in interval, be deposited with in the interval of described passivation layer 13 and add thick electrode 14.Wherein, described substrate 1 is one or more in sapphire, carborundum, GaN and MgO.In described AlGaN potential barrier 6, the constituent content of Al is between 0 ~ 1, and the constituent content of Ga and the constituent content sum of Al are 1.In described linear AlGaN layer, the component content of Al is between 0 ~ 1, and is linearly increased to y from x, and the thickness of linear AlGaN layer is L, and wherein the Al constituent content at arbitrary thickness L1 place is (y-x) × L1/L.SiN, Al is comprised in described passivation layer 13
2o
3and HFO
2in one or more.P-GaN layer 11 between described grid 8 and compound drain electrode 9 and the simultaneous peak width d of linear AlGaN layer 10
1> 0, only the peak width d of linear AlGaN layer 10
2> 0, only has the peak width of AlGaN potential barrier to be d
3>=0.5 μm.
In said structure, GaN channel layer 3 can replace with AlGaN channel layer, and during with AlGaN channel layer, in AlGaN channel layer, the constituent content of Al is less than the constituent content of Al in AlGaN potential barrier 6.P-GaN layer 11 can replace by InGaN layer, and when using InGaN layer, the constant or In component of the constituent content of In increases gradually.
The linear AlGaN layer of extension above the subregion of the AlGaN potential barrier of the present invention between grid and drain electrode, and extension has p-GaN layer above the subregion of linear AlGaN layer, and in p-GaN layer, preparation has electrode.P-GaN epitaxial loayer and the simultaneous region of linear AlGaN layer between grid and drain electrode are referred to as first area, and only the region of linear AlGaN layer is referred to as second area, only has the region of AlGaN potential barrier to be called the 3rd region.Such structure can make device when conducting state, namely during gate electrode voltage >=0V, the increase of AlGaN/GaN interface 2DEG concentration immediately below first area is almost identical with the increase of the 2DEG concentration of the AlGaN/GaN interface immediately below second area, all be greater than the 2DEG concentration in the 3rd region, therefore the resistance of first area and second area reduces all to some extent, and the conducting resistance of device have also been obtained reduction; When device is in cut-off state, namely during gate electrode voltage≤threshold voltage, 2DEG in grid lower channel is depleted, meanwhile because base electrode is electrically connected with gate electrode, therefore the 2DEG concentration immediately below first area reduces to some extent, is even reduced to 50%, and the depletion region of device is widened to some extent, the region bearing high electric field is widened, and device electric breakdown strength is improved; In addition, the 2DEG concentration immediately below second area is identical with during conducting state, is conducive to the redistribution of electric field, and the 3rd region guarantees that peak electric field there will not be in drain electrode, and device electric breakdown strength is improved again.Therefore the conducting resistance of this structure when break-over of device is reduced, and the puncture voltage when cut-off state is improved, and has taken into account the raising of device electric breakdown strength and the reduction of conducting resistance.Device adopts slot grid structure simultaneously, enhances the regulating and controlling effect of grid to raceway groove 2DEG, improves the frequency performance of device.
As shown in Figure 2, making step of the present invention is as follows:
(1) the linear AlGaN/AlGaN/GaN material of epitaxially grown p-GaN/ is carried out to the step of organic washing, adopt the washed with de-ionized water of flowing in this step and put into HCl:H
2carry out corrosion 30 ~ 60s in the solution of O=1:1, finally with flowing washed with de-ionized water and dry up with high pure nitrogen;
(2) photoetching and dry etching are carried out to the linear AlGaN/AlGaN/GaN material of the p-GaN/ cleaned up, be formed with the step of region meas;
(3) photoetching is carried out to the linear AlGaN/AlGaN/GaN material of the p-GaN/ preparing table top, form the etched area of p-GaN and linear AlGaN layer, put into ICP dry etching reative cell again, p-GaN layer above grid, source electrode and drain electrode and linear AlGaN layer are all etched away, form the step in the 3rd region between grid and source electrode, process conditions in this step in ICP dry etching reative cell are: upper electrode power is 200W, lower electrode power is 20W, chamber pressure is 1.5Pa, Cl
2flow be 10sccm, N
2flow be 10sccm, etch period is 5min ~ 8min;
(4) photoetching is carried out to device, then put into electron beam evaporation platform deposit metal ohmic contact Ti/Al/Ni/Au=20/120/45/50nm, and peel off, finally in nitrogen environment, carry out 850 DEG C, the rapid thermal annealing of 35s, forms the step of ohmic contact;
(5) photoetching is carried out to the device preparing ohmic contact, form the etched area of p-GaN layer, put into ICP dry etching reative cell again, the p-GaN layer of subregion between grid and drain electrode is etched away, first area simultaneously between formation grid and drain electrode and the step of second area, first area is p-GaN layer and the simultaneous region of linear AlGaN layer, second area is the region of only linear AlGaN layer, process conditions in this step in ICP dry etching reative cell are: upper electrode power is 200W, lower electrode power is 20W, chamber pressure is 1.5Pa, Cl
2flow be 10sccm, N
2flow be 10sccm, etch period is 3min ~ 5min,
(6) photoetching is carried out to device, form base region, then put into electron beam evaporation platform deposit Ni/Au=20/20nm and peel off, finally in atmospheric environment, carrying out 550 DEG C, the annealing of 10min, form the step of base ohmic contact;
(7) photoetching is carried out to completing device prepared by base stage, form grid etch region, put into ICP dry etching reative cell again, AlGaN potential barrier is etched away 5 ~ 10nm, and then removes etch residue, form the step of slot grid structure, process conditions in this step in ICP dry etching reative cell are: upper electrode power is 200W, lower electrode power is 20W, and chamber pressure is 1.5Pa, Cl
2flow be 10sccm, N
2flow be 10sccm, and by HCl:H
2process 30s in O=1:1 solution, remove etch residue;
(8) photoetching is carried out to device, form gate metal, grid source field plate and drain electrode field plate region, drain electrode field plate and the drain electrode of drain electrode composition compound, then put into electron beam evaporation platform deposit Ni/Au=20/200nm and peel off, completing the step of the preparation of gate electrode, grid source field plate and drain electrode field plate;
(9) device completing gate electrode and prepared by the field plate that drains is put into the step of PECVD reative cell deposit SiN passivating film, in this step, the process conditions of PECVD reative cell are: SiH
4flow be 40sccm, NH
3flow be 10sccm, chamber pressure is 1 ~ 2Pa, and radio-frequency power is 40W, the SiN passivating film that deposit 200nm ~ 300nm is thick;
(10) device is cleaned, photoetching development, by the step that the SiN film that source electrode, grid and compound drain electrodes cover etches away, process conditions in this step in ICP dry etching reative cell are: upper electrode power is 200W, lower electrode power is 20W, chamber pressure is 1.5Pa, CF
4flow be 20sccm, the flow of argon gas is 10sccm, and etch period is 10min;
(11) device is cleaned again, photoetching development, and put into electron beam evaporation platform deposit Ti/Au=20/200nm add thick electrode, complete the preparation of integral device.
The above is only the preferred embodiment of the present invention; it should be pointed out that for those skilled in the art, under the premise without departing from the principles of the invention; can also make some improvements and modifications, these improvements and modifications also should be considered as protection scope of the present invention.
Claims (10)
1. one kind based on groove grid high tension apparatus, it is characterized in that, comprise substrate successively from bottom to top, GaN resilient coating, GaN channel layer, AlN separator, intrinsic AlGaN layer and AlGaN potential barrier, described AlGaN potential barrier is interval with source electrode, grid and compound drain electrode, linear AlGaN potential barrier is also provided with between described grid and compound drain electrode, the linear AlGaN layer of extension above the subregion of AlGaN potential barrier, above the subregion of linear AlGaN layer, extension has p-GaN layer, p-GaN layer is provided with base stage, the top layer of said structure is also deposited with passivation layer in interval, be deposited with in the interval of described passivation layer and add thick electrode.
2. one according to claim 1 is based on groove grid high tension apparatus, it is characterized in that, described substrate is one or more in sapphire, carborundum, GaN and MgO.
3. one according to claim 1 is based on groove grid high tension apparatus, it is characterized in that, in described AlGaN potential barrier, the constituent content of Al is between 0 ~ 1, and the constituent content of Ga and the constituent content sum of Al are 1.
4. one according to claim 1 is based on groove grid high tension apparatus, it is characterized in that, in described linear AlGaN layer, the component content of Al is between 0 ~ 1, and be linearly increased to y from x, the thickness of linear AlGaN layer is L, and wherein the Al constituent content at arbitrary thickness L1 place is (y-x) × L1/L.
5. one according to claim 1 is based on groove grid high tension apparatus, it is characterized in that, comprises SiN, Al in described passivation layer
2o
3and HFO
2in one or more.
6. one according to claim 1 is based on groove grid high tension apparatus, it is characterized in that, the p-GaN layer between described grid and compound drain electrode and the simultaneous peak width d of linear AlGaN layer
1> 0, only the peak width d of linear AlGaN layer
2> 0, only has the peak width of AlGaN potential barrier to be d
3>=0.5 μm.
7. one according to any one of claim 1 to 6 is based on groove grid high tension apparatus, it is characterized in that, replace GaN channel layer with AlGaN channel layer, in AlGaN channel layer, the constituent content of Al is less than the constituent content of Al in AlGaN potential barrier.
8. one according to claim 7 is based on groove grid high tension apparatus, it is characterized in that, replaces p-GaN layer by InGaN layer.
9. based on a manufacture method for groove grid high tension apparatus, it is characterized in that, comprising:
(1) the linear AlGaN/AlGaN/GaN material of epitaxially grown p-GaN/ is carried out to the step of organic washing;
(2) photoetching and dry etching are carried out to the linear AlGaN/AlGaN/GaN material of the p-GaN/ cleaned up, be formed with the step of region meas;
(3) photoetching is carried out to the linear AlGaN/AlGaN/GaN material of the p-GaN/ preparing table top, form the etched area of p-GaN and linear AlGaN layer, put into ICP dry etching reative cell again, by the step that the p-GaN layer above Zone Full between grid and source electrode and the drain electrode of grid, source electrode and compound and linear AlGaN layer all etch away;
(4) photoetching is carried out to device, then put into electron beam evaporation platform deposit metal ohmic contact Ti/Al/Ni/Au, and peel off, finally in nitrogen environment, carry out 850 DEG C, the rapid thermal annealing of 35s, form the step of ohmic contact;
(5) photoetching is carried out to the device preparing ohmic contact, form the etched area of p-GaN layer, put into ICP dry etching reative cell again, the p-GaN layer of subregion between grid and compound drain electrode is etched away, the first area simultaneously between formation grid and compound drain electrode and the step of second area;
(6) photoetching is carried out to device, form base region, then put into electron beam evaporation platform deposit Ni/Au and peel off, finally in atmospheric environment, carrying out 550 DEG C, the annealing of 10min, form the step of base ohmic contact;
(7) carrying out photoetching to completing device prepared by base stage, forming grid etch region, then putting into ICP dry etching reative cell, AlGaN potential barrier being etched away 5 ~ 10nm, and then removes etch residue, forming the step of slot grid structure;
(8) photoetching is carried out to device, form gate metal and drain electrode field plate region, then put into electron beam evaporation platform deposit Ni/Au and peel off, complete gate electrode and the step prepared of drain electrode field plate;
(9) device completing gate electrode and prepared by the field plate that drains is put into the step of PECVD reative cell deposit SiN passivating film;
(10) device is cleaned, photoetching development, put into ICP dry etching reative cell, the step that etches away of SiN film source electrode, grid and compound drain electrodes covered;
(11) device is cleaned again, photoetching development, and put into electron beam evaporation platform deposit Ti/Au and add thick electrode, complete the preparation of integral device.
10. a kind of manufacture method based on groove grid high tension apparatus according to claim 9, is characterized in that, in step (1), adopts the washed with de-ionized water of flowing and puts into HCl:H
2carry out corrosion 30 ~ 60s in the solution of O=1:1, finally with flowing washed with de-ionized water and dry up with high pure nitrogen;
In step (3), the process conditions in ICP dry etching reative cell are: upper electrode power is 200W, and lower electrode power is 20W, and chamber pressure is 1.5Pa, Cl
2flow be 10sccm, N
2flow be 10sccm, etch period is 5min ~ 8min;
In step (5), the process conditions in ICP dry etching reative cell are: upper electrode power is 200W, and lower electrode power is 20W, and chamber pressure is 1.5Pa, Cl
2flow be 10sccm, N
2flow be 10sccm, etch period is 3min ~ 5min; In this step, first area is p-GaN layer and the simultaneous region of linear AlGaN layer, and second area is the region of only linear AlGaN layer;
In step (7), the process conditions in ICP dry etching reative cell are: upper electrode power is 200W, and lower electrode power is 20W, and chamber pressure is 1.5Pa, Cl
2flow be 10sccm, N
2flow be 10sccm, and by HCl:H
2process 30s in O=1:1 solution, remove etch residue;
In step (9), the process conditions of PECVD reative cell are: SiH
4flow be 40sccm, NH
3flow be 10sccm, chamber pressure is 1 ~ 2Pa, and radio-frequency power is 40W, the SiN passivating film that deposit 200nm ~ 300nm is thick;
In step (10), the process conditions in ICP dry etching reative cell are: upper electrode power is 200W, and lower electrode power is 20W, and chamber pressure is 1.5Pa, CF
4flow be 20sccm, the flow of argon gas is 10sccm, and etch period is 10min.
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