CN104037218A - High-performance AlGaN/GaN HEMT high-voltage element structure based on polarization effect and manufacturing method - Google Patents

High-performance AlGaN/GaN HEMT high-voltage element structure based on polarization effect and manufacturing method Download PDF

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CN104037218A
CN104037218A CN201410312189.8A CN201410312189A CN104037218A CN 104037218 A CN104037218 A CN 104037218A CN 201410312189 A CN201410312189 A CN 201410312189A CN 104037218 A CN104037218 A CN 104037218A
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layer
deposit
electrode
photoetching
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CN104037218B (en
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冯倩
董良
代波
杜锴
郑雪峰
杜鸣
张春福
马晓华
郝跃
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Xidian University
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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof  ; Multistep manufacturing processes therefor
    • H01L29/66Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76Unipolar devices, e.g. field effect transistors
    • H01L29/772Field effect transistors
    • H01L29/778Field effect transistors with two-dimensional charge carrier gas channel, e.g. HEMT ; with two-dimensional charge-carrier layer formed at a heterojunction interface
    • H01L29/7786Field effect transistors with two-dimensional charge carrier gas channel, e.g. HEMT ; with two-dimensional charge-carrier layer formed at a heterojunction interface with direct single heterostructure, i.e. with wide bandgap layer formed on top of active layer, e.g. direct single heterostructure MIS-like HEMT
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof  ; Multistep manufacturing processes therefor
    • H01L29/40Electrodes ; Multistep manufacturing processes therefor
    • H01L29/402Field plates
    • H01L29/404Multiple field plate structures
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof  ; Multistep manufacturing processes therefor
    • H01L29/40Electrodes ; Multistep manufacturing processes therefor
    • H01L29/41Electrodes ; Multistep manufacturing processes therefor characterised by their shape, relative sizes or dispositions
    • H01L29/423Electrodes ; Multistep manufacturing processes therefor characterised by their shape, relative sizes or dispositions not carrying the current to be rectified, amplified or switched
    • H01L29/42312Gate electrodes for field effect devices
    • H01L29/42316Gate electrodes for field effect devices for field-effect transistors
    • H01L29/4232Gate electrodes for field effect devices for field-effect transistors with insulated gate
    • H01L29/42356Disposition, e.g. buried gate electrode
    • H01L29/4236Disposition, e.g. buried gate electrode within a trench, e.g. trench gate electrode, groove gate electrode
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof  ; Multistep manufacturing processes therefor
    • H01L29/66Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/66007Multistep manufacturing processes
    • H01L29/66075Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
    • H01L29/66227Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
    • H01L29/66409Unipolar field-effect transistors
    • H01L29/66431Unipolar field-effect transistors with a heterojunction interface channel or gate, e.g. HFET, HIGFET, SISFET, HJFET, HEMT

Abstract

The invention discloses a high-performance AlGaN/GaN HEMT high-voltage element structure based on a polarization effect and a manufacturing method of the high-performance AlGaN/GaN HEMT high-voltage element structure. The high-performance AlGaN/GaN HEMT high-voltage element structure sequentially comprises a substrate, a GaN buffering layer, an AlN isolation layer, a GaN channel layer, an AlGaN intrinsic layer and an AlGaN doping layer from bottom to top, wherein a source electrode, an organic insulating layer and a drain electrode are arranged on the AlGaN doping layer at intervals, an ITO grid electrode is arranged on the organic insulating layer, another ITO grid electrode is arranged between the organic insulating layer and the source electrode, a passivation layer is arranged between each ITO grid electrode and the source electrode, another passivation layer is arranged between the organic insulating layer and the source electrode, an LiF layer is deposited between the passivation layer and the drain electrode, and an AL metal layer is deposited on the drain electrode and the LiF layer. According to the high-performance AlGaN/GaN HEMT high-voltage element structure based on the polarization effect and the manufacturing method, a dipole layer formed by PTFE and ITO is adopted, the concentration of 2DEG under the area is lowered, the electric field distribution of a grid leak area is changed, and the breakdown voltage of the element is improved.

Description

A kind of high-performance AlGaN/GaN HEMT high-voltage device structure and manufacture method based on polarity effect
Technical field
The present invention relates to microelectronics technology, especially relate to a kind of high-performance AlGaN/GaNHEMT high-voltage device structure based on polarity effect and preparation method thereof.
Background technology
The 3rd bandwidth bandgap semiconductor taking SiC and GaN as representative is large with its energy gap in recent years, breakdown electric field is high, thermal conductivity is high, saturated electrons speed is large and the characteristic such as heterojunction boundary two-dimensional electron gas height, makes it be subject to extensive concern.In theory, utilize the devices such as high electron mobility transistor (HEMT) that these materials make, LED, laser diode LD to there is obvious advantageous characteristic than existing device, therefore researcher has carried out extensive and deep research to it both at home and abroad in the last few years, and has obtained the achievement in research attracting people's attention.
AlGaN/GaN heterojunction high electron mobility transistor (HEMT) is demonstrating advantageous advantage aspect high-temperature device and HIGH-POWERED MICROWAVES device, and pursuit device high-frequency, high pressure, high power have attracted numerous research.In recent years, make higher frequency high pressure AlGaN/GaNHEMT and become the another study hotspot of concern.Due to after AlGaN/GaN heterojunction grown, just there are a large amount of two-dimensional electron gas 2DEG in heterojunction boundary, and its mobility is very high.Aspect raising AlGaN/GaN heterojunction electron mobility transistor puncture voltage, people have carried out a large amount of research, find that puncturing of AlGaN/GaNHEMT device mainly occurs in grid by drain terminal, therefore to improve the puncture voltage of device, must make the electric field redistribution in grid leak region, especially reduce the electric field of grid by drain terminal, for this reason, people have proposed to adopt the method for field plate structure; Aspect raising AlGaN/GaN heterojunction electron mobility transistor frequency characteristic, use slot grid structure, allow gate electrode have better control effect to 2DEG.
(1) field plate structure is specifically referring to Yuji Ando, Akio Wakejima, the Novel AlGaN/GaN dual-field-plate FET with high gain of Yasuhiro Okamoto etc., increased linearity and stability, IEDM2005, pp.576-579,2005.In AlGaN/GaNHEMT device, adopt field plate structure, the puncture voltage of device significantly can be improved, and can reduce gate leakage capacitance, improved the linearity and the stability of device.
(2) slot grid structure is specifically referring to W.B.Lanford, T.Tanaka, the Recessed-gate enhancement-mode GaN HEMT with high threshold voltage of Y.Otoki etc., ELECTRONICS LETTERS2005, Vol.41, No.7,2005.In AlGaN/GaNHEMT device, adopt slot grid structure can effectively increase the frequency characteristic of device.
Summary of the invention
The present invention, in order to overcome above-mentioned deficiency, provides a kind of composite field plate high-performance AlGaN/GaNHEMT device based on polarity effect and preparation method thereof.
Technical scheme of the present invention is as follows:
A kind of high-performance AlGaN/GaNHEMT high-voltage device structure based on polarity effect, comprise successively from the bottom up substrate, GaN resilient coating, AlN separator, GaN channel layer, AlGaN intrinsic layer and AlGaN doped layer, on described AlGaN doped layer, be interval with source electrode, organic insulator and drain electrode, described organic insulator is provided with ITO gate electrode, between described organic insulator and described source electrode, be provided with ITO gate electrode, between described ITO gate electrode and source electrode, be provided with passivation layer, between described organic insulator and drain electrode, be provided with passivation layer, between described passivation layer and drain electrode, be deposited with LiF layer, on described drain electrode and described LiF layer, be deposited with AL metal level.
Described backing material is sapphire, carborundum, GaN or MgO.
In described AlGaN doped layer, the constituent content of Al is between 0~1, and the constituent content sum of the constituent content of Ga and Al is 1.
Described organic insulator is PTFE layer, and the thickness of described PTFE layer is 200nm~300nm.
Described passivation layer comprises one or more in Si3N4, Al2O3, HfO2 and HfSiO.
The above-mentioned high-performance AlGaN/GaNHEMT high-voltage device structure based on polarity effect is made by the following method:
(1) epitaxially grown AlGaN/GaN material is carried out to organic washing, by mobile washed with de-ionized water and put into HCl:H 2in the solution of O=1:1, corrode 30~60s, finally dry up by mobile washed with de-ionized water and with high pure nitrogen;
(2) the AlGaN/GaN material cleaning up is carried out to photoetching and dry etching, be formed with source region table top;
(3) the AlGaN/GaN material for preparing table top is carried out to photoetching, form source-drain area, put into electron beam evaporation platform deposit metal ohmic contact Ti/Al/Ni/Au=(20/120/45/50nm) and peel off, the last rapid thermal annealing that carries out 850 DEG C of 35s in nitrogen environment, forms ohmic contact;
(4) device that completes alloy is carried out to photoetching, form organic dielectric PTFE depositing region, then put into oxygen plasma treatment chamber mild oxidation treatments is carried out in AlGaN surface, then put into electron beam evaporation platform: reative cell vacuum is evacuated to 4.0*10 -3handkerchief, it is 0.1nm/s that slow making alive makes to control PTFE evaporation rate, the PTFE film that deposit 200~300nm is thick;
(5) device of the good PTFE medium of deposit is put into acetone soln and soak 30-60min, carry out ultrasonic peeling off;
(6) device that completes evaporation deposition is carried out to photoetching, form grid etch region, put into ICP dry etching reative cell, remove etch residue;
(7) device that completes etching is carried out to photoetching, form grid and grid field plate region, put into the ITO grid metal that electron beam evaporation platform deposit 200nm is thick;
(8) device of good deposit gate electrode and grid field plate is put into acetone soln and soak 30~60min, carry out ultrasonic peeling off, form grid field plate structure;
(9) carry out photoetching by completing device prepared by grid, form the depositing region of dielectric LiF, then put into electron-beam reaction chamber vacuum and be evacuated to 4.0*10 -3handkerchief, it is 0.5nm/s that slow making alive makes to control LiF evaporation rate, the LiF film that deposit 100~200nm is thick;
(10) device of the good LiF medium of deposit is put into acetone soln and soak 30~60min, carry out ultrasonic peeling off;
(11) again carry out photoetching to completing device prepared by LiF, form field plate region, source, put into the thick Al metal of electron beam evaporation platform deposit 200nm;
(12) device of the good Al metal of deposit is put into acetone soln and soak 30~60min, carry out ultrasonic peeling off, form source field plate structure;
(13) device completing is put into PECVD reative cell deposit SiN passivating film;
(14) device is cleaned again, photoetching development, form the etched area of SiN film, and put into ICP dry etching reative cell, the SiN film that source electrode, drain electrode are covered above etches away;
(15) device is cleaned, photoetching development, and put into the thick electrode that adds of electron beam evaporation platform deposit Ti/Au=20/200nm, complete the preparation of integral device.
Process conditions in described step (6) ICP dry etching reative cell are: upper electrode power is 200W, and lower electrode power is 20W, and chamber pressure is 1.5Pa, Cl 2flow be 10sccm, N 2flow be 10sccm, AlGaN barrier layer is etched away to 5~10nm, then device is put into HCl:H 2in O=1:1 solution, process 30s.
Process conditions in described step (13) PECVD reative cell are: SiH 4flow be 40sccm, NH 3flow be 10sccm, chamber pressure is 1~2Pa, radio-frequency power is 40W, the SiN passivating film that deposit 200nm~300nm is thick.
Process conditions in described step (14) ICP dry etching reative cell are: upper electrode power is 200W, and lower electrode power is 20W, and chamber pressure is 1.5Pa, CF 4flow be 20sccm, the flow of Ar gas is 10sccm, etch period is 10min.
The invention has the beneficial effects as follows:
(1) this device has used the dipole layer that PTFE and ITO form, and has reduced the concentration of 2DEG under this region, has changed the Electric Field Distribution in grid leak region, has improved the puncture voltage of device;
(2) this device has used the dipole layer that LiF and Al form, and has improved the 2DEG concentration under this region, has reduced the conducting resistance between device grid leak;
(3) this device has used slot grid structure, has increased the control ability of gate electrode to the 2DEG concentration under grid, has improved the frequency characteristic of device.
(4) this device adopts ITO and Al form respectively grid field plate and leak field plate simultaneously, has again changed the Electric Field Distribution in grid leak region, has improved the puncture voltage of device.
Brief description of the drawings
Examples of the present invention will be described by way of reference to the accompanying drawings, wherein:
Fig. 1 is schematic diagram of the present invention;
Fig. 2 is making flow chart of the present invention.
Embodiment
In conjunction with the accompanying drawings, the present invention is further detailed explanation.These accompanying drawings are the schematic diagram of simplification, and basic structure of the present invention is only described in a schematic way, and therefore it only shows the formation relevant with the present invention.
As shown in Figure 1, the present embodiment provides a kind of high-performance AlGaN/GaNHEMT high-voltage device structure based on polarity effect, comprise successively from the bottom up substrate, GaN resilient coating, AlN separator, GaN channel layer, AlGaN intrinsic layer and AlGaN doped layer, on described AlGaN doped layer, be interval with source electrode, organic insulator and drain electrode, described organic insulator is provided with ITO gate electrode, between described organic insulator and described source electrode, be provided with ITO gate electrode, between described ITO gate electrode and source electrode, be provided with passivation layer, between described organic insulator and drain electrode, be provided with passivation layer, between described passivation layer and drain electrode, be deposited with LiF layer, on described drain electrode and described LiF layer, be deposited with AL metal level, wherein, described backing material is sapphire, carborundum, GaN or MgO, in described AlGaN doped layer, the constituent content of Al is between 0~1, the constituent content sum of the constituent content of Ga and Al is 1, described organic insulator is PTFE layer, the thickness of described PTFE layer is 200nm~300nm, described passivation layer comprises Si3N4, Al2O3, one or more in HfO2 and HfSiO.
Originally be embodied near the deposit PTFE film of grid, dipole after PTFE polarization thereon surface produces positive charge, its lower surface produces negative electrical charge, the 2DEG on GaN surface is produced to depletion action, reduce the 2DEG concentration of grid leak regional area, change Electric Field Distribution, increased the puncture voltage of device; Near deposit LiF film drain electrode, the dipole after LiF polarization thereon surface produces negative electrical charge, and its lower surface produces positive charge, and 2DEG concentration is produced to humidification, has increased the 2DEG concentration of LiF dielectric below, has reduced conducting resistance; Utilize ITO and Al form respectively grid field plate and leak field plate structure simultaneously, improved the puncture voltage of device; Adopt slot grid structure, increased the control action of grid voltage to 2DEG, improved the frequency characteristic of device.
As shown in Figure 2, making step of the present invention is as follows:
(1) epitaxially grown AlGaN/GaN material is carried out to organic washing, by mobile washed with de-ionized water and put into HCl:H 2in the solution of O=1:1, corrode 30~60s, finally dry up by mobile washed with de-ionized water and with high pure nitrogen;
(2) the AlGaN/GaN material cleaning up is carried out to photoetching and dry etching, be formed with source region table top;
(3) the AlGaN/GaN material for preparing table top is carried out to photoetching, form source-drain area, put into electron beam evaporation platform deposit metal ohmic contact Ti/Al/Ni/Au=(20/120/45/50nm) and peel off, the last rapid thermal annealing that carries out 850 DEG C of 35s in nitrogen environment, forms ohmic contact;
(4) device that completes alloy is carried out to photoetching, form organic dielectric PTFE depositing region, then put into oxygen plasma treatment chamber mild oxidation treatments is carried out in AlGaN surface, then put into electron beam evaporation platform: reative cell vacuum is evacuated to 4.0*10 -3handkerchief, it is 0.1nm/s that slow making alive makes to control PTFE evaporation rate, the PTFE film that deposit 200~300nm is thick;
(5) device of the good PTFE medium of deposit is put into acetone soln and soak 30-60min, carry out ultrasonic peeling off;
(6) device that completes evaporation deposition is carried out to photoetching, form grid etch region, put into ICP dry etching reative cell, process conditions are: upper electrode power is 200W, and lower electrode power is 20W, and chamber pressure is 1.5Pa, Cl 2flow be 10sccm, N 2flow be 10sccm, AlGaN barrier layer is etched away to 5~10nm, then device is put into HCl:H 2in O=1:1 solution, process 30s, remove etch residue;
(7) device that completes etching is carried out to photoetching, form grid and grid field plate region, put into the ITO grid metal that electron beam evaporation platform deposit 200nm is thick;
(8) device of good deposit gate electrode and grid field plate is put into acetone soln and soak 30~60min, carry out ultrasonic peeling off, form grid field plate structure;
(9) carry out photoetching by completing device prepared by grid, form the depositing region of dielectric LiF, then put into electron-beam reaction chamber vacuum and be evacuated to 4.0*10 -3handkerchief, it is 0.5nm/s that slow making alive makes to control LiF evaporation rate, the LiF film that deposit 100~200nm is thick;
(10) device of the good LiF medium of deposit is put into acetone soln and soak 30~60min, carry out ultrasonic peeling off;
(11) again carry out photoetching to completing device prepared by LiF, form field plate region, source, put into the thick Al metal of electron beam evaporation platform deposit 200nm;
(12) device of the good Al metal of deposit is put into acetone soln and soak 30~60min, carry out ultrasonic peeling off, form source field plate structure;
(13) device completing is put into PECVD reative cell deposit SiN passivating film, SiH 4flow be 40sccm, NH 3flow be 10sccm, chamber pressure is 1~2Pa, radio-frequency power is 40W, the SiN passivating film that deposit 200nm~300nm is thick;
(14) device is cleaned again, photoetching development, form the etched area of SiN film, and put into ICP dry etching reative cell, process conditions are: upper electrode power is 200W, lower electrode power is 20W, chamber pressure is 1.5Pa, CF 4flow be 20sccm, the flow of Ar gas is 10sccm, etch period is 10min, and source electrode, the SiN film that covers above of drain electrode are etched away;
(15) device is cleaned, photoetching development, and put into the thick electrode that adds of electron beam evaporation platform deposit Ti/Au=20/200nm, complete the preparation of integral device.
The above is only the preferred embodiment of the present invention; it should be pointed out that for those skilled in the art, under the premise without departing from the principles of the invention; can also make some improvements and modifications, these improvements and modifications also should be considered as protection scope of the present invention.

Claims (9)

1. the high-performance AlGaN/GaNHEMT high-voltage device structure based on polarity effect, it is characterized in that, comprise successively from the bottom up substrate, GaN resilient coating, AlN separator, GaN channel layer, AlGaN intrinsic layer and AlGaN doped layer, on described AlGaN doped layer, be interval with source electrode, organic insulator and drain electrode, described organic insulator is provided with ITO gate electrode, between described organic insulator and described source electrode, be provided with ITO gate electrode, between described ITO gate electrode and source electrode, be provided with passivation layer, between described organic insulator and drain electrode, be provided with passivation layer, between described passivation layer and drain electrode, be deposited with LiF layer, on described drain electrode and described LiF layer, be deposited with AL metal level.
2. the high-performance AlGaN/GaNHEMT high-voltage device structure based on polarity effect according to claim 1, is characterized in that, described backing material is sapphire, carborundum, GaN or MgO.
3. the high-performance AlGaN/GaNHEMT high-voltage device structure based on polarity effect according to claim 1, is characterized in that, in described AlGaN doped layer, the constituent content of Al is between 0~1, and the constituent content sum of the constituent content of Ga and Al is 1.
4. the high-performance AlGaN/GaNHEMT high-voltage device structure based on polarity effect according to claim 1, is characterized in that, described organic insulator is PTFE layer, and the thickness of described PTFE layer is 200nm~300nm.
5. the high-performance AlGaN/GaNHEMT high-voltage device structure based on polarity effect according to claim 1, is characterized in that, described passivation layer comprises one or more in Si3N4, Al2O3, HfO2 and HfSiO.
6. a manufacture method for the high-performance AlGaN/GaNHEMT high-voltage device structure based on polarity effect, is characterized in that, comprises the steps:
(1) epitaxially grown AlGaN/GaN material is carried out to organic washing, by mobile washed with de-ionized water and put into HCl:H 2in the solution of O=1:1, corrode 30~60s, finally dry up by mobile washed with de-ionized water and with high pure nitrogen;
(2) the AlGaN/GaN material cleaning up is carried out to photoetching and dry etching, be formed with source region table top;
(3) the AlGaN/GaN material for preparing table top is carried out to photoetching, form source-drain area, put into electron beam evaporation platform deposit metal ohmic contact Ti/Al/Ni/Au=(20/120/45/50nm) and peel off, the last rapid thermal annealing that carries out 850 DEG C of 35s in nitrogen environment, forms ohmic contact;
(4) device that completes alloy is carried out to photoetching, form organic dielectric PTFE depositing region, then put into oxygen plasma treatment chamber mild oxidation treatments is carried out in AlGaN surface, then put into electron beam evaporation platform: reative cell vacuum is evacuated to 4.0*10 -3handkerchief, it is 0.1nm/s that slow making alive makes to control PTFE evaporation rate, the PTFE film that deposit 200~300nm is thick;
(5) device of the good PTFE medium of deposit is put into acetone soln and soak 30-60min, carry out ultrasonic peeling off;
(6) device that completes evaporation deposition is carried out to photoetching, form grid etch region, put into ICP dry etching reative cell, remove etch residue;
(7) device that completes etching is carried out to photoetching, form grid and grid field plate region, put into the ITO grid metal that electron beam evaporation platform deposit 200nm is thick;
(8) device of good deposit gate electrode and grid field plate is put into acetone soln and soak 30~60min, carry out ultrasonic peeling off, form grid field plate structure;
(9) carry out photoetching by completing device prepared by grid, form the depositing region of dielectric LiF, then put into electron-beam reaction chamber vacuum and be evacuated to 4.0*10 -3handkerchief, it is 0.5nm/s that slow making alive makes to control LiF evaporation rate, the LiF film that deposit 100~200nm is thick;
(10) device of the good LiF medium of deposit is put into acetone soln and soak 30~60min, carry out ultrasonic peeling off;
(11) again carry out photoetching to completing device prepared by LiF, form field plate region, source, put into the thick Al metal of electron beam evaporation platform deposit 200nm;
(12) device of the good Al metal of deposit is put into acetone soln and soak 30~60min, carry out ultrasonic peeling off, form source field plate structure;
(13) device completing is put into PECVD reative cell deposit SiN passivating film;
(14) device is cleaned again, photoetching development, form the etched area of SiN film, and put into ICP dry etching reative cell, the SiN film that source electrode, drain electrode are covered above etches away;
(15) device is cleaned, photoetching development, and put into the thick electrode that adds of electron beam evaporation platform deposit Ti/Au=20/200nm, complete the preparation of integral device.
7. the manufacture method of the high-performance AlGaN/GaNHEMT high-voltage device structure based on polarity effect according to claim 6, it is characterized in that, process conditions in described step (6) ICP dry etching reative cell are: upper electrode power is 200W, lower electrode power is 20W, chamber pressure is 1.5Pa, Cl 2flow be 10sccm, N 2flow be 10sccm, AlGaN barrier layer is etched away to 5~10nm, then device is put into HCl:H 2in O=1:1 solution, process 30s.
8. the manufacture method of the high-performance AlGaN/GaNHEMT high-voltage device structure based on polarity effect according to claim 6, is characterized in that, the process conditions in described step (13) PECVD reative cell are: SiH 4flow be 40sccm, NH 3flow be 10sccm, chamber pressure is 1~2Pa, radio-frequency power is 40W, the SiN passivating film that deposit 200nm~300nm is thick.
9. the manufacture method of the composite field plate high-performance AlGaN/GaNHEMT device architecture based on polarity effect according to claim 6, it is characterized in that, process conditions in described step (14) ICP dry etching reative cell are: upper electrode power is 200W, lower electrode power is 20W, chamber pressure is 1.5Pa, CF 4flow be 20sccm, the flow of Ar gas is 10sccm, etch period is 10min.
CN201410312189.8A 2014-07-02 2014-07-02 A kind of high-performance AlGaN/GaN HEMT high-voltage device structure based on polarity effect and manufacture method Expired - Fee Related CN104037218B (en)

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CN105448964A (en) * 2015-11-23 2016-03-30 西安电子科技大学 Composite stepped field plate trench gate AlGaN/GaN HEMT high-voltage device structure and manufacturing method therefor
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