CN103996707A - Gated field plate enhanced AlGaN/GaN HEMT (High Electron Mobility Transistor) device structure and preparation method thereof - Google Patents
Gated field plate enhanced AlGaN/GaN HEMT (High Electron Mobility Transistor) device structure and preparation method thereof Download PDFInfo
- Publication number
- CN103996707A CN103996707A CN201410024945.7A CN201410024945A CN103996707A CN 103996707 A CN103996707 A CN 103996707A CN 201410024945 A CN201410024945 A CN 201410024945A CN 103996707 A CN103996707 A CN 103996707A
- Authority
- CN
- China
- Prior art keywords
- algan
- gan
- layer
- silicide
- field plate
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
- 229910002704 AlGaN Inorganic materials 0.000 title claims abstract description 79
- 238000002360 preparation method Methods 0.000 title claims abstract description 7
- 229910021332 silicide Inorganic materials 0.000 claims abstract description 49
- FVBUAEGBCNSCDD-UHFFFAOYSA-N silicide(4-) Chemical compound [Si-4] FVBUAEGBCNSCDD-UHFFFAOYSA-N 0.000 claims abstract description 49
- 239000000463 material Substances 0.000 claims abstract description 25
- 238000002161 passivation Methods 0.000 claims abstract description 14
- 230000005684 electric field Effects 0.000 claims abstract description 9
- 239000000758 substrate Substances 0.000 claims abstract description 8
- 238000005516 engineering process Methods 0.000 claims abstract description 5
- 238000000034 method Methods 0.000 claims description 21
- 238000001259 photo etching Methods 0.000 claims description 16
- 230000004888 barrier function Effects 0.000 claims description 15
- IJGRMHOSHXDMSA-UHFFFAOYSA-N Atomic nitrogen Chemical compound N#N IJGRMHOSHXDMSA-UHFFFAOYSA-N 0.000 claims description 12
- 230000008569 process Effects 0.000 claims description 12
- 239000007789 gas Substances 0.000 claims description 9
- 238000001312 dry etching Methods 0.000 claims description 8
- 230000006835 compression Effects 0.000 claims description 6
- 238000007906 compression Methods 0.000 claims description 6
- 238000005566 electron beam evaporation Methods 0.000 claims description 6
- 238000005530 etching Methods 0.000 claims description 6
- 239000002184 metal Substances 0.000 claims description 6
- 229910052751 metal Inorganic materials 0.000 claims description 6
- 229910052757 nitrogen Inorganic materials 0.000 claims description 6
- 229910045601 alloy Inorganic materials 0.000 claims description 4
- 239000000956 alloy Substances 0.000 claims description 4
- 238000005260 corrosion Methods 0.000 claims description 4
- 239000008367 deionised water Substances 0.000 claims description 4
- 238000001755 magnetron sputter deposition Methods 0.000 claims description 4
- 238000004151 rapid thermal annealing Methods 0.000 claims description 4
- 230000001105 regulatory effect Effects 0.000 claims description 4
- 229910005883 NiSi Inorganic materials 0.000 claims description 3
- 230000015572 biosynthetic process Effects 0.000 claims description 3
- 238000004519 manufacturing process Methods 0.000 claims description 3
- 239000012159 carrier gas Substances 0.000 claims description 2
- 238000004140 cleaning Methods 0.000 claims description 2
- 230000007797 corrosion Effects 0.000 claims description 2
- 238000000623 plasma-assisted chemical vapour deposition Methods 0.000 claims description 2
- 238000005406 washing Methods 0.000 claims description 2
- 238000001039 wet etching Methods 0.000 claims description 2
- 229910002601 GaN Inorganic materials 0.000 claims 30
- 229910008484 TiSi Inorganic materials 0.000 claims 1
- 229910052782 aluminium Inorganic materials 0.000 claims 1
- 230000005611 electricity Effects 0.000 claims 1
- 229910052733 gallium Inorganic materials 0.000 claims 1
- CPLXHLVBOLITMK-UHFFFAOYSA-N magnesium oxide Inorganic materials [Mg]=O CPLXHLVBOLITMK-UHFFFAOYSA-N 0.000 claims 1
- 229910052594 sapphire Inorganic materials 0.000 claims 1
- 239000010980 sapphire Substances 0.000 claims 1
- 229910010271 silicon carbide Inorganic materials 0.000 claims 1
- 230000008901 benefit Effects 0.000 abstract description 4
- 238000009413 insulation Methods 0.000 abstract 6
- 238000002955 isolation Methods 0.000 abstract 1
- 230000000694 effects Effects 0.000 description 6
- 230000010287 polarization Effects 0.000 description 6
- 230000005533 two-dimensional electron gas Effects 0.000 description 6
- 238000010586 diagram Methods 0.000 description 2
- 239000004065 semiconductor Substances 0.000 description 2
- 241000160765 Erebia ligea Species 0.000 description 1
- 238000005054 agglomeration Methods 0.000 description 1
- 230000002776 aggregation Effects 0.000 description 1
- 238000004458 analytical method Methods 0.000 description 1
- 230000015556 catabolic process Effects 0.000 description 1
- 238000001816 cooling Methods 0.000 description 1
- 230000003247 decreasing effect Effects 0.000 description 1
- 230000007812 deficiency Effects 0.000 description 1
- 238000000151 deposition Methods 0.000 description 1
- 230000008021 deposition Effects 0.000 description 1
- 230000006872 improvement Effects 0.000 description 1
- 238000004377 microelectronic Methods 0.000 description 1
- 239000000203 mixture Substances 0.000 description 1
- 229920006395 saturated elastomer Polymers 0.000 description 1
- 150000003377 silicon compounds Chemical class 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
- H01L29/76—Unipolar devices, e.g. field effect transistors
- H01L29/772—Field effect transistors
- H01L29/778—Field effect transistors with two-dimensional charge carrier gas channel, e.g. HEMT ; with two-dimensional charge-carrier layer formed at a heterojunction interface
- H01L29/7786—Field effect transistors with two-dimensional charge carrier gas channel, e.g. HEMT ; with two-dimensional charge-carrier layer formed at a heterojunction interface with direct single heterostructure, i.e. with wide bandgap layer formed on top of active layer, e.g. direct single heterostructure MIS-like HEMT
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/40—Electrodes ; Multistep manufacturing processes therefor
- H01L29/402—Field plates
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/66007—Multistep manufacturing processes
- H01L29/66075—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
- H01L29/66227—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
- H01L29/66409—Unipolar field-effect transistors
- H01L29/66446—Unipolar field-effect transistors with an active layer made of a group 13/15 material, e.g. group 13/15 velocity modulation transistor [VMT], group 13/15 negative resistance FET [NERFET]
- H01L29/66462—Unipolar field-effect transistors with an active layer made of a group 13/15 material, e.g. group 13/15 velocity modulation transistor [VMT], group 13/15 negative resistance FET [NERFET] with a heterojunction interface channel or gate, e.g. HFET, HIGFET, SISFET, HJFET, HEMT
Landscapes
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Physics & Mathematics (AREA)
- Ceramic Engineering (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Manufacturing & Machinery (AREA)
- Junction Field-Effect Transistors (AREA)
- Electrodes Of Semiconductors (AREA)
Abstract
The invention discloses a gated field plate enhanced AlGaN/GaN HEMT (High Electron Mobility Transistor) device structure and a preparation method thereof. The structure comprises a substrate, an intrinsic GaN layer, an AlN isolation layer, an intrinsic AlGaN layer, an AlGaN doped layer, a p-type GaN layer, a gate electrode, a source electrode, a drain electrode, a gate field plate, an insulation layer, a passivation layer and silicide for adjusting an electric field of a channel, wherein the AlGaN doped layer is located on the intrinsic AlGaN doped layer; the p-type GaN layer is located on the AlGaN doped layer; the source electrode, the drain electrode and the insulation layer are located on the AlGaN layer; the gate electrode is located on the p-type GaN layer; silicide is located on the insulation layer; an enhanced AlGaN/GaN heterojunction material is epitaxially grown on the substrate; the source electrode and the drain electrode are formed on the heterojunction material; then the insulation layer is deposited on the heterojunction material; silicide is formed on the insulation layer; silicide on the thick insulation layer is electrically connected with the gate electrode to form a gate field plate structure; a p-GaN epitaxial layer exists below the gate electrode; an enhanced device is formed; and finally the passivation layer is deposited to achieve passivation of the device. The structure has the advantages of high device frequency and high technology repeatability and controllability.
Description
Technical field
The invention belongs to microelectronics technology, relating to semiconductor device makes, one adds grid field plate enhanced AlGaN/GaN HEMT device architecture and manufacture method specifically, can be used for making the enhancement type high electron mobility transistor of low on-resistance, high-frequency, high-breakdown-voltage.
Background technology
The 3rd bandwidth bandgap semiconductor taking SiC and GaN as representative is large with its energy gap in recent years, breakdown electric field is high, thermal conductivity is high, saturated electrons speed is large and the characteristic such as heterojunction boundary two-dimensional electron gas height, makes it be subject to extensive concern.In theory, utilize the devices such as high electron mobility transistor (HEMT) that these materials make, LED, laser diode LD to there is obvious advantageous characteristic than existing device, therefore researcher has carried out extensive and deep research to it both at home and abroad in the last few years, and has obtained the achievement in research attracting people's attention.
AlGaN/GaN heterojunction high electron mobility transistor (HEMT) is demonstrating advantageous advantage aspect high-temperature device and HIGH-POWERED MICROWAVES device, and pursuit device high-frequency, high pressure, high power have attracted numerous research.In recent years, make higher frequency high pressure AlGaN/GaN HEMT and become the another study hotspot of concern.Due to after AlGaN/GaN heterojunction grown, just there are a large amount of two-dimensional electron gas 2DEG in heterojunction boundary, and in the time of the resistivity decreased of interface, we can obtain higher device frequency characteristic.AlGaN/GaN heterojunction electron mobility transistor can obtain very high frequency, but often will be to sacrifice high pressure resistant property as cost.The method of the AlGaN/GaN heterojunction transistor frequency improving is at present as follows:
1. in conjunction with reducing resistivity without passivated dielectric medium (dielectric-free passivation) and the long ohmic contact of living again.Referring to Yuanzheng Yue, Zongyang Hu, the InAlN/AlN/GaN HEMTs With Regrown Ohmic Contacts and f_{T}of370GH such as Jia Guo.EDL.Vol33.NO.7,P1118-P1120。The method has adopted 30 nanometer grid long, and in conjunction with reducing source ohmic leakage rate without passivated dielectric medium (dielectric-free passivation) and the long ohmic contact of living again.Frequency can reach 370GHz.Can also continue to improve frequency to 500GHz by reducing channel length.
2. the long heavy-doped source of living again drains to the Two-dimensional electron gas channel of nearly grid.Referring to Shinohara, K.Regan, D.Corrion, the self-aligned-gate GaN-HEMTs with heavily-doped n+-GaN ohmic contacts to 2DEG such as A.Brown; IEDM, IEEE; 2012.The long n+GaN ohmic contact of living again in the past achieves noticeable achievement to reducing raceway groove contact resistance, but heavy-doped source drain contact directly can obtain better frequency characteristic and current characteristics to the Two-dimensional electron gas channel approaching under grid.The method of reporting in literary composition makes frequency reach f
t/ fmax=342/518GHz.Puncture voltage 14V simultaneously.
Summary of the invention
The object of the invention is to the deficiency for above high-frequency device, a kind of method that based on silicide, raceway groove is produced stress is provided, to improve the transistorized frequency characteristic voltage endurance of enhanced AlGaN/GaN high mobility simultaneously, the controllability and the repeatability that strengthen technique, meet GaN base electron device to high-frequency, high-tension application requirements.
The present invention is achieved in that
Technical thought of the present invention is: use the method for epitaxial growth the etching insulating barrier of growing on AlGaN, generate a step-like thick thin dielectric layer by etching, multiple bulk silicon compounds of growing on thin dielectric layer again, silicide agglomeration spacing is less than piece width, the Formation of silicide field plate be connected in grid of also growing in thick dielectric layer.Because the thermal coefficient of expansion of silicide is greater than the thermal coefficient of expansion of insulating barrier and AlGaN.In the time that epitaxial growth is cooling, silicide can be introduced compression to insulating barrier and AlGaN layer, and meanwhile, the AlGaN layer between silicide will be subject to tensile stress.In the time that AlGaN layer is subject to compression, the 2DEG concentration that is positioned at AlGaN/GaN interface reduces to some extent, and in the time that AlGaN layer is subject to tensile stress, the 2DEG concentration that is positioned at AlGaN/GaN interface increases to some extent.The size of AlGaN layer institute compression chord (tensile stress) is relevant with the length of silicide (silicide spacing), this relation is not a kind of linear relationship, but in the time that operating distance reduces the suffered stress of AlGaN layer on the impact of polarization charge increase sharply (being illustrated in fig. 2 shown below), so we can make the width of silicide, spacing difference between silicide realizes the adjusting of two-dimensional electron gas, the increase of 2DEG concentration still reduces the magnitude relationship that depends on the two on the whole, in this invention, we select to make two-dimensional electron gas increase reduce channel resistance.So tensile stress is greater than compression, so silicide width is less than silicide spacing.As shown in the figure, if the width of silicide is 1 μ m, silicide spacing is 0.25 μ m,. (0.25 μ m) the tension force effect that stands in region makes polarization charge finally than silicide regions (large two orders of magnitude of 1 μ polarization charge m) to silicide spacing so, so effect on the whole shows as AlGaN layer, to be subject to tensile stress be that polarization charge concentration increases to some extent, thereby the concentration of 2DEG also presents the result that entirety increases because of the increase of polarization charge between grid source and between grid leak.Therefore the resistance in this region reduces to some extent.Referring to IEICE TRANS.ELECTON, VOL.E93-C, NO.8AUGUST2010.Analysis of Passivation-Film-Induced Stress Effects on Electrical Properties in AlGaN/GaN HEMTs. makes spacing between silicide be less than the length of silicide by selection, the growth that makes 2DEG concentration reduces much larger than 2DEG concentration, thereby the resistance between grid leak and grid source is reduced to some extent, in the situation that not changing grid leak spacing, improve the transistorized frequency characteristic of high mobility.Field plate in thick dielectric layer, because medium is thicker, can be ignored the impact of 2DEG, but is connected in the effect that can play field plate after grid, can improve voltage endurance of the present invention.
According to above-mentioned technical thought, one adds grid field plate enhanced AlGaN/GaN HEMT device architecture, and described structure comprises substrate, intrinsic GaN layer, AlN separator, intrinsic AlGaN layer, AlGaN doped layer p-type GaN layer, gate electrode, source electrode, drain electrode, grid field plate, insulating barrier, passivation layer and for regulating the silicide of raceway groove electric field; Described AlGaN doped layer is positioned on intrinsic AlGaN layer, and p-type GaN layer is positioned on AlGaN doped layer, and source-drain electrode and insulating barrier are positioned on AlGaN layer, and gate electrode is positioned on p-type GaN layer, and silicide is positioned on insulating barrier; Epitaxial growth enhanced AlGaN/GaN heterojunction material on substrate, and on this heterojunction material, form source electrode and drain electrode, then deposit one layer insulating, between grid leak region and grid source region on insulating barrier, form silicide, the silicide in thick dielectric layer is electrically connected with grid and forms grid field plate structure; There is p-GaN epitaxial loayer in grid below, forms enhancement device.Last deposit passivation layer is realized the passivation of device.Thereby electron gas concentration and electric field in raceway groove are played to regulating action, and the voltage endurance capability of device also strengthens.Thereby improve transistorized frequency characteristic and voltage endurance.
According to above-mentioned technical thought, utilize metal silicide to improve the structure of enhanced AlGaN/GaN HEMT device performance, comprise following process:
(1) epitaxially grown enhancement mode p-GaN/AlGaN/GaN material is carried out to organic washing, by mobile washed with de-ionized water and put into HCl: H
2o=1: corrode 30-60s in 1 solution, finally dry up by mobile washed with de-ionized water and with high pure nitrogen
(2) the p-GaN/AlGaN/GaN material cleaning up is carried out to photoetching and dry etching, be formed with source region table top;
(3) the p-GaN/AlGaN/GaN material for preparing table top is carried out to photoetching, form the etch areas of p-GaN;
(4) and by material put into ICP dry etching reative cell, process conditions are: upper electrode power is 200W, and lower electrode power is 20W, and chamber pressure is 1.5Pa, Cl
2flow be 10sccm, the flow of Ar gas is 10sccm, etch period is about 10min, etches away the p-GaN epitaxial loayer outside gate region;
(5) the p-GaN/AlGaN/GaN material that completes etching is carried out to photoetching, leakage ohmic contact regions, formation source, put into electron beam evaporation platform deposit metal ohmic contact Ti/Al/Ni/Au=(20/120/45/50nm) and peel off, the last rapid thermal annealing that carries out 850 DEG C of 35s in nitrogen environment, forms ohmic contact
(6) device is put into magnetron sputtering reative cell and prepared Al
2o
3film, process conditions are: the DC offset voltage of Al target is 100V, and Ar throughput is 30sccm, and O2 flow is 10sccm, and the pressure of reative cell is 0.5Pa, the Al that deposit 300nm is thick
2o
3film;
(7) device that completes deposit is carried out to photoetching development, form Al
2o
3the wet etching district of film, puts into HF by material: H
2o=1: in 10 solution, corrosion 3-5min, by Al
2o
3corrode to 5-10nm;
(8) then device is put into simultaneously sputter Ni and the Si of reative cell of magnetron sputtering, process conditions are: the DC offset voltage of Ni target is 100V, the rf bias voltage of Si target is 450V, and the flow of carrier gas Ar is 30sccm, the hybrid metal film that codeposition 100nm~150nm is thick
(9) device of the good film of deposit is carried out to photoetching, form the etching window district of mixed film, and put into ICP dry etching reative cell, process conditions are: upper electrode power is 200W, and lower electrode power is 20W, and chamber pressure is 1.5Pa, CF
4flow be 20sccm, the flow of Ar gas is 10sccm, etch period is 5min;
(10) device is put into quick anneal oven, carry out 450 DEG C under nitrogen environment, the rapid thermal annealing of 30s, forms NiSi alloy
(11) device that completes alloy is carried out to photoetching, form grid and grid field plate region, and device is put into HF: H
2in O (1: 1) solution by the Al of gate region
2o
3corrosion forms gate electrode and grid field plate window completely, then puts into electron beam evaporation platform deposit Ni/Au=20/200nm and peels off, and completes the preparation of gate electrode and grid field plate
(12) put into PECVD reative cell deposit SiN passivating film by completing device prepared by grid, concrete technology condition is: SiH
4flow be 40sccm, NH
3flow be 10sccm, chamber pressure is 1~2Pa, radio-frequency power is 40W, the SiN passivating film that deposit 200nm~300nm is thick
(13) device is cleaned again, photoetching development, form the etched area of SiN film, and put into ICP dry etching reative cell, process conditions are: upper electrode power is 200W, lower electrode power is 20W, chamber pressure is 1.5Pa, CF
4flow be 20sccm, the flow of Ar gas is 10sccm, etch period is 10min, the SiN that source electrode, drain and gate are covered above and Al
2o
3film etches away;
(14) device is cleaned, photoetching development, and put into the thick electrode that adds of electron beam evaporation platform deposit Ti/Au=20/200nm, complete the preparation of integral device.
Tool of the present invention has the following advantages:
(1) device of the present invention adopts the method for deposition insulating layer and silicide, and AlGaN is produced to effect of stress, regulates electron gas concentration and electric field strength in raceway groove.Improve device frequency characteristic.
(2) in the present invention, prepared silicide, between grid leak and grid source, does not need to reduce grid leak distance when improving frequency characteristic, thereby without sacrificing high pressure resistant property.
(3) in the present invention owing to can regulate as required size and the spacing of silicide between grid leak and grid source, thereby regulate effect of stress size.Electron gas concentration and frequency characteristic can regulate as required between grid source and between grid leak.
(4) in the present invention grid field plate add the voltage endurance that has improved device.
Brief description of the drawings
By describing in more detail exemplary embodiment of the present invention with reference to accompanying drawing, above and other aspect of the present invention and advantage will become more and be readily clear of, in the accompanying drawings:
Fig. 1 is the cross-sectional view of device of the present invention;
Fig. 2 is physical principle key diagram (polarization charge is with the variation of silicide width);
Fig. 3 is the fabrication processing schematic diagram of device of the present invention.
Embodiment
Hereinafter, now with reference to accompanying drawing, the present invention is described more fully, various embodiment shown in the drawings.But the present invention can implement in many different forms, and should not be interpreted as being confined to embodiment set forth herein.On the contrary, it will be thorough with completely providing these embodiment to make the disclosure, and scope of the present invention is conveyed to those skilled in the art fully.
Hereinafter, exemplary embodiment of the present invention is described with reference to the accompanying drawings in more detail.
With reference to Fig. 1, one adds grid field plate enhanced AlGaN/GaN HEMT device architecture, and described structure comprises substrate, intrinsic GaN layer, AlN separator, intrinsic AlGaN layer, AlGaN doped layer, p-type GaN layer, gate electrode, source electrode, drain electrode, grid field plate, insulating barrier, passivation layer and for regulating the silicide of raceway groove electric field; Described AlGaN doped layer is positioned on intrinsic AlGaN layer, and p-type GaN layer is positioned on AlGaN doped layer, and source-drain electrode and insulating barrier are positioned on AlGaN layer, and gate electrode is positioned on p-type GaN layer, and silicide is positioned on insulating barrier; Epitaxial growth enhanced AlGaN/GaN heterojunction material on substrate, and on this heterojunction material, form source electrode and drain electrode, then deposit one layer insulating, between grid leak region and grid source region on insulating barrier, form silicide, the silicide in thick dielectric layer is electrically connected with grid and forms grid field plate structure; There is p-GaN epitaxial loayer in grid below, forms enhancement device.Last deposit passivation layer is realized the passivation of device.
The foregoing is only embodiments of the invention, be not limited to the present invention.The present invention can have various suitable changes and variation.All any amendments of doing within the spirit and principles in the present invention, be equal to replacement, improvement etc., within protection scope of the present invention all should be included in.
Claims (10)
1. add grid field plate enhanced AlGaN/GaN HEMT device architecture, it is characterized in that: described structure comprises substrate, intrinsic GaN layer, AlN separator, intrinsic AlGaN layer, AlGaN doped layer, p-type GaN layer, gate electrode, source electrode, drain electrode, grid field plate, insulating barrier, passivation layer and for regulating the silicide of raceway groove electric field; Described AlGaN doped layer is positioned on intrinsic AlGaN layer, and p-type GaN layer is positioned on AlGaN doped layer, and source-drain electrode and insulating barrier are positioned on AlGaN layer, and gate electrode is positioned on p-type GaN layer, and silicide is positioned on insulating barrier; Epitaxial growth enhanced AlGaN/GaN heterojunction material on substrate, and on this heterojunction material, form source electrode and drain electrode, then deposit one layer insulating, between grid leak region and grid source region on insulating barrier, form silicide, the silicide in thick dielectric layer is electrically connected with grid and forms grid field plate structure; There is p-GaN epitaxial loayer in grid below, forms enhancement device, and last deposit passivation layer is realized the passivation of device.
2. grid field plate enhanced AlGaN/GaN HEMT device architecture that adds according to claim 1, is characterized in that: backing material is wherein sapphire, carborundum, GaN or MgO.
3. grid field plate enhanced AlGaN/GaN HEMT device architecture that adds according to claim 1, is characterized in that: in AlGaN wherein, the component of Al and Ga can regulate, Al
xga
1-xx=0~1 in N.
4. grid field plate enhanced AlGaN/GaN HEMT device architecture that adds according to claim 1, is characterized in that: silicide comprises NiSi, TiSi
2, or Co
2si.
5. grid field plate enhanced AlGaN/GaN HEMT device architecture that adds according to claim 1, is characterized in that: the thickness of thin dielectric layer is 5~10nm, and thick dielectric layer thickness is 200~700nm.
6. grid field plate enhanced AlGaN/GaN HEMT device architecture that adds according to claim 1, is characterized in that: its GaN raceway groove replaces with Al
yga
1-yn raceway groove, and Al
yga
1-yin N, the component of y is less than the Al component x in addition two-layer, i.e. x > y.
7. grid field plate enhanced AlGaN/GaN HEMT device architecture that adds according to claim 1, is characterized by: wherein p-type GaN material can be also p-type AlGaN or InGaN material.
8. grid field plate enhanced AlGaN/GaN HEMT device architecture that adds according to claim 1, it is characterized in that: silicide is for block, and introducing stress, interblock is apart from being less than piece width, silicide can produce inside compression to AlGaN epitaxial loayer below, AlGaN epitaxial loayer between silicide is subject to an outside pressure, by making silicide spacing be less than silicide width, the tensile stress that AlGaN layer under silicide spacing is subject to is greater than the compression that AlGaN layer is subject to below silicide, electric field in raceway groove is enhanced as a whole, so repeatedly, finally make the electric field in whole raceway groove be enhanced.
9. grid field plate enhanced AlGaN/GaN HEMT device architecture that adds according to claim 1, is characterized by: the silicide and the grid electricity that are positioned in thick dielectric layer are connected to form grid field plate structure, improves the puncture voltage of device.
10. the manufacture method based on adding grid field plate enhanced AlGaN/GaN HEMT device architecture, comprises the steps:
Utilize metal silicide to improve the structure of enhanced AlGaN/GaN HEMT device performance, comprise following process:
(1) epitaxially grown enhancement mode p-GaN/AlGaN/GaN material is carried out to organic washing, by mobile washed with de-ionized water and put into HCl: H
2o=1: corrode 30-60s in 1 solution, finally dry up by mobile washed with de-ionized water and with high pure nitrogen;
(2) the p-GaN/AlGaN/GaN material cleaning up is carried out to photoetching and dry etching, be formed with source region table top;
(3) the p-GaN/AlGaN/GaN material for preparing table top is carried out to photoetching, form the etch areas of p-GaN;
(4) and by material put into ICP dry etching reative cell, process conditions are: upper electrode power is 200W, and lower electrode power is 20W, and chamber pressure is 1.5Pa, Cl
2flow be 10sccm, the flow of Ar gas is 10sccm, etch period is about 10min, etches away the p-GaN epitaxial loayer outside gate region;
(5) the p-GaN/AlGaN/GaN material that completes etching is carried out to photoetching, leakage ohmic contact regions, formation source, put into electron beam evaporation platform deposit metal ohmic contact Ti/Al/Ni/Au=(20/120/45/50nm) and peel off, the last rapid thermal annealing that carries out 850 DEG C of 35s in nitrogen environment, forms ohmic contact;
(6) device is put into magnetron sputtering reative cell and prepared Al
2o
3film, process conditions are: the DC offset voltage of Al target is 100V, and Ar throughput is 30sccm, and O2 flow is 10sccm, and the pressure of reative cell is 0.5Pa, the Al that deposit 300nm is thick
2o
3film;
(7) device that completes deposit is carried out to photoetching development, form Al
2o
3the wet etching district of film, puts into HF by material: H
2o=1: in 10 solution, corrosion 3-5min, by Al
2o
3corrode to 5-10nm;
(8) then device is put into simultaneously sputter Ni and the Si of reative cell of magnetron sputtering, process conditions are: the DC offset voltage of Ni target is 100V, the rf bias voltage of Si target is 450V, and the flow of carrier gas Ar is 30sccm, the hybrid metal film that codeposition 100nm~150nm is thick;
(9) device of the good film of deposit is carried out to photoetching, form the etching window district of mixed film, and put into ICP dry etching reative cell, process conditions are: upper electrode power is 200W, and lower electrode power is 20W, and chamber pressure is 1.5Pa, CF
4flow be 20sccm, the flow of Ar gas is 10sccm, etch period is 5min;
(10) device is put into quick anneal oven, carry out 450 DEG C under nitrogen environment, the rapid thermal annealing of 30s, forms NiSi alloy;
(11) device that completes alloy is carried out to photoetching, form grid and grid field plate region, and device is put into HF: H
2in O (1: 1) solution by the Al of gate region
2o
3corrosion forms gate electrode and grid field plate window completely, then puts into electron beam evaporation platform deposit Ni/Au=20/200nm and peels off, and completes the preparation of gate electrode and grid field plate;
(12) put into PECVD reative cell deposit SiN passivating film by completing device prepared by grid, concrete technology condition is: SiH
4flow be 40sccm, NH
3flow be 10sccm, chamber pressure is 1~2Pa, radio-frequency power is 40W, the SiN passivating film that deposit 200nm~300nm is thick;
(13) device is cleaned again, photoetching development, form the etched area of SiN film, and put into ICP dry etching reative cell, process conditions are: upper electrode power is 200W, lower electrode power is 20W, chamber pressure is 1.5Pa, CF
4flow be 20sccm, the flow of Ar gas is 10sccm, etch period is 10min, the SiN that source electrode, drain and gate are covered above and Al
2o
3film etches away;
(14) device is cleaned, photoetching development, and put into the thick electrode that adds of electron beam evaporation platform deposit Ti/Au=20/200nm, complete the preparation of integral device.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
CN201410024945.7A CN103996707B (en) | 2014-01-20 | 2014-01-20 | Add grid field plate enhanced AlGaN/GaN HEMT device structure and preparation method thereof |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
CN201410024945.7A CN103996707B (en) | 2014-01-20 | 2014-01-20 | Add grid field plate enhanced AlGaN/GaN HEMT device structure and preparation method thereof |
Publications (2)
Publication Number | Publication Date |
---|---|
CN103996707A true CN103996707A (en) | 2014-08-20 |
CN103996707B CN103996707B (en) | 2016-06-29 |
Family
ID=51310810
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
CN201410024945.7A Expired - Fee Related CN103996707B (en) | 2014-01-20 | 2014-01-20 | Add grid field plate enhanced AlGaN/GaN HEMT device structure and preparation method thereof |
Country Status (1)
Country | Link |
---|---|
CN (1) | CN103996707B (en) |
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN105932041A (en) * | 2016-05-06 | 2016-09-07 | 西安电子科技大学 | N-face GaN-based fin high electron mobility transistor and manufacturing method |
CN113380623A (en) * | 2016-06-08 | 2021-09-10 | 苏州能屋电子科技有限公司 | Method for realizing enhanced HEMT (high Electron mobility transistor) through p-type passivation |
Citations (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US20070235775A1 (en) * | 2006-03-29 | 2007-10-11 | Cree, Inc. | High efficiency and/or high power density wide bandgap transistors |
CN101414629A (en) * | 2008-12-03 | 2009-04-22 | 西安电子科技大学 | Source field plate transistor with high electron mobility |
US20090250767A1 (en) * | 2007-08-30 | 2009-10-08 | The Furukawa Electric Co., Ltd. | Ed inverter circuit and integrate circuit element including the same |
CN103337516A (en) * | 2013-06-07 | 2013-10-02 | 苏州晶湛半导体有限公司 | Enhanced switching device and manufacturing method thereof |
-
2014
- 2014-01-20 CN CN201410024945.7A patent/CN103996707B/en not_active Expired - Fee Related
Patent Citations (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US20070235775A1 (en) * | 2006-03-29 | 2007-10-11 | Cree, Inc. | High efficiency and/or high power density wide bandgap transistors |
US20090250767A1 (en) * | 2007-08-30 | 2009-10-08 | The Furukawa Electric Co., Ltd. | Ed inverter circuit and integrate circuit element including the same |
CN101414629A (en) * | 2008-12-03 | 2009-04-22 | 西安电子科技大学 | Source field plate transistor with high electron mobility |
CN103337516A (en) * | 2013-06-07 | 2013-10-02 | 苏州晶湛半导体有限公司 | Enhanced switching device and manufacturing method thereof |
Cited By (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN105932041A (en) * | 2016-05-06 | 2016-09-07 | 西安电子科技大学 | N-face GaN-based fin high electron mobility transistor and manufacturing method |
CN105932041B (en) * | 2016-05-06 | 2019-03-26 | 西安电子科技大学 | The face N GaN base fin high electron mobility transistor and production method |
CN113380623A (en) * | 2016-06-08 | 2021-09-10 | 苏州能屋电子科技有限公司 | Method for realizing enhanced HEMT (high Electron mobility transistor) through p-type passivation |
Also Published As
Publication number | Publication date |
---|---|
CN103996707B (en) | 2016-06-29 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
CN103904114B (en) | Add source field plate enhanced AlGaN/GaN HEMT device architecture and preparation method thereof | |
CN103904111B (en) | Based on enhanced AlGaN/GaN HEMT device structure and preparation method thereof | |
CN102082176A (en) | Gallium nitride (GaN) enhancement type metal insulator semiconductor field effect transistor (MISFET) device and manufacturing method thereof | |
CN105355659A (en) | Trench-gate AlGaN/GaN HEMT device structure and manufacturing method | |
CN105448964A (en) | Composite stepped field plate trench gate AlGaN/GaN HEMT high-voltage device structure and manufacturing method therefor | |
CN103779406B (en) | Add source field plate depletion type insulated gate AlGaN/GaN device architecture and preparation method thereof | |
CN105448975A (en) | Composite step field plate grooved-gate high electron mobility transistor (HEMT) high-voltage device and fabrication method thereof | |
CN103745990B (en) | Depletion-mode AlGaN/GaN MISHEMT high tension apparatus and preparation method thereof | |
CN104064595B (en) | A kind of enhanced AlGaN based on slot grid structure/GaN MISHEMT device architecture and preparation method thereof | |
CN103745992B (en) | AlGaN/GaN MISHEMT high tension apparatus based on compound drain electrode and preparation method thereof | |
CN103904112B (en) | Depletion type insulated gate AlGaN/GaN device architecture and preparation method thereof | |
CN103762234B (en) | Based on the AlGaN/GaN MISHEMT high tension apparatus and preparation method thereof of super junction leakage field plate | |
CN103996707B (en) | Add grid field plate enhanced AlGaN/GaN HEMT device structure and preparation method thereof | |
CN103794643B (en) | A kind of based on groove grid high tension apparatus and preparation method thereof | |
CN103779409B (en) | Depletion-type AlGaN/GaN HEMT structure and manufacturing method thereof | |
CN103904110B (en) | Add grid field plate depletion type insulated gate AlGaN/GaN device architecture and preparation method thereof | |
CN104037217B (en) | AlGaN/GaN HEMT switching element structure based on composite dipole layer and manufacturing method | |
CN103779407B (en) | Add source field plate depletion-mode AlGaN/GaN HEMT device architecture and preparation method thereof | |
CN103904113B (en) | Depletion type AlGaN / GaN HEMT component structure with gate field plate and manufacturing method of depletion type AlGaN / GaN HEMT component structure | |
CN103779398B (en) | Band source field plate groove grid AIGaN/GaN HEMT device architecture and preparation method thereof | |
CN103779408B (en) | Based on depletion type groove grid AlGaN/GaN HEMT device structure and preparation method thereof | |
CN103745993B (en) | Based on the AlGaN/GaN MISHEMT high tension apparatus and preparation method thereof of superjunction | |
CN103745991B (en) | AlGaN/GaN high tension apparatus based on super knot and preparation method thereof | |
CN104347700A (en) | GaN(gallium nitride)-based concave grating enhanced HEMT (high electron mobility transistor) device | |
CN103762235B (en) | AlGaN/GaN high tension apparatus based on super junction leakage field plate and preparation method thereof |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
C06 | Publication | ||
PB01 | Publication | ||
C10 | Entry into substantive examination | ||
SE01 | Entry into force of request for substantive examination | ||
C14 | Grant of patent or utility model | ||
GR01 | Patent grant | ||
CF01 | Termination of patent right due to non-payment of annual fee |
Granted publication date: 20160629 Termination date: 20210120 |
|
CF01 | Termination of patent right due to non-payment of annual fee |