CN103563062A - 接合结构体 - Google Patents

接合结构体 Download PDF

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Publication number
CN103563062A
CN103563062A CN201280025481.0A CN201280025481A CN103563062A CN 103563062 A CN103563062 A CN 103563062A CN 201280025481 A CN201280025481 A CN 201280025481A CN 103563062 A CN103563062 A CN 103563062A
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China
Prior art keywords
young
modulus
layer
electrode
intermediate layer
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Pending
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CN201280025481.0A
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English (en)
Inventor
中村太一
北浦秀敏
吉泽章央
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Panasonic Holdings Corp
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Matsushita Electric Industrial Co Ltd
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Publication of CN103563062A publication Critical patent/CN103563062A/zh
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    • H01L23/498—Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers
    • H01L23/49866—Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers characterised by the materials
    • B—PERFORMING OPERATIONS; TRANSPORTING
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    • B23K—SOLDERING OR UNSOLDERING; WELDING; CLADDING OR PLATING BY SOLDERING OR WELDING; CUTTING BY APPLYING HEAT LOCALLY, e.g. FLAME CUTTING; WORKING BY LASER BEAM
    • B23K35/00—Rods, electrodes, materials, or media, for use in soldering, welding, or cutting
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    • B23K35/264—Bi as the principal constituent
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    • B23K—SOLDERING OR UNSOLDERING; WELDING; CLADDING OR PLATING BY SOLDERING OR WELDING; CUTTING BY APPLYING HEAT LOCALLY, e.g. FLAME CUTTING; WORKING BY LASER BEAM
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Abstract

在以Bi为主要成分的焊接材料的接合结构体中，改善应力缓和性，防止接合部中产生裂纹或剥离。在经由以Bi为主要成分的接合材料（104）将半导体元件（102）与Cu电极（103）相接合而构成的接合结构体（106）中，经由杨氏模量从接合材料（104）向被接合材料（半导体元件（102）、Cu电极（103））倾斜增大的层叠体（209a），将半导体元件（102）与Cu电极（103）相接合，从而确保与使用功率半导体模块时的温度周期中所产生的热应力相对的应力缓和性。

Description

接合结构体
技术领域
本发明涉及半导体元器件的内部接合，特别涉及通过Bi类焊料将要求优异的机械特性和耐热性的功率半导体模块的半导体元件与电极相接合而形成的接合结构体。
背景技术
在电子安装领域中，一直以来多使用Sn-Pb共晶软焊料，但自从对铅的有害性的担忧及对环境的关注度变高以来，对不使用铅的接合的需求与日俱增。
因此，对于作为一般焊接材料的Sn-Pb共晶软焊料，正在开发替代材料并将其实用化。
另一方面，对于半导体元器件的内部接合，正在对高温铅焊料的替代材料进行各种研究。
对于该替代焊接材料的候选材料，可以举出Au类、Zn类、Sn类、Bi类的材料。其中，关于Au类的焊接材料，例如熔点为280℃的Au-20重量%Sn等正部分实用化，但由于主要成分为Au，因此，材料物性较硬，且材料成本较高而仅限用于小型元器件，由于上述等理由而缺乏通用性。
由于Zn类焊接材料的腐蚀性较强，且弹性率过高，因此，当应用于半导体元器件的内部接合时，机械特性的提高会成为问题。
Sn类焊接材料具有优异的机械特性，但因熔点低至小于250℃而缺乏耐热性。因此，为了提高Sn类的耐热性，正在对例如通过形成SnCu化合物来进行金属间化合物化、从而提高了熔点的接合材料进行研究，但由于会因在进行金属间化合物化时发生凝固收缩而在接合时产生空隙，因此，机械特性、散热特性的改善会成为问题。
基于上述理由，作为高温铅焊料替代材料的最有希望的候选材料，正在对熔点在270℃附近的Bi类材料进行研究。
例如，专利文献1是将该Bi类焊接材料用于接合材料的例子。
图8是专利文献1所记载的现有的接合结构体的剖视图，功率半导体模块401在功率半导体元件402与电极403之间具有接合部404，将Bi-Ag类焊接材料用于该接合部404，使所述接合部404中包含15～60重量％的Ag。
然而，若功率半导体元件402的工作温度为Si的情况下的150℃，则专利文献1所记载的Bi-Ag类焊接材料具有接合可靠性，但在功率半导体元件402的工作温度是如GaN、SiC那样的比Si工作温度要高的175℃或200℃的环境下，专利文献1所记载的Bi-Ag类焊接材料有可能会在接合部404中产生裂纹、剥离等。
可以认为这是因为相对于基于功率半导体元件402的热膨胀系数（α≒3ppm/K）与Cu电极403的线膨胀系数（α≒18ppm/K）之差的热应力，Bi-Ag类焊接材料应力无法缓和，因此，会导致接合部404中产生裂纹、剥离等。
因此，在上述专利文献1所记载的Bi-Ag类焊接材料的接合结构体中，当功率半导体元件402的工作温度高于150℃时，提高与该高温区域相对的应力缓和性将成为问题。
另一方面，专利文献2以防止接合结构体产生裂纹或剥离为课题。
在专利文献2中，示出了以下情况：使半导体元件的中间接合层与焊接接合层之间的外周面区域也覆盖形成有覆盖形成于半导体元件上的保护树脂，从而提高半导体元件内部的抗裂性，减轻施加于半导体元件与焊接材料的界面、焊接材料与电极的界面的热应力。
现有技术文献
专利文献
专利文献1：日本专利特开2006-310507号公报
专利文献2：日本专利特开2011-023631号公报
发明内容
发明所要解决的技术问题
在专利文献2所记载的发明中，通过将保护树脂覆盖填充于规定区域，来提高经由焊接材料构成的半导体元件和电极的接合结构体的应力缓和性，但本发明的技术问题在于，利用与以保护树脂的填充为特征的专利文献2所记载的发明不同的方法，在功率半导体模块的接合结构体中，改善应力缓和性，防止接合部产生裂纹或剥离。
解决技术问题所采用的技术方案
本发明人想到了通过形成使相对于外部应力的变形从接合材料向被接合材料（半导体元件、Cu电极）倾斜变化的层叠结构体，来有效缓和/吸收基于被接合材料（半导体元件、Cu电极）的热膨胀系数差的热应力，从而完成了本发明。
本发明1是一种接合结构体，所述接合结构体利用以Bi为主要成分的接合材料来将半导体元件与Cu电极相接合，其特征在于，在所述接合结构体中，由所述接合材料和形成于该接合材料表面的中间层构成层叠体，隔着该层叠体将所述半导体元件表面的Cu与所述Cu电极相接合，在将所述半导体元件表面的Cu的杨氏模量设为E1、将所述中间层的杨氏模量设为E2、将所述接合材料的杨氏模量设为E3、将所述Cu电极的杨氏模量设为E4的情况下，以使得各杨氏模量E1～E4同时满足以下条件（p1）、（q1）
E3＜E2＜E1…（p1）
E3＜E2＜E4…（q1）
或其中的一个条件的方式，对所述半导体元件及所述Cu电极构成所述层叠体。
本发明2是如上述发明1所述的接合结构体，其特征在于，所述层叠体是包括所述接合材料、以及形成于该接合材料的上下两面的两个中间层的三层的层叠体，若将所述半导体元件一侧的第一中间层的杨氏模量设为E21，并将所述Cu电极一侧的第二中间层的杨氏模量设为E24，则以使得各杨氏模量E1、E21、E24、E3、E4满足以下条件（p2）和（q2）
E3＜E21＜E1…（p2）
E3＜E24＜E4…（q2）
的方式，对所述半导体元件及所述Cu电极构成三层的层叠体。
本发明3是如上述发明1所述的接合结构体，其特征在于，所述层叠体是包括所述接合材料、以及形成于该接合材料的所述半导体元件一侧的中间层的两层的层叠体，在将所述半导体元件一侧的中间层的杨氏模量设为E21的情况下，以使得各杨氏模量E1、E21、E3满足以下条件（p2）
E3＜E21＜E1…（p2）
的方式，对所述半导体元件及所述Cu电极构成两层的层叠体。
本发明4是如上述发明1所述的接合结构体，其特征在于，所述层叠体是包括所述接合材料、以及形成于该接合材料的所述Cu电极一侧的中间层的两层的层叠体，在将所述中间层的杨氏模量设为E24的情况下，以使得各杨氏模量E24、E3、E4满足以下条件（q2）
E3＜E24＜E4…（q2）
的方式，对所述半导体元件及所述Cu电极构成两层的层叠体。
本发明5是如上述发明1至4的任一项所述的接合结构体，其特征在于，所述中间层是从包括AuSn化合物、AgSn化合物、CuSn化合物、Au、Ag的组中选出的至少一种金属。
本发明6是如上述发明1至5的任一项所述的接合结构体，其特征在于，所述中间层是CuSn化合物。
发明效果
本发明经由使杨氏模量从接合材料向被接合材料倾斜增大的层叠结构，将半导体元件与Cu电极相接合，从而对于使用功率半导体模块时的温度周期中所产生的热应力，使所谓的弹簧效果发挥作用，以实现优异的应力缓和功能，因此，能高质量地将半导体元件与电极相接合，以此来提高接合可靠性。
附图说明
图1是以接合结构体为构成要素的安装结构体的剖视图。
图2A是本发明的实施方式2中的接合结构体的制造工序图。
图2B是本发明的实施方式2中的接合结构体的制造工序图。
图2C是本发明的实施方式2中的接合结构体的制造工序图。
图3是本发明的实施方式3中的接合结构体的结构图。
图4是本发明的实施方式4中的接合结构体的结构图。
图5是安装结构体的放大剖视图。
图6是关于本发明的实施方式中的实施例1～15、对接合前的电极表面处理层和Bi基底层的结构及厚度、接合后的第二中间层、第一中间层的组成及厚度进行总结而得的图表。
图7是表示接合结构体的生产率试验结果的图表。
图8是表示现有技术的安装结构体的放大剖视图。
具体实施方式
实施方式1所记载的发明是一种接合结构体，该接合结构体通过以Bi为主要成分的接合材料将半导体元件与Cu电极相接合，在所述接合结构体中，由接合材料及形成于该接合材料表面的中间层构成层叠体，并隔着该层叠体将半导体元件表面的Cu与所述Cu电极相接合，使各杨氏模量向所述接合材料、所述中间层、所述半导体元件的一个方向、或向所述接合材料、所述中间层、所述Cu电极的一个方向依次增大，或者进一步使各杨氏模量从所述接合材料经由中间层向所述半导体元件和所述Cu电极这两个方向依次增大。
为了易于理解地对此进行说明，在接合结构体中，在将半导体元件表面的Cu的杨氏模量设为E1、将所述中间层的杨氏模量设为E2、将所述接合材料的杨氏模量设为E3、将所述Cu电极的杨氏模量设为E4的情况下，以使各杨氏模量E1～E4同时满足以下条件（p1）、（q1）
E3＜E2＜E1…（p1）
E3＜E2＜E4…（q1）
或其中的一个条件的方式，对所述半导体元件及所述Cu电极构成所述层叠体。
另外，以下所说明的实施方式2～4所记载的发明是实施方式1所记载的发明的下位概念的发明，在实施方式2所记载的发明中，在所述接合材料的上下两面形成中间层，使该三层的层叠体（中间层、接合材料、中间层）夹在所述半导体元件与所述Cu电极之间，使各杨氏模量从所述接合材料经由所述中间层向所述半导体元件和所述Cu电极这两面依次增大，从而力图实现应力缓和。
接着，在实施方式3所记载的发明中，在所述接合材料的面向所述半导体元件的面上形成中间层以构成两层的层叠体（中间层、接合材料），使各杨氏模量向所述接合材料、所述中间层、所述半导体元件依次增大，从而缓和应力。
实施方式4所记载的发明是一种接合结构体，在该接合结构体中，在所述接合材料的所述Cu电极一侧的面上形成中间层以构成两层的层叠体（中间层、接合材料），使各杨氏模量以与实施方式3所记载的发明相同的方式依次增大，从而力图实现应力缓和。
此外，在实施方式所记载的发明中，作为电极或后述的势垒金属层的最下层的材质的铜的概念包括铜以及铜合金。
下面，基于附图对实施方式所记载的发明进行说明。
图1是以实施方式所记载的发明的接合结构体为结构要素的安装结构体的剖视图。
首先，利用接合材料104将半导体元件102与Cu电极103相接合以形成接合结构体106，接着，用密封树脂105将接合结构体106进行密封以形成功率半导体模块100，最后，用焊接材料109将功率半导体模块100安装于基板101上，以形成安装结构体110。
下面对接合结构体106进行详细描述。
图2A、图2B、图2C是接合结构体106的制造工序图。这里，如图2C所示，在接合材料104的下表面形成有第二中间层206，在接合材料104的上表面形成有第一中间层207，下面对该情况、即夹着三层的层叠体209a的情况进行说明。
首先，图2A是提供Cu电极103的工序图。
在提供Cu电极103时，向含有5%氢气的氮气气氛中（室温）提供Cu电极103。利用电解镀敷法使Ag层201及电极表面处理层202预先成膜于由Cu合金所构成的Cu电极103上，以作为表面处理层。
图2B是将包括Bi层203的半导体元件102放置于Cu电极103的表面处理层即Ag层201之上的工序图。
在放置半导体元件102时，在含有5%氢气的氮气气氛中，将Cu电极103加热至320℃。
利用蒸镀法，从GaN侧使由Cr0.1μm/Ni1μm/Cu3μm的多层所构成的势垒金属层204、Bi基底层205预先成膜于由GaN构成的、厚度为0.3mm、大小为4mm×5mm的半导体元件102上，另外，利用电镀法使由厚度为10μm的Bi所构成的Bi层203成膜于Bi基底层205上。
对上述势垒金属层204进行描述，所述势垒金属层204为了确保半导体元件102侧的Cr通过欧姆接合与Si导通而进行成膜。
另外，势垒金属层204的Ni用于防止由于Cu成分扩散至半导体元件的器件中而导致器件功能下降，即为了防止Cu的扩散而进行成膜。
势垒金属层204的Cu是与所述Bi基底层205相接的层。关于设置该Cu层的理由在于，所述Bi层203的Bi和Ni在界面上形成有金属间化合物Bi3Ni，该脆的金属化合物层有可能会在例如使用功率半导体模块时因热应力而发生变形时成为裂纹的起点，因此，使Cu成膜于Bi与势垒金属层的Ni之间以防止Bi向Ni扩散。
之所以选择Cu是因为Cu是相对于Bi的熔解量较少（0.4at%左右）的金属，因此，能发挥防止Bi扩散的效果。另外，关于Cu的厚度，若为1μm以上，则能防止Bi扩散，但考虑到在电镀法中成膜厚度的偏差2μm，将Cu的厚度设为3μm。
以将所述Bi层203与Cu电极103的表面处理层即Ag层201相接的方式，以50gf～150gf左右的负荷将半导体元件102放置于Cu电极103之上。
顺便说一句，在后述的本发明的实施例中是以60gf的负荷将半导体元件102放置于Cu电极103之上。
图2C是通过自然冷却使Ag层201的一部分扩散至熔融的Bi层203的状态下的接合材料104凝固的工序图。在该图2C的工序中，在包含5%氢气的氮气气氛中进行自然冷却，通过使接合材料104凝固，从而使Cu电极103与半导体元件102相接合，以制造接合结构体106。
下面对接合材料104进行说明。
如上所述，在图2B～图2C的Bi层203熔融至凝固的过程中，Cu电极103的表面处理层即Ag层201扩散至Bi中。
上述Bi层203的Bi形成Ag和（Bi-3.5重量%Ag）的二元共晶，因此，Ag对Bi进行扩散后的接合材料104的熔点为262℃。
形成Ag层201作为Cu电极103的表面处理层的目的是为了确保熔融Bi对半导体元件102下部的整个面的浸润性。
下面对第二中间层206、第一中间层207进行说明。
首先，第二中间层206是在320℃的加热状态下通过电极表面处理层202中的扩散反应、或电极表面处理层202与Cu电极103的Cu之间的扩散反应而形成的层。
同样，第一中间层207也是在320℃的加热状态下通过Bi基底层205中的扩散反应、或势垒金属层204的最下层即Cu与Bi基底层205之间的扩散反应而形成的层。
上述接合结构体106通过将Cu电极103与半导体元件102表面的Cu经由第二中间层206、接合材料104、以及第一中间层207这三层的层叠体209a进行接合而获得。为了接合部208的应力缓和，必须使各杨氏模量向接合材料104、第二中间层206、Cu电极103依次增大，或者使各杨氏模量向接合材料104、第一中间层207、半导体元件102依次增大，即，必须使各杨氏模量倾斜增大。
通过使上述第一中间层207的杨氏模量位于接合材料104的杨氏模量与半导体元件102表面的杨氏模量之间，即取中间值，并且，使第二中间层206的杨氏模量位于接合材料104的杨氏模量与Cu电极103的杨氏模量之间，即取中间值，来实现上述应力缓和。
下面进一步对三层的层叠体209a进行详细说明。
若将面向半导体元件102一侧的第一中间层207的杨氏模量设为E21，并将面向Cu电极103一侧的第二中间层206的杨氏模量设为E24，则在将半导体元件102表面的Cu的杨氏模量设为E1、将接合材料104的杨氏模量设为E3、将Cu电极103的杨氏模量设为E4的情况下，以满足以下条件（p）及（q）
E3＜E21＜E1…（p）
E3＜E24＜E4…（q）
的方式，对半导体元件102和Cu电极103构成上述层叠体209a。
在这种情况下，所谓中间层的杨氏模量取中间值是指，例如若以半导体元件102一侧附近的第一中间层207来进行说明，则并非仅指接合材料104的杨氏模量E3与半导体元件102的势垒金属层204的下层（Cu）的杨氏模量之间的大致靠近中央的数值，也可以是势垒金属层204的下层（Cu）的杨氏模量、或接合材料的杨氏模量附近的数值、即可以是从中央值向一个杨氏模量一侧偏移的数值。后述的实施例1是前者的例子，实施例3是后者的例子。
另一方面，如实施方式3、4所记载的发明所示，可以使两层的层叠体夹在半导体元件与电极之间以力图实现应力缓和。
图3表示层叠体为两层的情况下的实施方式3所记载的发明的接合结构体。
层叠体的中间层形成于接合材料104的所述半导体元件102一侧。在该层叠体209b中，在接合材料104的所述Cu电极103一侧未形成有中间层。
将Cu电极103与半导体元件102表面的Cu经由接合材料104和第一中间层207这两层的层叠体209b而进行接合，将第一中间层207的杨氏模量设定于接合材料104的杨氏模量与半导体元件102的势垒金属层204的下层（Cu）的杨氏模量之间，从而具有以下结构：即，接合材料104和第一中间层207的两层的层叠体209b的各杨氏模量向接合材料104、第一中间层207、半导体元件102的势垒金属层的下层（Cu）依次增大。
因此，若基于与在接合材料104的半导体元件一侧形成有中间层的两层层叠体相关的实施方式3所记载的发明来对这点进行说明，则进一步对两层的层叠体209b进行详细说明。
在将半导体元件102一侧的第一中间层207的杨氏模量设为E21、将半导体元件102表面的Cu的杨氏模量设为E1、将接合材料104的杨氏模量设为E3的情况下，以满足以下条件（p）
E3＜E21＜E1…（p）
的方式，将两层的层叠体209b构成于半导体元件102与Cu电极103之间。
接着，图4表示层叠体为其它的两层结构的情况下的实施方式4所记载的发明的接合结构体。
在图4中，层叠体的中间层形成于接合材料104的所述Cu电极103一侧。在该层叠体209c中，在接合材料104的半导体元件102中未形成有所述中间层。
将Cu电极103与半导体元件102表面的Cu经由接合材料104和第二中间层206这两层的层叠体209c而进行接合，通过将第二中间层206的杨氏模量设定于接合材料104的杨氏模量与Cu电极103的杨氏模量之间，从而具有以下结构：即，接合材料104和第二中间层206的两层的层叠体209c的各杨氏模量向接合材料104、第二中间层206、Cu电极103依次增大。
下面进一步对两层的层叠体209c进行详细说明。
在将面向电极的第二中间层206的杨氏模量设为E24的情况下，在将接合材料104的杨氏模量设为E3、将Cu电极103的杨氏模量设为E4的情况下，以满足以下条件（q）
E3＜E24＜E4…（q）
的方式，将两层的层叠体209c构成于半导体元件102与Cu电极103之间。
在制作接合结构体106时，如图3或图4所示，只在接合材料104的一个面上形成中间层，即使作为两层的层叠体209b、209c也能发挥弹簧效果，但若如图2C所示在接合材料104的上下面形成中间层从而构成三层的层叠体209a，则弹簧效果的发挥会变得更为良好。
另外，中间层的材质优选为从包括AuSn化合物、AgSn化合物、CuSn化合物、Au、Ag的组中选择，进一步优选为是CuSn化合物。
此外，关于中间层的厚度，以Au/Sn的结构为例来进行说明。
接合前的Au/Sn的结构在接合后成为AuSn化合物的反应如下式（a）所示。
Au＋4Sn→AuSn4…（a）
这里，若将接合前的Au的厚度设为LAu，将Sn的厚度设为LSn，则按照化学计量，两者的关系如下式（b）所示。
LSn＝4×LAu×ρAu×MSn/ρSn×MAu…（b）
式（b）中，ρ表示密度，M表示原子量，下标表示各元素。
因此，例如若基于后述的实施例1来进行描述，则在将Au成膜为0.1μm的情况下，若将各物性值代入式（b），则与之相当的接合前的Sn的厚度为0.6μm多，由此可知，若接合前的Sn的厚度小于0.6μm，则在接合后，仅生成上式（a）的金属间化合物，在接合前的Sn成膜中，所有的Sn都会消失。
因此，在实施例1中，考虑到镀敷的成膜偏差，要求实现Sn的厚度为比0.6μm要薄得多的0.3μm的成膜，使得可靠地仅生成金属间化合物。
因此，即使在Au的成膜厚度为0.1μm以外的情况下，也只要基于上述设计思想适当地设定接合前的Sn厚度，使得接合后不残留Sn的单层即可。
若接合后残留Sn的单层，则接合部208中会形成Sn的熔点即232℃的相，在对基板101安装功率半导体100时有可能会发生再熔融，因此，不要在接合后残留Sn的单层。
以上是关于Au/Sn的结构的说明，关于其它Ag/Sn、Sn、Au、Ag的各水准所对应的厚度的考虑方法也可以仿照上述方法。
如上所述，当接合结构体106的制作完成后，如上述图1所示，用接合结构体106来制作功率半导体模块100，利用焊接材料109将该功率半导体模块100安装于基板101上，以制作安装结构体110（参照图5）。
安装时的焊接材料109一般使用Sn-3重量%Ag-0.5重量%Cu（熔点217℃），但若为无铅的Sn类焊料，则并不局限于此，例如也可以使用Sn-0.7重量%Cu（熔点227℃）、Sn-3.5重量%Ag-0.5重量%Bi-6.0重量%In（熔点220℃）等。
实施例
下面，对实施方式所记载的发明即接合结构体的实施例、将利用接合结构体而获得的功率半导体模块安装于基板上而形成的安装结构体的制造例、安装结构体的生产率的评价实验例进行说明。
《接合结构体的实施例》
在以下实施例1～15中，实施例1～5如前所述，是在接合材料104的上下面上分别形成有第一、第二中间层207、206的例子，实施例6～10是仅在接合材料104中的所述半导体元件102一侧形成有第一中间层207的例子，实施例11～15是仅在接合材料104中的所述Cu电极103一侧形成有第二中间层206的例子。
另外，将基于现有技术、不设置电极表面处理层202和Bi基底层205、不通过加热/扩散来形成第一、第二中间层207、206的情况作为比较例1。
此外，在图6中，对于实施例1～15，对接合前的电极表面处理层202、Bi基底层205的结构和厚度、接合后的第二中间层206、第一中间层207的组成和厚度进行了总结。
（1）实施例1
如图6所示，将Au0.1μm/Sn0.3μm这两层形成为层叠状，以作为电极表面处理层202。在这种情况下，远离Bi层203一侧为Au，接近Bi层203一侧为Sn。
同样，将Au0.1μm/Sn0.3μm这两层形成为层叠状，以作为Bi基底层205。在这种情况下，远离Bi层203一侧为Au，接近Bi层203一侧为Sn。
接着，加热至320℃，利用电极表面处理层202中的扩散反应来生成金属间化合物，以形成由AuSn化合物2μm所构成的第二中间层206。同样，利用Bi基底层205中的扩散反应来生成金属间化合物，以形成由AuSn化合物2μm所构成的第一中间层207。
关于上述AuSn化合物，利用能量分散型X射线分光法（EnergyDispersive X-ray Spectroscopy），来确认AuSn化合物是AuSn4（Au与Sn的原子量比为1比4）。
（2）实施例2
如图6所示，将Ag0.5μm/Sn0.1μm这两层形成为层叠状，以作为电极表面处理层202，将Ag0.5μm/Sn0.1μm这两层形成为层叠状，以作为Bi基底层205。在这种情况下，远离Bi层203一侧为Ag，接近Bi层203一侧为Sn。
接着，加热至320℃，利用电极表面处理层202的扩散反应，来形成由AgSn化合物2μm所构成的第二中间层206。同样，利用Bi基底层205中的扩散反应，来形成由AgSn化合物2μm所构成的第一中间层207。
关于上述AgSn化合物，利用能量分散型X射线分光法，来确认AgSn化合物是Ag3Sn（Ag与Sn的原子量比为3比1）。
（3）实施例3
如图6所示，形成Sn0.5μm的单层以作为电极表面处理层202，形成Sn0.5μm的单层以作为Bi基底层205。
接着，加热至320℃，利用电极表面处理层202与Cu电极103的Cu之间的扩散反应，来形成由CuSn化合物2μm所构成的第二中间层206。同样，利用Bi基底层205与势垒金属层204的最下层即Cu之间的扩散反应，来形成由CuSn化合物2μm所构成的第一中间层207。
关于上述CuSn化合物，利用能量分散型X射线分光法，来确认CuSn化合物是Cu6Sn5（Cu与Sn的原子量比为6比5）。
（4）实施例4
如图6所示，形成Au2μm的单层以作为电极表面处理层202，形成Au2μm的单层以作为Bi基底层205。
接着，加热至320℃，利用电极表面处理层202的扩散，来形成由Au0.5μm所构成的第二中间层206，同样，利用Bi基底层205的扩散，来形成由Au0.5μm所构成的第一中间层207。顺便说一句，Au与电极或势垒金属层204的最下层的Cu不形成金属间化合物。
（5）实施例5
如图6所示，形成Ag2μm的单层以作为电极表面处理层202，形成Ag2μm的单层以作为Bi基底层205。
接着，加热至320℃，利用电极表面处理层202的扩散，来形成由Ag0.5μm所构成的第二中间层206，同样，利用Bi基底层205的扩散，来形成由Ag0.5μm所构成的第一中间层207。顺便说一句，Ag与电极或势垒金属层204的最下层的Cu不形成金属间化合物。
（6）实施例6～10
在以图6所示的结构和厚度来形成两层或单层的Bi基底层205之后，加热至320℃，以形成图6所示的组成和厚度的第一中间层207。不形成第二中间层206。
（7）实施例11～15
在以图6所示的结构和厚度来形成两层或单层的电极表面处理层202之后，加热至320℃，以形成图6所示的组成和厚度的第二中间层206。不形成第一中间层207。
《安装结构体的制造例》
如图5所示，使用由上述实施例所完成的接合结构体106，利用引线107来进行引线键合（也可以是带键合），在实施密封而形成功率半导体模块100之后，用焊接材料将该功率半导体模块100安装于基板101，以形成安装结构体110。
对于上述焊接材料109，如上所述，使用一般的焊接材料即Sn-3重量%Ag-0.5重量%Cu（熔点217℃）。
下面，对上述安装结构体110的产品生产率进行评价。
《安装结构体的生产率评价试验例》
将低温侧固定为-65℃，将高温侧设定为150℃、175℃、200℃这三个阶段，在反复进行300个循环的低温-高温之间的温度循环试验（1个循环30分钟/30分钟）后，用超声波视频对产品进行观察，以目测对接合结构体的接合材料有无裂纹、剥离进行判定，计算出相对于接合部表面积、裂纹、剥离小于20%的产品生产率（N数＝20），以如下基准来评价优劣。
○：生产率为大于等于80%（合格品）。
×：生产率为小于80%（不合格品）。
《关于生产率试验的评价》
图7表示生产率试验的结果。
首先，在实施例1～15中，无论在温度循环试验条件的高温侧为150℃、175℃、200℃中的哪一个的情况下，生产率都大于等于80%，判定为合格品（○）。
与之相对，在比较例1中，在温度循环实验条件的高温侧为150℃的情况下，生产率为95%，但若高温侧升温至175℃、200℃，则生产率会下降至65%、50%，判定为不合格品（×）。
一般，在温度循环实验中，若高温侧与低温侧的温差ΔT较大，则基于半导体元件102的热膨胀系数（α≒3ppm/K）与Cu电极103的材料即Cu的线膨胀系数（α≒18ppm/K）之差的热应力会增大，该应力会施加于接合结构体中的接合部208。
观察比较例1（现有技术）可知，高温侧具有对于150℃的耐热应力，但不具备对于175℃、200℃的耐热应力。
与之相对，在本发明的实施例1～15中，都判定为合格品。
因此，以实施例1为代表例，对实施例相对于比较例1的优异性的理由进行考察。
首先，观察接合部的各结构的杨氏模量，由于比较例1的结构为Cu电极103、扩散有Ag层的Bi层203（接合材料）、以及势垒金属层204的最下层即Cu层的三层结构，因此，成为Cu（110×109N/m2）/Bi-3.5重量%Ag（32×109N/m2）/Cu（110×109N/m2）。
与之相对，在实施例1的结构中，由于将第一、第二中间层207、206层叠于扩散有Ag层的Bi层203（接合材料）的上下面，因此，成为Cu（110×109N/m2）/AuSn4（55.6×109N/m2））/Bi-3.5重量%Ag（32×109N/m2）/AuSn4（55.6×109N/m2））/Cu（110×109N/m2）。
如下式（c）那样，杨氏模量是材料发生弹性变动时的应力与形变之比，
E＝σ/ε…（c）
式（c）中，E表示杨氏模量，σ表示应力，ε表示形变。
由于杨氏模量与形变量成反比，因此，在施加有一定的应力的情况下，杨氏模量越小，可形变的量越大。
因此，比较例1与实施例1之间的差异在于，Cu层与Bi-3.5重量%Ag层之间是否夹有中间层的AuSn化合物（AuSn4），而在实施例1中，可以认为，杨氏模量因存在中间层而从Bi-3.5重量%Ag的接合材料向Cu倾斜增大，弹簧效果发挥作用从而实现了应力缓和功能。
然而，在比较例1中，不存在这样倾斜的杨氏模量的增大，接合材料的杨氏模量与电极或势垒金属层的杨氏模量之间的差异较大，因此，所谓的弹簧效果不会发挥作用，可以推测这就是实施例1相对于比较例1具有优异性、即因高温侧的温度条件而产生生产率之差的理由。
关于其它实施例2～15的各中间层也相同。
试料2、7、12的中间层（Ag3Sn）：杨氏模量＝74.5×109N/m2
试料3、8、13的中间层（Cu6Sn5）：杨氏模量＝93.5×109N/m2
试料4、9、14的中间层（Au）：杨氏模量＝80×109N/m2
试料5、10、15的中间层（Ag）：杨氏模量＝76×109N/m2
可以推测由于在Cu与Bi-3.5重量%Ag之间夹有上述各种中间层，由此能发挥弹簧效果，从而能实现应力缓和功能。
因此，以下，对实施例1～15的试验结果进行详细讨论。
若对接合材料104的两面存在第一、第二中间层207、206的实施例1～5、只存在第一中间层207的实施例6～10、以及只存在第二中间层206的实施例11～15进行对比，则图7的生产率中存在10～15%的差异，可知存在两个中间层的实施例1～5的生产率更具优异性。
因此，虽然即使只在接合材料104的所述半导体元件102或所述Cu电极103一侧存在中间层也能有效地实现应力缓和功能，但为了进一步促进应力缓和功能，优选为在接合材料104的所述半导体元件102侧及所述Cu电极103侧这两侧都设置中间层。
另外，在实施例4～5、实施例9～10、实施例14～15中，接合后的中间层的厚度与接合前的Au、Ag层的厚度相比大幅减少为0.5μm。这是由于Au、Ag层扩散至接合前的电极表面处理层、Bi基底层附近部分的Bi-3.5重量%Ag中，但通过上述生产率试验可以证明，即使是这样的结构，也能发挥所希望的弹簧效果从而有效地实现应力缓和功能。
另外，本发明的特征在于，使杨氏模量从层叠体向半导体元件或电极倾斜增大，但例如实施例1的第一中间层207（AuSn4）的杨氏模量为55.6×109N/m2，为大致靠近势垒金属层204的最下层即Cu层的杨氏模量（110×109N/m2）、与接合材料（Bi-3.5重量%Ag）的杨氏模量（32×109N/m2）的中央的数值，但在实施例3中，第一中间层207（Cu6Sn5）的杨氏模量为93.5×109N/m2，为靠近势垒金属层204的Cu层的杨氏模量（110×109N/m2）的数值。
因此，参照上述试验结果可知，即使第一、第二中间层207、206的杨氏模量是与半导体元件表面即势垒金属层的下层的Cu或电极Cu的杨氏模量相接近的值，也能发挥弹簧效果，因此，可以说，只要第一、第二中间层207、206的杨氏模量处于半导体元件表面的Cu的杨氏模量与Cu电极的杨氏模量之间，即使不设计成中央附近的数值也没问题。
工业上的实用性
具有本发明的接合结构体安装结构体经由使杨氏模量从接合材料向被接合材料（半导体元件、Cu电极）倾斜增大的层叠结构，将半导体元件与Cu电极相接合，从而能确保与使用功率半导体模块时的温度周期中所产生的热应力相对的应力缓和性，能适用于功率半导体模块、小功率晶体管等半导体封装的用途中。
标号说明
100  功率半导体模块
101  基板
102  半导体元件
103  Cu电极
104  接合材料
106  接合结构体
109  焊接材料
110  安装结构体
201  Ag层
202  电极表面处理层
203  Bi层
204  势垒金属层
205  Bi基底层
206  第二中间层
207  第一中间层
209a、209b、209c  层叠体

Claims (6)

1.一种接合结构体，所述接合结构体利用以Bi为主要成分的接合材料来将半导体元件与Cu电极相接合，其特征在于，
由所述接合材料和形成于该接合材料表面的中间层构成层叠体，隔着该层叠体将半导体元件表面的Cu与所述Cu电极相接合，
在将所述半导体元件表面的Cu的杨氏模量设为E1、将所述中间层的杨氏模量设为E2、将所述接合材料的杨氏模量设为E3、将所述Cu电极的杨氏模量设为E4的情况下，
以使得各杨氏模量E1～E4同时满足以下条件（p1）、（q1）
E3＜E2＜E1…（p1）
E3＜E2＜E4…（q1）
或其中的一个条件的方式，对所述半导体元件及所述Cu电极构成所述层叠体。
2.如权利要求1所述的接合结构体，其特征在于，
所述层叠体是包括所述接合材料、以及形成于该接合材料的上下两面的两个中间层的三层的层叠体，若将所述半导体元件一侧的第一中间层的杨氏模量设为E21，并将所述Cu电极一侧的第二中间层的杨氏模量设为E24，
则以使得各杨氏模量E1、E21、E24、E3、E4满足以下条件（p2）和（q2）
E3＜E21＜E1…（p2）
E3＜E24＜E4…（q2）
的方式，对所述半导体元件及所述Cu电极构成所述三层的层叠体。
3.如权利要求1所述的接合结构体，其特征在于，
所述层叠体是包括所述接合材料、以及形成于该接合材料的所述半导体元件一侧的中间层的两层的层叠体，在将所述中间层的杨氏模量设为E21的情况下，
以使得各杨氏模量E1、E21、E3满足以下条件（p2）
E3＜E21＜E1…（p2）
的方式，对所述半导体元件及所述Cu电极构成所述两层的层叠体。
4.如权利要求1所述的接合结构体，其特征在于，
所述层叠体是包括所述接合材料、以及形成于该接合材料的所述Cu电极一侧的中间层的两层的层叠体，
在将所述中间层的杨氏模量设为E24的情况下，
以使得各杨氏模量E24、E3、E4满足以下条件（q2）
E3＜E24＜E4…（q2）
的方式，对所述半导体元件及所述Cu电极构成所述两层的层叠体。
5.如权利要求1至4的任一项所述的接合结构体，其特征在于，
所述中间层是从包括AuSn化合物、AgSn化合物、CuSn化合物、Au、Ag的组中选出的至少一种金属。
6.如权利要求1至5的任一项所述的接合结构体，其特征在于，
所述中间层是CuSn化合物。
CN201280025481.0A 2011-06-03 2012-05-22 接合结构体 Pending CN103563062A (zh)

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