CN103531456B - 在浮栅上形成稳定的残余氧化物的方法 - Google Patents
在浮栅上形成稳定的残余氧化物的方法 Download PDFInfo
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- CN103531456B CN103531456B CN201210231297.3A CN201210231297A CN103531456B CN 103531456 B CN103531456 B CN 103531456B CN 201210231297 A CN201210231297 A CN 201210231297A CN 103531456 B CN103531456 B CN 103531456B
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- residual oxide
- floating boom
- oxide
- forming stable
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- 238000000034 method Methods 0.000 title claims abstract description 17
- 238000001039 wet etching Methods 0.000 claims abstract description 13
- 238000001312 dry etching Methods 0.000 claims abstract description 11
- 229910021420 polycrystalline silicon Inorganic materials 0.000 claims abstract description 9
- 229920005591 polysilicon Polymers 0.000 claims abstract description 9
- 239000002904 solvent Substances 0.000 claims description 7
- 239000008367 deionised water Substances 0.000 claims description 6
- 229910021641 deionized water Inorganic materials 0.000 claims description 6
- 239000012046 mixed solvent Substances 0.000 claims description 6
- XLYOFNOQVPJJNP-UHFFFAOYSA-N water Chemical compound O XLYOFNOQVPJJNP-UHFFFAOYSA-N 0.000 claims description 6
- 238000005530 etching Methods 0.000 description 12
- 238000005516 engineering process Methods 0.000 description 6
- 239000004065 semiconductor Substances 0.000 description 4
- 239000000758 substrate Substances 0.000 description 4
- 239000011248 coating agent Substances 0.000 description 3
- 238000000576 coating method Methods 0.000 description 3
- 230000015572 biosynthetic process Effects 0.000 description 2
- 238000002955 isolation Methods 0.000 description 2
- 238000004519 manufacturing process Methods 0.000 description 1
- 238000002360 preparation method Methods 0.000 description 1
Classifications
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
- H01L21/3105—After-treatment
- H01L21/311—Etching the insulating layers by chemical or physical means
- H01L21/31105—Etching inorganic layers
- H01L21/31111—Etching inorganic layers by chemical means
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10B—ELECTRONIC MEMORY DEVICES
- H10B41/00—Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates
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- Engineering & Computer Science (AREA)
- Chemical & Material Sciences (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- Inorganic Chemistry (AREA)
- Physics & Mathematics (AREA)
- General Chemical & Material Sciences (AREA)
- Chemical Kinetics & Catalysis (AREA)
- General Physics & Mathematics (AREA)
- Manufacturing & Machinery (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Semiconductor Memories (AREA)
- Non-Volatile Memory (AREA)
Abstract
Description
Claims (5)
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
CN201210231297.3A CN103531456B (zh) | 2012-07-05 | 2012-07-05 | 在浮栅上形成稳定的残余氧化物的方法 |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
CN201210231297.3A CN103531456B (zh) | 2012-07-05 | 2012-07-05 | 在浮栅上形成稳定的残余氧化物的方法 |
Publications (2)
Publication Number | Publication Date |
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CN103531456A CN103531456A (zh) | 2014-01-22 |
CN103531456B true CN103531456B (zh) | 2016-08-10 |
Family
ID=49933376
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
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CN201210231297.3A Active CN103531456B (zh) | 2012-07-05 | 2012-07-05 | 在浮栅上形成稳定的残余氧化物的方法 |
Country Status (1)
Country | Link |
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CN (1) | CN103531456B (zh) |
Families Citing this family (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN104157577B (zh) * | 2014-08-26 | 2016-11-02 | 上海华虹宏力半导体制造有限公司 | 半导体器件的形成方法 |
Citations (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN1661784A (zh) * | 2004-02-04 | 2005-08-31 | 三星电子株式会社 | 自对准分裂栅非易失存储器结构及其制造方法 |
CN101789399A (zh) * | 2010-02-05 | 2010-07-28 | 上海宏力半导体制造有限公司 | 共享字线的无触点分栅式闪存制造方法 |
CN101807581A (zh) * | 2010-02-05 | 2010-08-18 | 上海宏力半导体制造有限公司 | 共享字线的无触点分栅式闪存及其制造方法 |
Family Cites Families (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US7030444B2 (en) * | 2004-02-25 | 2006-04-18 | Taiwan Semiconductor Manufacturing Co., Ltd. | Space process to prevent the reverse tunneling in split gate flash |
KR20100079329A (ko) * | 2008-12-31 | 2010-07-08 | 주식회사 동부하이텍 | 플래시 메모리 소자의 제조방법 |
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2012
- 2012-07-05 CN CN201210231297.3A patent/CN103531456B/zh active Active
Patent Citations (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN1661784A (zh) * | 2004-02-04 | 2005-08-31 | 三星电子株式会社 | 自对准分裂栅非易失存储器结构及其制造方法 |
CN101789399A (zh) * | 2010-02-05 | 2010-07-28 | 上海宏力半导体制造有限公司 | 共享字线的无触点分栅式闪存制造方法 |
CN101807581A (zh) * | 2010-02-05 | 2010-08-18 | 上海宏力半导体制造有限公司 | 共享字线的无触点分栅式闪存及其制造方法 |
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Publication number | Publication date |
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CN103531456A (zh) | 2014-01-22 |
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Legal Events
Date | Code | Title | Description |
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C06 | Publication | ||
PB01 | Publication | ||
ASS | Succession or assignment of patent right |
Owner name: SHANGHAI HUAHONG GRACE SEMICONDUCTOR MANUFACTURING Free format text: FORMER OWNER: HONGLI SEMICONDUCTOR MANUFACTURE CO LTD, SHANGHAI Effective date: 20140421 |
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C41 | Transfer of patent application or patent right or utility model | ||
TA01 | Transfer of patent application right |
Effective date of registration: 20140421 Address after: 201203 Shanghai city Zuchongzhi road Pudong New Area Zhangjiang hi tech Park No. 1399 Applicant after: Shanghai Huahong Grace Semiconductor Manufacturing Corporation Address before: 201203 Shanghai city Zuchongzhi road Pudong New Area Zhangjiang hi tech Park No. 1399 Applicant before: Hongli Semiconductor Manufacture Co., Ltd., Shanghai |
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C10 | Entry into substantive examination | ||
SE01 | Entry into force of request for substantive examination | ||
C14 | Grant of patent or utility model | ||
GR01 | Patent grant |