CN103493188A - 常闭型异质结场效应晶体管 - Google Patents
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Abstract
本发明提供一种常闭型异质结场效应晶体管。常闭型HFET具有:厚度为t1的无掺杂AlxGa1-xN层(11)、与该层(11)电连接且相互分开形成的源极电极(21)和漏极电极(22)、在这些源极电极和漏极电极之间形成于AlxGa1-xN层的厚度为t2的无掺杂AlyGa1-yN层(12)、在源极电极和漏极电极之间在AlyGa1-yN层的部分区域上形成为台地形的厚度为t3的无掺杂AlzGa1-zN层(13),以及形成于AlzGa1-zN层的肖特基势垒型栅极(23);并且满足y>x>z以及t1>t3>t2的条件。
Description
技术领域
本发明涉及利用了氮化物半导体的异质结场效应晶体管(HFET),特别涉及常闭型HFET的改良。
背景技术
与Si系及GaAs系的半导体相比,GaN、AlGaN等氮化物半导体具有较强的击穿电场和良好的耐热性,并且也具有电子饱和漂移速度快这样的优点,所以期待能够提供在高温动作、大功率动作等方面具有良好特性的电子器件。
众所周知,在作为利用上述氮化物半导体制作的电子器件之一的HFET中,形成源于氮化物半导体积层结构所具有的异质结的二维电子气体层,在源极电极与漏极电极之间通过具有肖特基结的栅极对氮化物半导体层进行电流控制。
图11是表示利用了AlGaN/GaN异质结的、目前具有代表性的HFET的剖面示意图,在该HFET中,在蓝宝石基板501上依次层积低温GaN缓冲层502、无掺杂GaN层503、n型AlGaN层504,在n型AlGaN层504上形成有由Ti层与Al层的积层形成的源极电极505及漏极电极506,在源极电极505与漏极电极506之间形成有由Ni层、Pt层及Au层的积层形成的栅极507,该图11的HFET是由于在无掺杂GaN层503与n型AlGaN层504的异质结界面所产生的高浓度二维电子气体而在栅极电压为0V时也有漏电流存在的常闭型。
可是,在应用HFET作为功率晶体管的情况下,在具有常闭型HFET的电路中,在停电时等情况下该电路在安全方面存在问题。因此,为了将HFET作为功率晶体管使用,需要HFET是当栅极电压为0V时没有电流流动的常闭型。为了满足该要求,在专利文献1的日本特开2006-339561号公报中已经提出一种在栅极上利用了台地结构(メサ構造)和pn结的HFET。
现有技术文献
专利文献
专利文献1:(日本)特开2006-339561号公报
发明内容
图12表示专利文献1所公开的常闭型HFET的剖面示意图。该HFET具有依次层积在蓝宝石基板101上的厚度为100nm的AlN缓冲层102、厚度为2μm的无掺杂GaN层103、厚度为25nm的无掺杂AlGaN层104、厚度为100nm的p型GaN层105、以及厚度为5nm的高浓度p型GaN层106,在该HFET中,无掺杂AlGaN层104由无掺杂Al0.25Ga0.75N形成,其上方的p型GaN层105和高浓度p型GaN层106形成台地(メサ)。
在高浓度p型GaN层106上设有与之欧姆接合的Pd栅极电极111。而且,在无掺杂AlGaN层104上设有隔着p型GaN层105配置的由Ti层和Al层的积层形成的源极电极109与漏极电极110,这些电极设置在由元件分离区域107合围的区域内。并且,氮化物半导体积层结构的上侧表面由SiN膜108加以保护。
该图12的HFET的特征为,因为栅极电极111与高浓度p型GaN层106欧姆接合,所以在栅极区域形成由形成于无掺杂AlGaN层104与无掺杂GaN层103的界面的二维电子气体层和p型GaN层105生成的pn结。而且,因为pn结引起的势垒大于肖特基结引起的势垒,所以该HFET与现有的具有肖特基结的栅极的HFET相比,即使提高栅极电压,也难以产生栅极泄漏。
而且,在图12的HFET中,因为在栅极电极111的下方设有高浓度p型GaN层106,所以,在与栅极电极111之间容易形成欧姆接合。通常p型氮化物半导体难以形成欧姆接合,所以设有高浓度p型GaN层106。
在此,在氮化物半导体中激活高浓度p型杂质而生成高浓度p型载流子是不容易的,这是众所周知的。通常,为了激活高浓度p型杂质而生成高浓度p型载流子,需要进行电子束照射或高温退火等。
于是,本发明的目的在于提供不需要掺杂p型杂质以及激活该p型杂质的结构简单且成本低的常闭型HFET。
用于解决课题的技术方案
本发明的常闭型HFET的特征在于,具有:厚度为t1的无掺杂AlxGa1-xN层、与该层电连接且相互分开形成的源极电极和漏极电极、在这些源极电极和漏极电极之间形成在AlxGa1-xN层上的厚度为t2的无掺杂AlyGa1-yN层、在源极电极和漏极电极之间在AlyGa1-yN层的部分区域上形成为台地形(メサ型)的厚度为t3的无掺杂AlzGa1-zN层,以及形成在AlzGa1-zN层上的肖特基势垒型栅极电极,并且满足y>x>z以及t1>t3>t2的条件。
另外,更优选满足x-z>0.03的条件,而且也优选满足t3/t2>4的条件。栅极电极可以由Ni/Au积层、WN层、TiN层、W层以及Ti层中的任一层形成。进而,也优选在AlxGa1-xN层与AlyGa1-yN层之间附加地含有10nm以上、不足50nm厚度的无掺杂GaN层。进而,还优选AlxGa1-xN层、AlyGa1-yN层以及AlzGa1-zN层都具有在(0001)面即上侧面露出Ga原子面的Ga极性。
发明效果
根据上述的本发明,能够提供不需要掺杂p型杂质以及激活该p型杂质的结构简单且成本低的常闭型HFET。
附图说明
图1是表示本发明一实施方式的HFET的剖面示意图;
图2是表示图1HFET的能带结构的一例的曲线示意图;
图3是表示图1HFET所含有的二维电荷密度qns与源极-栅极间电压Vgs的关系的曲线图;
图4是表示在能带结构内基于异质结界面附近相邻两层的极化差(分極差)所产生的二维固定电荷密度σ的曲线示意图;
图5是表示求出图1所示的HFET所具有的多层氮化物半导体层中Al组成比与阈值电压Vth的关系的计算结果的曲线图;
图6是表示求出图1所示的HFET所具有的多层氮化物半导体层中厚度比率与阈值电压Vth的关系的计算结果的曲线图;
图7是表示求出图1所示的HFET中源极-栅极Vgs与漏电流Id的关系的实测数据的曲线图;
图8是表示求出图1所示的HFET中源极-漏极电压Vds与漏电流Id的关系的实测数据的曲线图;
图9是表示本发明另一实施方式的HFET的剖面示意图;
图10是表示图9所示的HFET中能带结构的一例的曲线示意图;
图11是表示现有常闭型HFET的一例的剖面示意图;
图12是表示专利文献1的常闭型HFET的剖面示意图。
具体实施方式
图1是表示本发明一实施方式的HFET的剖面示意图。需要说明的是,在本申请的附图中,厚度、长度、宽度等为了附图的明了化与简单化而适当改变,不表示实际的尺寸关系。
在图1的HFET中,在蓝宝石等基板(未图示)上,隔着缓冲层10沉积有厚度为t1的AlxGa1-xN层11,与该AlxGa1-xN层11电连接且相互分开形成有源极电极21和漏极电极22,在源极电极21与漏极电极22之间,在AlxGa1-xN层11上沉积有厚度为t2的无掺杂AlyGa1-yN层12,而且在源极电极21与漏极电极电极22之间,在AlyGa1-yN层12的部分区域上形成有台地形的厚度为t3的无掺杂AlzGa1-zN层13,并且在AlzGa1-zN层13上形成有肖特基势垒型栅极电极23。需要说明的是,这些AlxGa1-xN层、AlyGa1-yN层以及AlzGa1-zN层都具有在(0001)面即上侧面露出Ga原子面的Ga极性。
图2的曲线图示意性地表示图1的HFET中的能带结构的一例,即该曲线图的横轴表示从AlzGa1-zN层13的上表面向深度方向的距离(nm),纵轴表示电子能级(eV),将费米能级EF作为基准的0eV。而且,在图2的例子中,设定x=0.04、t1=1000nm、y=0.21、t2=10nm、z=0以及t3=50nm。
图3是表示HFET中源极-栅极间电压Vgs与二维电荷密度qns的关系的曲线示意图,如该曲线图中实线曲线所示,当增大源极-栅极间电压Vgs而使二维电荷密度qns为正值时的Vgs与阈值电压Vth对应。
在图3的曲线图所示的实线曲线中,正值的部分可以通过虚线所表示的直线进行近似,二维电荷密度qns(C/cm2)能够通过与Vgs成正比的下式(1)表示。另外,该公式(1)可以由电容模型导出。
qns=σ1+σ2·t3ε2/(t2ε3+t3ε2)+C·(Vgs-Vb) …(1)
在此,x表示电子电荷,ns表示二维电子密度(cm-2),σ1表示基于AlxGa1-xN层11与AlyGa1-yN层12的极化差的正二维固定电荷密度,σ2表示基于AlyGa1-yN层12与AlzGa1-zN层13的极化差的负二维固定电荷密度,t2与t3分别表示AlyGa1-yN层12与AlzGa1-zN层13的厚度,ε2与ε3分别表示AlyGa1-yN层12与AlzGa1-zN层13的介电常数,C表示沟道层与栅极电极之间的单位面积电容(也称为栅极电容),Vgs表示栅极-源极电极间电压,而Vb表示(1/q)×(栅极电极的肖特基势垒高度)。
作为与公式(1)相关的参考,图4示意性地表示在与图2对应的能带结构内二维固定电荷密度σ1与σ2。
在HFET为常闭型的情况下,当Vgs=Vth(阈值电压)时必须使qns=0/cm2,所以,根据公式(1),公式(2)成立,并且可变形为公式(3)。
0=σ1+σ2·t3ε2/(t2ε3+t3ε2)+C·(Vth-Vb) …(2)
Vth=Vb-(1/C)·{σ1+σ2·t3ε2/(t2ε3+t3ε2)} …(3)
而且,因为1/C=t2/ε2+t3/ε3,所以公式(3)可以变形为公式(4)。
Vth=Vb-(t2/ε2+t3/ε3)·{σ1+σ2·t3ε2/(t2ε3+t3ε2)} …(4)
在此,因为可以假设ε2≒ε3,所以公式(4)可以变形为公式(5)。
Vth≒Vb-σ1(t2+t3)/ε3-σ2t3/ε3 …(5)
而且,σ1依赖于AlxGa1-xN层11与AlyGa1-yN层12的Al组成比,可以由σ1=a(y-x)表示,σ2依赖于AlyGa1-yN层12与AlzGa1-zN层13的Al组成比,可以由σ2=a(z-y)表示。另外,a表示比例常数(C/cm2)。
因此,公式(5)可以通过公式(6)表示,可以变形为公式(7)。
Vth≒Vb-a(y-x)(t2+t3)/ε3-a(z-y)t3/ε3 …(6)
Vth≒Vb+a(x-z)t3/ε3-a(y-x)t2/ε3 …(7)
在此,比例常数a可以通过实验求出,可以采用a=8.65×10-6C/cm2的值。
图5的曲线图在公式(7)中假设t2=10nm、t3=50nm、y-x=0.17、以及Vb=1.0V典型的值而表示依赖于(x-z)得到的阈值电压Vth。即图5的曲线图的横轴表示(x-z),纵轴表示Vth(V)。根据图5的曲线图可知,为了得到大于Vth=0V的Vth>1V的常闭型HFET,优选满足x-z>0.03的条件。而且可知通过提高x的值,能够提高Vth。
而且,图6的曲线图假设x=0.04、y=0.21、z=0、t2=10nm以及Vb=1.0V典型的值而表示公式(7)中依赖于t3/t2得到的阈值电压Vth。即图6的曲线图的横轴表示t3/t2,纵轴表示Vth(V)。根据图6的曲线图可知,为了得到大于Vth=0V的Vth>1V的常闭型HFET,优选满足t3/t2>4的条件。
图7和图8的曲线图表示在图1的HFET中x=0.04、y=0.21、t2=10nm、z=0、以及t3=50nm时源极电极21和漏极电极22由TiAl层形成且栅极电极23由TiN层形成的情况下实测的电压电流特性。
即图7的曲线图的横轴表示源极-栅极间电压Vgs(V),纵轴表示漏电流Id(A/mm),其中,源极-漏极间电压Vds设定为5V。在该图7的曲线图中,可知当Vgs大于1V后,Id升高,实际上阈值电压Vth大于1V。
另一方面,图8的曲线图的横轴表示源极-漏极间电压Vds(V),纵轴表示漏电流Id(A/mm),其中,该曲线图所示的多条曲线按照从下方曲线向上方曲线的顺序,与源极-栅极间电压Vgs分别从0V至5V的每升高0.5V的条件相对应。
图9是示意图表示本发明另一实施方式的HFET的剖面图,与图1相比,不同之处只在于,该图9的HFET在AlxGa1-xN层11与AlyGa1-yN层12之间插入10nm以上、不足50nm厚度的GaN层11a。该GaN层11a不含有与Ga不同种类的原子即Al,所以,可作为因不同原子导致的电子散射减少、产生较高电子移动度的沟道层发挥作用,从这个观点出发,优选该GaN层11a。
图10的曲线图与图2的曲线图类似,示意性地表示在具有厚度为20nm的GaN层11a的情况下图9的HFET中的能带结构。
工业实用性
如上所述,根据本发明,能够提供不需要掺杂p型杂质以及激活该p型杂质的结构简单且成本低的常闭型HFET。
附图标记说明
10 缓冲层;11 无掺杂AlxGa1-xN层;11a 无掺杂GaN层;12 无掺杂AlyGa1-yN层;13 无掺杂AlzGa1-zN层;21 源极电极;22 漏极电极;23 肖特基势垒型栅极。
Claims (6)
1.一种常闭型HFET,其特征在于,具有:
厚度为t1的无掺杂AlxGa1-xN层(11)、
与所述AlxGa1-xN层电连接且相互分开形成的源极电极(21)和漏极电极(22)、
在所述源极电极和所述漏极电极之间形成在所述AlxGa1-xN层上的厚度为t2的无掺杂AlyGa1-yN层(12)、
在所述源极电极和所述漏极电极之间在所述AlyGa1-yN层的部分区域上形成为台地形的厚度为t3的无掺杂AlzGa1-zN层(13)、
形成在所述AlzGa1-zN层上的肖特基势垒型栅极电极(23),
并且满足y>x>z以及t1>t3>t2的条件。
2.如权利要求1所述的常闭型HFET,其特征在于,满足x-z>0.03的条件。
3.如权利要求1所述的常闭型HFET,其特征在于,满足t3/t2>4的条件。
4.如权利要求1所述的常闭型HFET,其特征在于,栅极电极(23)由Ni/Au积层、WN层、TiN层、W层及Ti层中的任一层形成。
5.如权利要求1所述的常闭型HFET,其特征在于,在所述AlxGa1-xN层(11)与所述AlyGa1-yN层(12)之间附加地含有10nm以上不足50nm厚度的无掺杂GaN层(11a)。
6.如权利要求1所述的常闭型HFET,其特征在于,所述AlxGa1-xN层(11)、所述AlyGa1-yN层(12)及所述AlzGa1-zN层(13)都具有在(0001)面即上侧面露出Ga原子面的Ga极性。
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CN105789297A (zh) * | 2015-01-14 | 2016-07-20 | 丰田自动车株式会社 | 半导体装置 |
CN105931964A (zh) * | 2016-05-13 | 2016-09-07 | 中国科学院半导体研究所 | 一种增强型AlGaN/GaN晶体管的制备方法 |
CN109414175B (zh) * | 2016-03-10 | 2021-10-22 | 艾皮乔尼克控股有限公司 | 用于生理参数的非侵入式监测的微电子传感器 |
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JP2015002290A (ja) * | 2013-06-17 | 2015-01-05 | ウシオ電機株式会社 | 透明導電膜用組成物、透明電極、半導体発光素子、太陽電池 |
JP6311668B2 (ja) * | 2015-07-10 | 2018-04-18 | 株式会社デンソー | 半導体装置 |
DE102017210711A1 (de) | 2016-06-27 | 2017-12-28 | Fraunhofer-Gesellschaft zur Förderung der angewandten Forschung e.V. | Halbleiterbauelement |
Citations (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN1290040A (zh) * | 1999-09-29 | 2001-04-04 | 株式会社东芝 | 场效应晶体管及其制造方法 |
US20080237639A1 (en) * | 2007-03-26 | 2008-10-02 | Mitsubishi Electric Corporation | Semiconductor device and manufacturing method of the same |
US20090072272A1 (en) * | 2007-09-17 | 2009-03-19 | Transphorm Inc. | Enhancement mode gallium nitride power devices |
JP2010199321A (ja) * | 2009-02-25 | 2010-09-09 | Fujitsu Ltd | 化合物半導体装置及びその製造方法 |
Family Cites Families (8)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP4592938B2 (ja) * | 1999-12-08 | 2010-12-08 | パナソニック株式会社 | 半導体装置 |
JP4022708B2 (ja) * | 2000-06-29 | 2007-12-19 | 日本電気株式会社 | 半導体装置 |
US6841809B2 (en) * | 2003-04-08 | 2005-01-11 | Sensor Electronic Technology, Inc. | Heterostructure semiconductor device |
US7238560B2 (en) * | 2004-07-23 | 2007-07-03 | Cree, Inc. | Methods of fabricating nitride-based transistors with a cap layer and a recessed gate |
US7566918B2 (en) * | 2006-02-23 | 2009-07-28 | Cree, Inc. | Nitride based transistors for millimeter wave operation |
JP2008243881A (ja) * | 2007-03-26 | 2008-10-09 | Mitsubishi Electric Corp | 半導体装置及びその製造方法 |
US7795642B2 (en) * | 2007-09-14 | 2010-09-14 | Transphorm, Inc. | III-nitride devices with recessed gates |
JP2010103478A (ja) * | 2008-09-25 | 2010-05-06 | Panasonic Corp | 窒化物半導体装置及びその製造方法 |
-
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Patent Citations (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN1290040A (zh) * | 1999-09-29 | 2001-04-04 | 株式会社东芝 | 场效应晶体管及其制造方法 |
US20080237639A1 (en) * | 2007-03-26 | 2008-10-02 | Mitsubishi Electric Corporation | Semiconductor device and manufacturing method of the same |
US20090072272A1 (en) * | 2007-09-17 | 2009-03-19 | Transphorm Inc. | Enhancement mode gallium nitride power devices |
JP2010199321A (ja) * | 2009-02-25 | 2010-09-09 | Fujitsu Ltd | 化合物半導体装置及びその製造方法 |
Cited By (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN105789297A (zh) * | 2015-01-14 | 2016-07-20 | 丰田自动车株式会社 | 半导体装置 |
CN109414175B (zh) * | 2016-03-10 | 2021-10-22 | 艾皮乔尼克控股有限公司 | 用于生理参数的非侵入式监测的微电子传感器 |
CN105931964A (zh) * | 2016-05-13 | 2016-09-07 | 中国科学院半导体研究所 | 一种增强型AlGaN/GaN晶体管的制备方法 |
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