CN103403865B - 具有静态弯曲部的斜坡堆栈芯片封装 - Google Patents
具有静态弯曲部的斜坡堆栈芯片封装 Download PDFInfo
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- CN103403865B CN103403865B CN201180042191.2A CN201180042191A CN103403865B CN 103403865 B CN103403865 B CN 103403865B CN 201180042191 A CN201180042191 A CN 201180042191A CN 103403865 B CN103403865 B CN 103403865B
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- H01L2225/04—All the devices being of a type provided for in the same main group of the same subclass of class H10, e.g. assemblies of rectifier diodes the devices not having separate containers
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- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
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- Physics & Mathematics (AREA)
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- General Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- Optics & Photonics (AREA)
- Optical Couplings Of Light Guides (AREA)
- Wire Bonding (AREA)
- Semiconductor Integrated Circuits (AREA)
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| US12/874,446 US8283766B2 (en) | 2010-09-02 | 2010-09-02 | Ramp-stack chip package with static bends |
| PCT/US2011/046519 WO2012030470A2 (en) | 2010-09-02 | 2011-08-04 | Ramp-stack chip package with static bends |
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| CN103403865A CN103403865A (zh) | 2013-11-20 |
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| US9082632B2 (en) * | 2012-05-10 | 2015-07-14 | Oracle International Corporation | Ramp-stack chip package with variable chip spacing |
| WO2014003533A1 (en) * | 2012-06-25 | 2014-01-03 | Intel Corporation | Multi-die semiconductor structure with intermediate vertical side chip and semiconductor package for same |
| KR101880173B1 (ko) * | 2012-07-11 | 2018-07-19 | 에스케이하이닉스 주식회사 | 멀티 칩 패키지 |
| KR101994930B1 (ko) | 2012-11-05 | 2019-07-01 | 삼성전자주식회사 | 일체형 단위 반도체 칩들을 갖는 반도체 패키지 |
| JP6133093B2 (ja) * | 2013-03-25 | 2017-05-24 | 本田技研工業株式会社 | 電力変換装置 |
| JP6129605B2 (ja) * | 2013-03-25 | 2017-05-17 | 本田技研工業株式会社 | 電力変換装置の製造方法及びそれに用いられる治具 |
| KR20150018099A (ko) * | 2013-08-09 | 2015-02-23 | 에스케이하이닉스 주식회사 | 적층 반도체 장치 |
| US9209165B2 (en) * | 2013-10-21 | 2015-12-08 | Oracle International Corporation | Technique for controlling positions of stacked dies |
| US9871019B2 (en) | 2015-07-17 | 2018-01-16 | Invensas Corporation | Flipped die stack assemblies with leadframe interconnects |
| US9825002B2 (en) * | 2015-07-17 | 2017-11-21 | Invensas Corporation | Flipped die stack |
| US9837394B2 (en) | 2015-12-02 | 2017-12-05 | International Business Machines Corporation | Self-aligned three dimensional chip stack and method for making the same |
| US9508691B1 (en) | 2015-12-16 | 2016-11-29 | Invensas Corporation | Flipped die stacks with multiple rows of leadframe interconnects |
| US10566310B2 (en) | 2016-04-11 | 2020-02-18 | Invensas Corporation | Microelectronic packages having stacked die and wire bond interconnects |
| US9929290B2 (en) | 2016-06-20 | 2018-03-27 | Globalfoundries Inc. | Electrical and optical via connections on a same chip |
| US9728524B1 (en) | 2016-06-30 | 2017-08-08 | Invensas Corporation | Enhanced density assembly having microelectronic packages mounted at substantial angle to board |
| CN107993997B (zh) | 2016-10-26 | 2020-06-16 | 晟碟信息科技(上海)有限公司 | 半导体器件 |
| CN108933109B (zh) | 2017-05-27 | 2020-07-07 | 晟碟信息科技(上海)有限公司 | 成角度的裸芯的半导体器件 |
| US10963780B2 (en) * | 2017-08-24 | 2021-03-30 | Google Llc | Yield improvements for three-dimensionally stacked neural network accelerators |
| KR20190052957A (ko) * | 2017-11-09 | 2019-05-17 | 에스케이하이닉스 주식회사 | 다이 오버시프트 지시 패턴을 포함하는 반도체 패키지 |
| US20190279962A1 (en) * | 2018-03-09 | 2019-09-12 | Oracle International Corporation | Method and apparatus for stacking warped chips to assemble three-dimensional integrated circuits |
| US11222865B2 (en) * | 2020-05-12 | 2022-01-11 | Western Digital Technologies, Inc. | Semiconductor device including vertical bond pads |
| US20230247795A1 (en) | 2022-01-28 | 2023-08-03 | The Research Foundation For The State University Of New York | Regenerative preheater for phase change cooling applications |
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| US20090321954A1 (en) * | 2008-06-30 | 2009-12-31 | Oh Tac Keun | Stacked semiconductor package electrically connecting semiconductor chips using outer surfaces thereof and method for manufacturing the same |
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- 2011-08-04 JP JP2013527083A patent/JP6000952B2/ja active Active
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| US6392143B1 (en) * | 1999-01-18 | 2002-05-21 | Kabushiki Kaisha Toshiba | Flexible package having very thin semiconductor chip, module and multi chip module (MCM) assembled by the package, and method for manufacturing the same |
| US6376904B1 (en) * | 1999-12-23 | 2002-04-23 | Rambus Inc. | Redistributed bond pads in stacked integrated circuit die package |
| CN101393876A (zh) * | 2007-09-11 | 2009-03-25 | 桑迪士克股份有限公司 | 形成具有接纳电连接件倾斜边缘的半导体电路小片的方法 |
| US20090321954A1 (en) * | 2008-06-30 | 2009-12-31 | Oh Tac Keun | Stacked semiconductor package electrically connecting semiconductor chips using outer surfaces thereof and method for manufacturing the same |
Also Published As
| Publication number | Publication date |
|---|---|
| EP2612356B1 (en) | 2015-04-22 |
| JP6000952B2 (ja) | 2016-10-05 |
| WO2012030470A3 (en) | 2012-05-03 |
| WO2012030470A2 (en) | 2012-03-08 |
| US20120056327A1 (en) | 2012-03-08 |
| JP2013536999A (ja) | 2013-09-26 |
| CN103403865A (zh) | 2013-11-20 |
| EP2612356A2 (en) | 2013-07-10 |
| TW201234501A (en) | 2012-08-16 |
| TWI527132B (zh) | 2016-03-21 |
| US8283766B2 (en) | 2012-10-09 |
| KR101853754B1 (ko) | 2018-06-20 |
| KR20130136446A (ko) | 2013-12-12 |
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