CN103379749A - Multilayer circuit board and manufacturing method thereof - Google Patents
Multilayer circuit board and manufacturing method thereof Download PDFInfo
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- CN103379749A CN103379749A CN2012101274743A CN201210127474A CN103379749A CN 103379749 A CN103379749 A CN 103379749A CN 2012101274743 A CN2012101274743 A CN 2012101274743A CN 201210127474 A CN201210127474 A CN 201210127474A CN 103379749 A CN103379749 A CN 103379749A
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Abstract
The invention provides a manufacturing method of a multilayer circuit board. The manufacturing method includes: (1) providing a circuit substrate, wherein the circuit substrate comprises a substrate body and a first copper foil layer attached to the surface of the substrate body, (2) manufacturing the first copper foil layer into a first conductive line layer, wherein the first conductive line layer is provided with a first exposed zone and a first pressing zone, (3) setting a first solder mask layer in the first exposed zone, (4) pressing a first alkali developable resin layer and a third copper foil layer on one side of the first conductive line layer of the circuit substrate, (5) forming a first opening corresponding to the first exposed zone in the third copper foil layer so as to expose the first alkali developable resin layer corresponding to the first exposed zone, (6) exposing the first alkali developable resin layer exposed out of the first opening, and (7) dissolving the exposed first alkali developable resin layer through an alkali developing solution so as to form a groove, wherein the first solder mask layer is exposed in the groove. The invention further provides the multilayer circuit board manufactured by means of the manufacturing method.
Description
Technical field
The present invention relates to circuit board technology, relate in particular to reeded multilayer circuit board of a kind of tool and preparation method thereof.
Background technology
In information, communication and consumer electronics industry, circuit board is the indispensable basic comprising important documents of all electronic products.Along with the past miniaturization of electronic product, high speed future development, circuit board is also from the past double-sided PCB of single-sided circuit board, multilayer circuit board future development.Multilayer circuit board, especially the built-in type multilayer circuit board that buries electronic devices and components in is widely used especially, see also Takahashi, A. wait the people to be published in IEEE Trans. on Components in 1992, Packaging, the document of and Manufacturing Technology " High density multilayer printed circuit board for HITAC M ~ 880 ".
The built-in type circuit board generally has a groove, with embedding electronic devices and components.When making, need to make first multilayer circuit board, and then adopt the method for artificial fluting to dig out groove, the method for artificial fluting not only needs more human resources, and the precision of artificial fluting is not high, can affect precision and the quality of circuit board.
Summary of the invention
Therefore, be necessary to provide a kind of reeded multilayer circuit board of tool with better product quality and preparation method thereof.
Below will a kind of multilayer circuit board and preparation method thereof be described with embodiment.
A kind of manufacture method of multilayer circuit board comprises step: circuit substrate is provided, and described circuit substrate comprises substrate and is fitted in the first copper foil layer of substrate surface; The first copper foil layer is made the first conducting wire layer, and described the first conducting wire floor has the first exposed region and the first pressing district; At described the first exposed region the first welding resisting layer is set; The first alkali development resin bed and the 3rd copper foil layer are closed in the first conducting wire layer one side pressure at circuit substrate, described the first alkali development resin bed contacts with surface, the first pressing district and the first welding resisting layer surface, and described the 3rd copper foil layer contacts with described the first alkali development resin bed; In the 3rd copper foil layer, form first opening corresponding with the first exposed region, to expose the first alkali development resin bed corresponding to the first exposed region; The first alkali development resin bed that exposure exposes from the first opening; Reach with the alkaline-based developer dissolving and remove the first alkali development resin bed of exposed portion, thereby form a groove, described the first welding resisting layer is exposed in the described groove.
A kind of manufacture method of multilayer circuit board comprises step: circuit substrate is provided, and described circuit substrate comprises substrate and is fitted in the first copper foil layer of substrate surface; The first copper foil layer is made the first conducting wire layer, and described the first conducting wire floor has the first exposed region and the first pressing district; At described the first exposed region the first welding resisting layer is set; The first alkali development resin bed and the 3rd copper foil layer are closed in the first conducting wire layer one side pressure at circuit substrate, described the first alkali development resin bed contacts with surface, the first pressing district and the first welding resisting layer surface, and described the 3rd copper foil layer contacts with described the first alkali development resin bed; In the 3rd copper foil layer, form the first opening corresponding to the first exposed region, to expose the first alkali development resin bed corresponding to the first exposed region; The first alkali development resin bed that exposure exposes from the first opening; The 3rd alkali development resin bed and the 5th copper foil layer are closed in the 3rd copper foil layer one side pressure at circuit substrate, described the 3rd alkali development resin bed reaches the first alkali development resin bed that exposes from the first opening with described the 3rd copper foil layer and contacts, and described the 5th copper foil layer contacts with the 3rd alkali development resin bed; In the 5th copper foil layer, form second opening corresponding with the first opening; The 3rd alkali development resin bed that exposure exposes from the second opening; Reach with the alkaline-based developer dissolving and remove the 3rd alkali development resin bed and the first alkali development resin bed of exposed portion, thereby form a groove, described the first welding resisting layer is exposed in the described groove.
A kind of manufacture method of multilayer circuit board comprises step: circuit substrate is provided, and described circuit substrate comprises substrate and is fitted in the first copper foil layer of substrate surface; The first copper foil layer is made the first conducting wire layer, and described the first conducting wire floor has the first exposed region and the first pressing district; At described the first exposed region the first welding resisting layer is set; The first alkali development resin bed and the 3rd copper foil layer are closed in the first conducting wire layer one side pressure at circuit substrate, described the first alkali development resin bed contacts with surface, the first pressing district and the first welding resisting layer surface, and described the 3rd copper foil layer contacts with described the first alkali development resin bed; In the 3rd copper foil layer, form the first opening corresponding to the first exposed region, to expose the first alkali development resin bed corresponding to the first exposed region; The first alkali development resin bed that exposure exposes from the first opening; The 3rd alkali development resin bed and the 5th copper foil layer are closed in the 3rd copper foil layer one side pressure at circuit substrate, described the 3rd alkali development resin bed reaches the first alkali development resin bed that exposes from the first opening with described the 3rd copper foil layer and contacts, and described the 5th copper foil layer contacts with the 3rd alkali development resin bed; In the 5th copper foil layer, form second opening corresponding with the first opening; The 3rd alkali development resin bed that exposure exposes from the second opening; The 5th alkali development resin bed and the 7th copper foil layer are closed in the 5th copper foil layer one side pressure at circuit substrate, described the 5th alkali development resin bed reaches the 3rd alkali development resin bed that exposes from the second opening with described the 5th copper foil layer and contacts, and described the 7th copper foil layer contacts with the 5th alkali development resin bed; In the 7th copper foil layer, form four opening corresponding with the second opening; The 5th alkali development resin bed that exposure exposes from the 4th opening; Reach with the alkaline-based developer dissolving and remove the 5th alkali development resin bed, the 3rd alkali development resin bed and the first alkali development resin bed of exposed portion, thereby form a groove, described the first welding resisting layer is exposed in the described groove.
A kind of multilayer circuit board, formed by aforesaid manufacture method making, described multilayer circuit board comprises the circuit substrate of successively pressing, the first alkali development resin bed and the 3rd conducting wire layer, described circuit substrate comprises substrate and is fitted in the first conducting wire layer of substrate surface, described the first conducting wire floor has exposed region and pressing district, described exposed region is provided with the first welding resisting layer, described multilayer circuit board has the groove corresponding with exposed region, described groove runs through the 3rd conducting wire layer and the first alkali development resin bed, and described the first welding resisting layer is exposed in the described groove.
A kind of multilayer circuit board, comprise the circuit substrate and the solderless substrate that are pressed on together, described circuit substrate comprises substrate and is fitted in the first conducting wire layer of substrate surface, described the first conducting wire floor has exposed region and pressing district, described exposed region surface is provided with welding resisting layer, and a plurality of pads of exposed region expose from described welding resisting layer, described solderless substrate comprises the alkali development resin bed of the multilayer grooved that is pressed on together and the conducting wire layer of multilayer opening, the conducting wire layer alternative arrangement of the alkali development resin bed of described multilayer grooved and multilayer opening, the conducting wire layer that one deck opening is only arranged between the alkali development resin bed of every adjacent two layers fluting, described solderless substrate has a groove, described groove runs through the alkali development resin bed of every layer of fluting of solderless substrate and the conducting wire layer of every layer of opening, described groove is corresponding with described welding resisting layer, so that the pad of described welding resisting layer and a plurality of exposed regions of exposing from welding resisting layer is exposed in the described groove, described groove is used for the holding electronic components and parts.
In the process of the making multilayer circuit board of the technical program, by pressing alkali development resin bed, follow-uply can make easily the formation groove by the step of developing, like this then so that whole manufacture crafts all can realize by comparatively ripe automatic flow of present stage, removed the waste of human resources from, and so that the precision of manufacture craft is higher, the multilayer circuit board of making has preferably quality, has avoided error and the high scrappage of artificial fluting.
Description of drawings
The circuit substrate schematic diagram that Fig. 1 provides for the technical program execution mode.
Fig. 2 forms conducting wire layer schematic diagram afterwards with the copper foil layer in the circuit substrate of Fig. 1.
Fig. 3 is the elevational schematic view of Fig. 2.
Fig. 4 is the schematic diagram after the circuit substrate of Fig. 3 arranges the first welding resisting layer.
Fig. 5 is the schematic diagram after the laminated copper foil layer of Fig. 4 both sides difference pressing alkali development resin.
Fig. 6 is the schematic diagram that will form in the downside copper foil layer of the circuit substrate of Fig. 5 behind first opening corresponding with the first welding resisting layer.
Thereby Fig. 7 is for to make the schematic diagram that the conducting wire layer obtains four laminar substrates with the up and down both sides copper foil layer of Fig. 6.
Fig. 8 is the schematic diagram of the reeded four-layer circuit board of tool made by four laminar substrates of Fig. 7.
Fig. 9 is the elevational schematic view of Fig. 7.
Figure 10 is the schematic diagram after four laminar substrates of Fig. 7 arrange the second welding resisting layer.
Figure 11 is the schematic diagram after the laminated copper foil layer of the four laminar substrate both sides of Figure 10 difference pressing alkali development resin.
Thereby Figure 12 is for to make the schematic diagram that the conducting wire layer obtains six laminar substrates with the up and down both sides copper foil layer of Figure 11.
Figure 13 is the schematic diagram after the laminated copper foil layer of the both sides of six laminar substrates of Figure 12 difference pressing alkali development resin.
Figure 14 is for making the up and down both sides copper foil layer of Figure 13 in the schematic diagram behind the layer of conducting wire.
Figure 15 is the schematic diagram of the 8-layer printed circuit board with two grooves made by eight laminar substrates of Figure 14.
The main element symbol description
| |
10 |
| The first copper foil layer | 11 |
| |
100 |
| The second |
12 |
| The first conducting |
110 |
| The second conducting |
120 |
| The first pressing |
111 |
| The first exposed |
112 |
| Circuit | 113、143 |
| |
114、144 |
| The first |
21 |
| The first via | 101 |
| The first alkali |
31 |
| The 3rd |
13 |
| The second alkali |
32 |
| The 4th |
14 |
| The first blind via |
102 |
| The second |
103 |
| The first opening | 131 |
| The 4th conducting |
140 |
| The 3rd conducting |
130 |
| Four laminar substrates | 10a |
| The |
41、42 |
| Four- |
10b |
| The second |
22、24 |
| The 3rd |
23、25 |
| The second pressing |
141 |
| The second exposed |
142 |
| The 3rd alkali |
33 |
| The 5th copper foil layer | 15 |
| The 4th alkali |
34 |
| The 6th copper foil layer | 16 |
| The 3rd blind via hole | 104 |
| The 4th blind via hole | 105 |
| The second opening | 151 |
| The 3rd opening | 161 |
| Six laminar substrates | 10c |
| The 5th conducting |
150 |
| The 6th conducting |
160 |
| The 5th alkali |
35 |
| The 7th |
17 |
| Hexabasic |
36 |
| The 8th |
18 |
| The 5th blind via hole | 106 |
| The 6th blind via hole | 107 |
| The 4th opening | 171 |
| The 5th opening | 181 |
| The 7th conducting |
170 |
| The 8th conducting |
180 |
| Eight laminar substrates | 10d |
| The |
43 |
| The 4th |
26 |
| 8-layer printed |
10e |
Following embodiment further specifies the present invention in connection with above-mentioned accompanying drawing.
Embodiment
Below in conjunction with accompanying drawing and a plurality of embodiment, multilayer circuit board that the technical program is provided and preparation method thereof is described in further detail.
The manufacture method of the multilayer circuit board that the technical program the first embodiment provides comprises step:
The first step sees also Fig. 1, and circuit substrate 10 is provided.In the present embodiment, described circuit substrate 10 is double face copper, comprises the first copper foil layer 11, substrate 100 and second copper foil layer 12 of fitting successively from top to bottom.The insulating barrier of described substrate 100 for being consisted of by insulating material.In other embodiments, described substrate 100 can be multilager base plate, that is, substrate 100 can be the copper foil layer that comprises the multilayer alternative arrangement and the structure of insulating barrier.In other embodiments, circuit substrate 10 can be single-side coated copper plate, only comprises the first copper foil layer 11 and substrate 100.
Second step sees also Fig. 2 to Fig. 4, and described the first copper foil layer 11 is made the first conducting wire layer 110, and the second copper foil layer 12 is made the second conducting wire layer 120.The first conducting wire layer 110 and the second conducting wire layer 120 be interior all to have many conducting wires and a plurality of conductive junction point, can by image transfer and optionally chemical etching the first copper foil layer 11 and the second copper foil layer 12 form, also can form by laser selective ground ablation the first copper foil layer 11 and the second copper foil layer 12.
Described the first conducting wire floor 110 has the first pressing district 111 and the first exposed region 112.In the present embodiment, described the first exposed region 112 is rectangle, and described the first pressing district 111 surrounds and around the first exposed region 112.The first exposed region 112 comprises many circuits 113 and a plurality of pad 114.After forming the first conducting wire layer 110 and the second conducting wire layer 120, at the first exposed region 112 the first welding resisting layer 21 is set, the first welding resisting layer 21 covers many circuits 113 of the first exposed region 112, and cover the surface of the substrate 100 that exposes from the first exposed region 112, expose simultaneously a plurality of pads 114 of the first exposed region 112.The first welding resisting layer 21 can form by the mode of printing, also can form by the mode of fitting.
In the technical program, before making the first conducting wire layer 110 and the second conducting wire layer 120, also in circuit substrate 10, hole to form at least one first through hole, and form conductive layer by chemical plating and electroplating technology at the hole wall of the first through hole, the first through hole is made the first via 101.Described the first via 101 can conduct the first conducting wire layer 110 and the second conducting wire layer 120.
The 3rd step saw also Fig. 5, at circuit substrate 10 downside pressings the first alkali development resin bed 31 and the 3rd copper foil layer 13, simultaneously at circuit substrate 10 upside pressings the second alkali development resin bed 32 and the 4th copper foil layer 14.That is to say, place the first alkali development resin bed 31 on 111 surfaces, the first pressing district of the first conducting wire floor 110 and the first welding resisting layer 21 surfaces of the first exposed region 112, place the 3rd copper foil layer 13 on the first alkali development resin bed 31 surfaces, place the second alkali development resin bed 32 on the second conducting wire layer 120 surface simultaneously, place the 4th copper foil layer 14 on the second alkali development resin bed 32 surfaces, and by disposable pressing the first alkali development resin bed 31 of pressing machine, the 3rd copper foil layer 13, circuit substrate 10, the second alkali development resin bed 32 and the 4th copper foil layer 14.
The material of described the first alkali development resin bed 31 and the second alkali development resin bed 32 can be identical, consists of by alkali development resin, and described alkali development resin refers to acid-fast alkali-proof when unexposed, and the resin material that can in alkaline-based developer, dissolve after the exposure.For example, the abundant invisible ink in river can be, for example, the photoresist of alkali-developable can be; Again for example, can be the alkali development resin composition in the patent application 200580000757.
Can realize as follows at circuit substrate 10 both sides pressings the first alkali development resin bed 31, the 3rd copper foil layer 13, the second alkali development resin bed 32 and the 4th copper foil layer 14: the dry film of the alkali-developable of at first fitting respectively in circuit substrate 10 both sides, then the Copper Foil of fitting respectively on dry film adopts pressing machine to carry out one step press at last.Certainly, also can realize as follows: first at the printing ink of the upside printing alkali-developable of circuit substrate 10, at the printing ink of the upside printing Copper Foil of fitting, then the reverse circuit substrate 10 again, after the same operation through printing-ink, applying Copper Foil, adopt at last pressing machine to carry out one step press.
At circuit substrate 10 both sides pressings the first alkali development resin bed 31, the 3rd copper foil layer 13, behind the second alkali development resin bed 32 and the 4th copper foil layer 14, can carry out laser drilling process, chemical-copper-plating process and copper plating process, between the 3rd copper foil layer 13 and the first conducting wire layer 110, to form the first blind via hole 102 that conducts, between the 4th copper foil layer 14 and the second conducting wire layer 120, form the second blind via hole 103 that conducts, thereby so that the 4th copper foil layer 14, the second conducting wire layer 120, the first conducting wire layer 110 and the 3rd copper foil layer 13 are realized conducting, as shown in Figure 6.
The 4th step, see also Fig. 6 and Fig. 7, in the 3rd copper foil layer 13, form the first opening 131 corresponding to the first exposed region 112, the first opening 131 exposes the first alkali development resin bed 31 corresponding to the first exposed region 112, and the first alkali development resin bed 31 that exposes and expose from the first opening 131.
In the 3rd copper foil layer 13, form in the first opening 131 or afterwards, also described the 3rd copper foil layer 13 is made the 3rd conducting wire layer 130, the 4th copper foil layer 14 is made the 4th conducting wire layer 140.Described the 3rd conducting wire layer 130 and the 4th conducting wire layer 140 include many conducting wires and a plurality of conductive junction point.So, can obtain four laminar substrate 10a.
That is to say that the conducting wire of the 3rd conducting wire layer 130, conductive junction point can form with the 131 simultaneously etchings of the first opening, also can form by step-etching.In other words, in this step, can by image transfer and optionally etching the 3rd copper foil layer 13 the 3rd copper foil layer 13 made the 3rd conducting wire layer 130 with first opening 131, then to be exposed the first alkali development resin bed 31 that from the first opening 131, exposes; Also can by the first time image transfer and optionally etching remove the material of the 3rd copper foil layer 13 at the first opening 131 places, to form the first opening 131, then the first alkali development resin bed 31 that exposes and from the first opening 131, expose, again by image transfer for the second time and optionally etching remove material corresponding to the 3rd copper foil layer 13 in the first pressing district 111, thereby form conducting wire, the conductive junction point of the 3rd conducting wire layer 130.The conducting wire of the 4th conducting wire layer 140, conductive junction point can form simultaneously with conducting wire, the conductive junction point of the 3rd conducting wire layer 130.
The 5th step saw also Fig. 8, the first alkali development resin bed 31 after being exposed with this part of alkaline-based developer dissolving removal, thus form the first groove 41.Described the first welding resisting layer 21 is exposed in the first groove 41.Pad 114 in the first exposed region 112 of the first conducting wire layer 110 that exposes from the first welding resisting layer 21 also is exposed in the first groove 41.Described alkaline-based developer can be PH〉13 NaOH solution or be PH 13 KOH solution.
Before the first alkali development resin bed 31 after being exposed with the alkaline-based developer dissolving, perhaps after forming the 3rd conducting wire layer 130, perhaps after forming the first groove 41, can the second welding resisting layer 22 be set on the 3rd conducting wire layer 130 surface, on the 4th conducting wire layer 140 surface the 3rd welding resisting layer 23 be set.So, can obtain four-layer circuit board 10b.
Preferably, the second welding resisting layer 22, the 3rd welding resisting layer 23 can form before removing the first alkali development resin bed 31 that is exposed with the alkaline-based developer dissolving.
The four-layer circuit board 10b that makes according to the above step of the first embodiment as shown in Figure 8, it comprises the 4th conducting wire layer 140, the second alkali development resin bed 32, circuit substrate 10, the first alkali development resin bed 31 and the 3rd conducting wire layer 130 of successively pressing.Described circuit substrate 10 comprises the second conducting wire layer 120, substrate 100 and the first conducting wire layer 110 of fitting successively.Described first to fourth conducting wire layer 110 to 140 conducts by the first via 101, the first blind via hole 102 and the second blind via hole 103.Described four-layer circuit board 10b has the first groove 41 that runs through the 3rd conducting wire layer 130 and the first alkali development resin bed 31, is exposed in the first groove 41 so that be arranged at the pad 114 that exposes in first welding resisting layer 21 of the first exposed region 112 of the first conducting wire layer 110 and the first exposed region 112 from the first welding resisting layer 21.Described the first groove 41 can be used for the holding electronic components and parts, so that electronic devices and components are installed on the pad 114 that exposes from the first welding resisting layer 21 in the first exposed region 112, thereby so that electronic devices and components do not take space outerpace.
It will be understood by those skilled in the art that the step in the method for making multilayer circuit board of the first embodiment is not to be essential features.For example, in the 3rd step, can be only at circuit substrate 10 downside pressings the first alkali development resin bed 31 and the 3rd copper foil layer 13, and not simultaneously at circuit substrate 10 upside pressings the second alkali development resin bed 32 and the 4th copper foil layer 14, so, through after the subsequent step, can make three layer circuit boards with a groove.
Except making had three layer circuit boards or four-layer circuit board of a groove, the technical program can be made the multilayer circuit board of any number of plies with any amount groove.Below, the 8-layer printed circuit board that has two grooves take making describes as example.
The manufacture method of the multilayer circuit board that the technical program the second embodiment provides comprises step:
The first step sees also Fig. 7, and the four laminar substrate 10a that step by step suddenly made by the first embodiment first step to the four are provided.
As previously mentioned, four laminar substrate 10a comprise from top to bottom the 4th conducting wire layer 140, the second alkali development resin bed 32, the second conducting wire layer 120, substrate 100, the first conducting wire layer 110, the first alkali development resin bed 31 and the 3rd conducting wire layer 130 of successively pressing.
Second step sees also Fig. 9 and Figure 10, in described four laminar substrate 10a, defines the 4th conducting wire floor 140 and comprises the second pressing district 141 and the second exposed region 142, and at the second exposed region 142 the second welding resisting layer 24 is set.
In the present embodiment, described the second exposed region 142 also is rectangle, and described the second pressing district 141 surrounds and around the second exposed region 142.The second exposed region 142 comprises many circuits 143 and a plurality of pad 144.The second welding resisting layer 24 covers many circuits 143 of the second exposed region 142, and covers the surface of the second alkali development resin bed 32 that exposes from the second exposed region 142, exposes simultaneously a plurality of pads 144 of the second exposed region 142.
The 3rd step saw also Figure 11, at four laminar substrate 10a downside pressings the 3rd alkali development resin bed 33 and the 5th copper foil layer 15, simultaneously at circuit substrate 10 upside pressings the 4th alkali development resin bed 34 and the 6th copper foil layer 16.That is to say, place the 3rd alkali development resin bed 33 on the 3rd conducting wire layer 130 surface with from the first alkali development resin bed 31 surfaces that the first opening 131 exposes, place the 5th copper foil layer 15 on the 3rd alkali development resin bed 33 surfaces, place the 4th alkali development resin bed 34 on 141 surfaces, the second pressing district and the second welding resisting layer 24 surfaces of the 4th conducting wire floor 140 simultaneously, place the 6th copper foil layer 16 on the 4th alkali development resin bed 34 surfaces, and adopt disposable pressing the 6th copper foil layer 16 of pressing machine, the 4th alkali development resin bed 34, four laminar substrate 10a, the 3rd alkali development resin bed 33 and the 5th copper foil layer 15.
Four laminar substrate 10a both sides pressings the 3rd alkali development resin bed 33, the 5th copper foil layer 15, the 4th alkali development resin bed 34 and the 6th copper foil layer 16 can by with the first embodiment in akin method of the 3rd step realize.At four laminar substrate 10a both sides pressings the 3rd alkali development resin bed 33, the 5th copper foil layer 15, behind the 4th alkali development resin bed 34 and the 6th copper foil layer 16, can carry out laser drilling process, chemical-copper-plating process and copper plating process, between the 5th copper foil layer 15 and the 3rd conducting wire layer 130, to form the 3rd blind via hole 104 that conducts, between the 6th copper foil layer 16 and the 4th conducting wire layer 140, form the 4th blind via hole 105 that conducts, thereby so that the 6th copper foil layer 16, the 5th copper foil layer 15, the 4th conducting wire layer 140, the 3rd conducting wire layer 130, the second conducting wire layer 120 and the first conducting wire layer 110 are realized conducting, as shown in figure 12.
The 4th step, see also Figure 12, in the 5th copper foil layer 15, form second opening 151 corresponding with the first opening 131, in the 6th copper foil layer 16, form three opening 161 corresponding with the second exposed region 142, and the 3rd alkali development resin bed 33 that exposure exposes reaches the 4th alkali development resin bed 34 that exposes from the 3rd opening 161 from the second opening 151.
In the 5th copper foil layer 15, form in the second opening 151 or afterwards, also described the 5th copper foil layer 15 is made the 5th conducting wire layer 150, the 6th copper foil layer 16 is made the 6th conducting wire layer 160, thereby form six laminar substrate 10c.Described the 5th conducting wire layer 150 and the 6th conducting wire layer 160 include many conducting wires and a plurality of conductive junction point.Generally speaking, the conducting wire of the 5th conducting wire layer 150, the 6th conducting wire layer 160, conductive junction point can form simultaneously.
The conducting wire of the 5th conducting wire layer 150, the 6th conducting wire layer 160, conductive junction point can form with the second opening 151, the 161 simultaneously etchings of the 3rd opening, also can form by step-etching.Describe as an example of the 5th copper foil layer 15 example, in this step, can by image transfer and optionally etching the 5th copper foil layer 15 the 5th copper foil layer 15 made the 5th conducting wire layer 150 with second opening 151, then to be exposed the 3rd alkali development resin bed 33 that from the second opening 151, exposes; Also can by the first time image transfer and optionally etching remove the material of the 5th copper foil layer 15 at the second opening 151 places, to form the second opening 151, then the 3rd alkali development resin bed 33 that exposes and from the second opening 151, expose, again by image transfer for the second time and optionally etching remove material corresponding to the 5th copper foil layer 15 except the second opening 151, thereby form conducting wire, the conductive junction point of the 5th conducting wire layer 150.
The 5th step saw also Figure 13, at six laminar substrate 10c downside pressings the 5th alkali development resin bed 35 and the 7th copper foil layer 17, simultaneously at the six laminar substrate 10c upside hexabasic development resin bed 36 of pressing and the 8th copper foil layers 18.That is to say, place the 5th alkali development resin bed 35 on the 5th conducting wire layer 150 surface with from the 3rd alkali development resin bed 33 surfaces that the second opening 151 exposes, place the 7th copper foil layer 17 on the 5th alkali development resin bed 35 surfaces, place hexabasic development resin bed 36 on the 6th conducting wire layer 160 surface with from the 4th alkali development resin bed 34 surfaces that the 3rd opening 161 exposes simultaneously, place the 8th copper foil layer 18 on hexabasic development resin bed 36 surfaces, then adopt disposable pressing the 8th copper foil layer 18 of pressing machine, hexabasic development resin bed 36, six laminar substrate 10c, the 5th alkali development resin bed 35 and the 7th copper foil layer 17.
Six laminar substrate 10c both sides pressings the 5th alkali development resin bed 35, the 7th copper foil layer 17, hexabasic development resin bed 36 and the 8th copper foil layer 18 can by with the first embodiment in akin method of the 3rd step realize.In six laminar substrate 10c both sides, pressing the 5th alkali development resin bed 35, the 7th copper foil layer 17, behind hexabasic development resin bed 36 and the 8th copper foil layer 18, can carry out laser drilling process, chemical-copper-plating process and copper plating process, between the 7th copper foil layer 17 and the 5th conducting wire layer 150, to form the 5th blind via hole 106 that conducts, between the 8th copper foil layer 18 and the 6th conducting wire layer 160, form the 6th blind via hole 107 that conducts, and in six laminar substrate 10c, form the second via 108, thereby so that the 8th copper foil layer 18, the 7th copper foil layer 17, the 6th conducting wire layer 160, the 5th conducting wire layer 150, the 4th conducting wire layer 140, the 3rd conducting wire layer 130, the second conducting wire layer 120 and the first conducting wire layer 110 are realized conducting, as shown in figure 14.
The 6th step, see also Figure 14, in the 7th copper foil layer 17, form four opening 171 corresponding with the second opening 151, in the 8th copper foil layer 18, form five opening 181 corresponding with the 3rd opening 161, and the 5th alkali development resin bed 35 that exposure exposes reaches the hexabasic development resin bed 36 that exposes from the 5th opening 181 from the 4th opening 171.
In the 7th copper foil layer 17, form in the 4th opening 171 or afterwards, also described the 7th copper foil layer 17 is made the 7th conducting wire layer 170, in the 8th copper foil layer 18, form in the 5th opening 181 or afterwards, also described the 8th copper foil layer 18 is made the 8th conducting wire layer 180.So, namely can be made into eight laminar substrate 10d.Generally speaking, the 4th opening 171 and the 5th opening 181 can form simultaneously, and the 7th conducting wire layer 170 and the 8th conducting wire layer 180 can form simultaneously.The conducting wire of the 7th conducting wire layer 170, the 8th conducting wire layer 180, conductive junction point can form with the 4th opening 171, the 181 simultaneously etchings of the 5th opening, also can form by step-etching.When step-etching forms, the step of exposure can be after forming the 4th opening 171 and the 5th opening 181, carried out before forming the 7th conducting wire layer 170, the 8th conducting wire layer 180, also can carry out after forming the 7th conducting wire layer 170, the 8th conducting wire layer 180.
The 7th step, see also Figure 14 and Figure 15, remove the 5th alkali development resin bed 35, the 3rd alkali development resin bed 33, the first alkali development resin bed 31, hexabasic development resin bed 36 and the 4th alkali development resin bed 34 of exposed portion with the alkaline-based developer dissolving, thereby form the first groove 42 and the second groove 43.Can place the alkaline-based developer certain hour by eight laminar substrate 10d are soaked, perhaps alkaline-based developer be sprayed in eight laminar substrate 10d both sides, thereby so that the alkali development resin bed of exposed portion is removed in the alkaline-based developer dissolving.
Particularly, the 5th alkali development resin bed 35 that is exposed exposes from the 4th opening 171, can be removed by the alkaline-based developer dissolving, after the 5th alkali development resin bed 35 dissolved removals of exposed portion, thereby will also contact dissolved removal with alkaline-based developer from the 3rd alkali development resin bed 33 that the second opening 151 exposes, thereby afterwards same the first alkali development resin bed 31 that exposes from the first opening 131 also will with contact dissolved removal with alkaline-based developer, so, then can form and run through the 7th conducting wire layer 170, the 5th alkali development resin bed 35, the 5th conducting wire layer 150, the 3rd alkali development resin bed 33, the first groove 42 of the 3rd conducting wire layer 130 and the first alkali development resin bed 31.Described the first welding resisting layer 21 is exposed in the first groove 42.Similar, hexabasic development resin bed 36 after the exposure of exposing from the 5th opening 181 can be removed by the alkaline-based developer dissolving, after the hexabasic development resin bed 36 dissolved removals of exposed portion, thereby will contact with alkaline-based developer dissolved removal from the 4th alkali development resin bed 34 that the 3rd opening 161 exposes, so, then can form the second groove 43 that runs through the 8th conducting wire layer 180, hexabasic development resin bed 36, the 6th conducting wire layer 160 and the 4th alkali development resin bed 34.Described the second welding resisting layer 24 is exposed in the second groove 43.Described alkaline-based developer can be PH〉13 NaOH solution or PH〉13 KOH solution.
Before the alkali development resin bed that is exposed with the alkaline-based developer dissolving, perhaps after forming the 7th conducting wire layer 170, the 8th conducting wire layer 180, perhaps after forming the first groove 42, the second groove 43, can the 3rd welding resisting layer 25 be set on the 7th conducting wire layer 170 surface, on the 8th conducting wire layer 180 surface the 4th welding resisting layer 26 be set.So, can obtain 8-layer printed circuit board 10e.Preferably, the 3rd welding resisting layer 25, the 4th welding resisting layer 26 can form before the alkali development resin bed that is exposed with the alkaline-based developer dissolving.
The 8-layer printed circuit board 10e that makes according to the above step of the second embodiment as shown in figure 15, it comprises the 8th conducting wire layer 180 of successively pressing, hexabasic development resin bed 36, the 6th conducting wire layer 160, the 4th alkali development resin bed 34, the 4th conducting wire layer 140, the second alkali development resin bed 32, circuit substrate 10, the first alkali development resin bed 31, the 3rd conducting wire layer 130, the 3rd alkali development resin bed 33, the 5th conducting wire layer 150, the 5th alkali development resin bed 35 and the 7th conducting wire layer 170.Described circuit substrate 10 comprises the second conducting wire layer 120, substrate 100 and the first conducting wire layer 110 of fitting successively.Described the first to the 8th conducting wire layer 110 to 180 is realized conducting by the first via 101, the first to the 6 6th blind via hole 102 to 107.Described 8-layer printed circuit board 10e has the first groove 42 that runs through the 7th conducting wire layer 170, the 5th alkali development resin bed 35, the 5th conducting wire layer 150, the 3rd alkali development resin bed 33, the 3rd conducting wire layer 130 and the first alkali development resin bed 31, is exposed in the first groove 42 so that the first welding resisting layer 21 reaches the pad 114 that exposes from the first welding resisting layer 21.Described 8-layer printed circuit board 10e also has the second groove 43 that runs through the 8th conducting wire layer 180, hexabasic development resin bed 36, the 6th conducting wire layer 160 and the 4th alkali development resin bed 34, is exposed in the second groove 43 so that the second welding resisting layer 24 reaches the pad 144 that exposes from the second welding resisting layer 24.Described the first groove 42 and the second groove 43 all can be used for the holding electronic components and parts, so that electronic devices and components can be installed on the pad 114 that exposes from the first welding resisting layer 21 in the first exposed region 112, can also be installed on the pad 144 that from the second welding resisting layer 24, exposes in the second exposed region 142, thereby so that electronic devices and components do not take space outerpace.
The distortion that it will be understood by those skilled in the art that the above step of using the technical program can be made the multilayer circuit board of other numbers of plies of the groove with other quantity.For example, can make the 6-layer circuit board with two grooves by four steps of the first step to the of the second embodiment and the step of developing.Namely, if with six laminar substrate 10c among alkaline-based developer dissolving removal Figure 12, then can obtain to have the 6-layer circuit board of the groove of two different depths, one of them groove runs through the 6th conducting wire layer 160 and the 4th alkali development resin bed 34, and another groove runs through the 5th conducting wire layer 150, the 3rd alkali development resin bed 33, the 3rd conducting wire layer 130 and the first alkali development resin bed 31.Again for example, in the above step of the second embodiment, if only at the downside addition first alkali development resin bed 31 of circuit substrate 10, the 3rd copper foil layer 13, the 3rd alkali development resin bed 33, the 5th copper foil layer 15, the 5th alkali development resin bed 35 and the 7th copper foil layer 17, and not at the upside addition second alkali development resin bed 32 of circuit substrate 10, the 4th copper foil layer 14, the 4th alkali development resin bed 34, the 6th copper foil layer 16, hexabasic development resin bed 36 and the 8th copper foil layer 18, then by making opening, exposure, make after the step of conducting wire layer and development, can make five layer circuit boards with a groove, this groove runs through the 7th conducting wire layer 170, the 5th alkali development resin bed 35, the 5th conducting wire layer 150, the 3rd alkali development resin bed 33, the 3rd conducting wire layer 130 and the first alkali development resin bed 31.Again for example, if only at downside addition the first alkali development resin bed 31, the 3rd copper foil layer 13, the 3rd alkali development resin bed 33, the 5th copper foil layer 15 of circuit substrate 10, and other any layers of not addition, then by after the step of making opening, exposure, making conducting wire layer and development, can make a four-layer circuit board with a groove, this groove runs through the 5th conducting wire layer 150, the 3rd alkali development resin bed 33, the 3rd conducting wire layer 130 and the first alkali development resin bed 31.The multilayer circuit board of other numbers of plies with other structures is made in the distortion of step that certainly, can also be by above embodiment.
It will be understood by those skilled in the art that multilayer circuit board that the technical program is produced can be thought comprises circuit substrate 10 and the solderless substrate that is pressed on together.Described circuit substrate 10 comprises that the exposed region 112 of the first conducting wire layer 110, the first conducting wire layer 110 is provided with welding resisting layer.The number of plies of described solderless substrate is decided on the number of times of pressing, comprises the alkali development resin bed of the multilayer grooved that is pressed on together and the conducting wire layer of multilayer opening.For example, can comprise the alkali development resin bed of three layers of fluting and the conducting wire layer of three layers of opening, be positioned at as shown in figure 15 solderless substrate circuit substrate 10 downsides, that consisted of by the 7th conducting wire layer 170, the 5th alkali development resin bed 35, the 5th conducting wire layer 150, the 3rd alkali development resin bed 33, the 3rd conducting wire layer 130 and the first alkali development resin bed 31.The conducting wire layer alternative arrangement of the alkali development resin bed of described multilayer grooved and multilayer opening only has the conducting wire layer of one deck opening between every adjacent two layers alkali development resin bed.Described solderless substrate has a groove, described groove runs through the alkali development resin bed of every layer of fluting of solderless substrate and the conducting wire layer of every layer of opening, described groove is corresponding with the described welding resisting layer that exposed region 112 arranges, so that a plurality of pads 114 of described welding resisting layer and the exposed region 112 that exposes from welding resisting layer are exposed in the described groove, described groove is used for the holding electronic components and parts.
In the process of the making multilayer circuit board of the technical program, by pressing alkali development resin bed, follow-uply can make easily the formation groove by the step of developing, like this then so that whole manufacture crafts all can realize by comparatively ripe automatic flow of present stage, removed the waste of human resources from, and so that the precision of manufacture craft is higher, avoided error and the high scrappage of artificial fluting.
Be understandable that, for the person of ordinary skill of the art, can make other various corresponding changes and distortion by technical conceive according to the present invention, and all these change the protection range that all should belong to claim of the present invention with distortion.
Claims (15)
1. the manufacture method of a multilayer circuit board comprises step:
Circuit substrate is provided, and described circuit substrate comprises substrate and is fitted in the first copper foil layer of substrate surface;
The first copper foil layer is made the first conducting wire layer, and described the first conducting wire floor has the first exposed region and the first pressing district;
At described the first exposed region the first welding resisting layer is set;
The first alkali development resin bed and the 3rd copper foil layer are closed in the first conducting wire layer one side pressure at circuit substrate, described the first alkali development resin bed contacts with surface, the first pressing district and the first welding resisting layer surface, and described the 3rd copper foil layer contacts with described the first alkali development resin bed;
In the 3rd copper foil layer, form first opening corresponding with the first exposed region, to expose the first alkali development resin bed corresponding to the first exposed region;
The first alkali development resin bed that exposure exposes from the first opening; And
Remove the first alkali development resin bed of exposed portion with the alkaline-based developer dissolving, thereby form a groove, described the first welding resisting layer is exposed in the described groove.
2. the manufacture method of multilayer circuit board as claimed in claim 1 is characterized in that, when forming first opening corresponding with the first exposed region in the 3rd copper foil layer, also the 3rd copper foil layer is made the 3rd conducting wire layer.
3. the manufacture method of multilayer circuit board as claimed in claim 1 is characterized in that, after the first alkali development resin bed that exposure exposes from the first opening, the 3rd copper foil layer is made the 3rd conducting wire layer.
4. the manufacture method of multilayer circuit board as claimed in claim 2 or claim 3 is characterized in that, before removing the first alkali development resin bed of exposed portion with the alkaline-based developer dissolving, on layer surface, the 3rd conducting wire the second welding resisting layer is set.
5. the manufacture method of multilayer circuit board as claimed in claim 1 is characterized in that, described alkaline-based developer is pH value greater than 13 NaOH solution, perhaps is pH value greater than 13 KOH solution.
6. the manufacture method of multilayer circuit board as claimed in claim 1 is characterized in that, closes the first alkali development resin bed and the 3rd copper foil layer comprises step in the first conducting wire layer one side pressure of circuit substrate:
At the photoresist dry film of the first conducting wire layer one side applying alkali-developable of circuit substrate as described the first alkali development resin bed;
At described the 3rd copper foil layer of photoresist dry film applying; And
Adopt pressing machine one step press circuit substrate, photoresist dry film and the 3rd copper foil layer.
7. the manufacture method of multilayer circuit board as claimed in claim 1 is characterized in that, closes the first alkali development resin bed and the 3rd copper foil layer comprises step in the first conducting wire layer one side pressure of circuit substrate:
Print the ink lay of alkali-developable as described the first alkali development resin bed in the first conducting wire layer one side of circuit substrate;
Described the 3rd copper foil layer of ink lay applying in printing; And
Adopt pressing machine to carry out one step press circuit substrate, ink lay and the 3rd copper foil layer.
8. the manufacture method of multilayer circuit board as claimed in claim 1 is characterized in that, described circuit substrate also comprises the second copper foil layer, and described substrate is fitted between the first copper foil layer and the second copper foil layer; When the first copper foil layer being made the first conducting wire layer, also the second copper foil layer is made the second conducting wire layer; When the first alkali development resin bed and the 3rd copper foil layer are closed in the first conducting wire layer one side pressure of circuit substrate, also close the second alkaline development resin bed and the 4th copper foil layer in the second conducting wire layer one side pressure of circuit substrate, described the second alkali development resin bed contacts with layer surface, the second conducting wire, and described the 4th copper foil layer contacts with the second alkali development resin bed; Forming the first opening simultaneously or after the first alkali development resin bed that exposure exposes, also the 3rd copper foil layer is made the 3rd conducting wire layer from the first opening, also the 4th copper foil layer is made simultaneously the 4th conducting wire layer; Before removing the first alkali development resin bed of exposed portion with the alkaline-based developer dissolving, on layer surface, the 3rd conducting wire the second welding resisting layer is set, on layer surface, the 4th conducting wire the 3rd welding resisting layer is set.
9. the manufacture method of a multilayer circuit board comprises step:
Circuit substrate is provided, and described circuit substrate comprises substrate and is fitted in the first copper foil layer of substrate surface;
The first copper foil layer is made the first conducting wire layer, and described the first conducting wire floor has the first exposed region and the first pressing district;
At described the first exposed region the first welding resisting layer is set;
The first alkali development resin bed and the 3rd copper foil layer are closed in the first conducting wire layer one side pressure at circuit substrate, described the first alkali development resin bed contacts with surface, the first pressing district and the first welding resisting layer surface, and described the 3rd copper foil layer contacts with described the first alkali development resin bed;
In the 3rd copper foil layer, form the first opening corresponding to the first exposed region, to expose the first alkali development resin bed corresponding to the first exposed region;
The first alkali development resin bed that exposure exposes from the first opening;
The 3rd alkali development resin bed and the 5th copper foil layer are closed in the 3rd copper foil layer one side pressure at circuit substrate, described the 3rd alkali development resin bed reaches the first alkali development resin bed that exposes from the first opening with described the 3rd copper foil layer and contacts, and described the 5th copper foil layer contacts with the 3rd alkali development resin bed;
In the 5th copper foil layer, form second opening corresponding with the first opening;
The 3rd alkali development resin bed that exposure exposes from the second opening; And
Remove the 3rd alkali development resin bed and the first alkali development resin bed of exposed portion with the alkaline-based developer dissolving, thereby form a groove, described the first welding resisting layer is exposed in the described groove.
10. the manufacture method of multilayer circuit board as claimed in claim 9 is characterized in that, described circuit substrate also comprises the second copper foil layer, and described substrate is fitted between the first copper foil layer and the second copper foil layer; When the first copper foil layer being made the first conducting wire layer, also the second copper foil layer is made the second conducting wire layer; When the first alkali development resin bed and the 3rd copper foil layer are closed in the first conducting wire layer one side pressure of circuit substrate, also close the second alkaline development resin bed and the 4th copper foil layer in the second conducting wire layer one side pressure of circuit substrate, described the second alkali development resin bed contacts with layer surface, the second conducting wire, and described the 4th copper foil layer contacts with the second alkali development resin bed; Forming the first opening simultaneously or after the first alkali development resin bed that exposure exposes, also the 3rd copper foil layer is made the 3rd conducting wire layer from the first opening, also the 4th copper foil layer is made simultaneously the 4th conducting wire layer; When the 3rd alkali development resin bed and the 5th copper foil layer are closed in the 3rd copper foil layer one side pressure of circuit substrate, also close the 4th alkaline development resin bed and the 6th copper foil layer in the 4th conducting wire layer one side pressure of circuit substrate, described the 4th alkali development resin bed contacts with layer surface, the 4th conducting wire, and described the 6th copper foil layer contacts with the 4th alkali development resin bed; Forming the second opening simultaneously or after the 3rd alkali development resin bed that exposure exposes, also the 5th copper foil layer is made the 5th conducting wire layer from the second opening, also the 6th copper foil layer is made simultaneously the 6th conducting wire layer; Before removing the 3rd alkali development resin bed and the first alkali development resin bed of exposed portion with the alkaline-based developer dissolving, on layer surface, the 5th conducting wire the second welding resisting layer is set, on layer surface, the 6th conducting wire the 3rd welding resisting layer is set.
11. the manufacture method of a multilayer circuit board comprises step:
Circuit substrate is provided, and described circuit substrate comprises substrate and is fitted in the first copper foil layer of substrate surface;
The first copper foil layer is made the first conducting wire layer, and described the first conducting wire floor has the first exposed region and the first pressing district;
At described the first exposed region the first welding resisting layer is set;
The first alkali development resin bed and the 3rd copper foil layer are closed in the first conducting wire layer one side pressure at circuit substrate, described the first alkali development resin bed contacts with surface, the first pressing district and the first welding resisting layer surface, and described the 3rd copper foil layer contacts with described the first alkali development resin bed;
In the 3rd copper foil layer, form the first opening corresponding to the first exposed region, to expose the first alkali development resin bed corresponding to the first exposed region;
The first alkali development resin bed that exposure exposes from the first opening;
The 3rd alkali development resin bed and the 5th copper foil layer are closed in the 3rd copper foil layer one side pressure at circuit substrate, described the 3rd alkali development resin bed reaches the first alkali development resin bed that exposes from the first opening with described the 3rd copper foil layer and contacts, and described the 5th copper foil layer contacts with the 3rd alkali development resin bed;
In the 5th copper foil layer, form second opening corresponding with the first opening;
The 3rd alkali development resin bed that exposure exposes from the second opening;
The 5th alkali development resin bed and the 7th copper foil layer are closed in the 5th copper foil layer one side pressure at circuit substrate, described the 5th alkali development resin bed reaches the 3rd alkali development resin bed that exposes from the second opening with described the 5th copper foil layer and contacts, and described the 7th copper foil layer contacts with the 5th alkali development resin bed;
In the 7th copper foil layer, form four opening corresponding with the second opening;
The 5th alkali development resin bed that exposure exposes from the 4th opening; And
Remove the 5th alkali development resin bed, the 3rd alkali development resin bed and the first alkali development resin bed of exposed portion with the alkaline-based developer dissolving, thereby form a groove, described the first welding resisting layer is exposed in the described groove.
12. the manufacture method of multilayer circuit board as claimed in claim 11 is characterized in that, described circuit substrate also comprises the second copper foil layer, and described substrate is fitted between the first copper foil layer and the second copper foil layer; When the first copper foil layer being made the first conducting wire layer, also the second copper foil layer is made the second conducting wire layer; When the first alkali development resin bed and the 3rd copper foil layer are closed in the first conducting wire layer one side pressure of circuit substrate, also close the second alkaline development resin bed and the 4th copper foil layer in the second conducting wire layer one side pressure of circuit substrate, described the second alkali development resin bed contacts with layer surface, the second conducting wire, and described the 4th copper foil layer contacts with the second alkali development resin bed; Forming the first opening simultaneously or after the first alkali development resin bed that exposure exposes, also the 3rd copper foil layer is made the 3rd conducting wire layer from the first opening, also the 4th copper foil layer is made simultaneously the 4th conducting wire layer; When the 3rd alkali development resin bed and the 5th copper foil layer are closed in the 3rd copper foil layer one side pressure of circuit substrate, also close the 4th alkaline development resin bed and the 6th copper foil layer in the 4th conducting wire layer one side pressure of circuit substrate, described the 4th alkali development resin bed contacts with layer surface, the 4th conducting wire, and described the 6th copper foil layer contacts with the 4th alkali development resin bed; Forming the second opening simultaneously or after the 3rd alkali development resin bed that exposure exposes, also the 5th copper foil layer is made the 5th conducting wire layer from the second opening, also the 6th copper foil layer is made simultaneously the 6th conducting wire layer; When the 5th alkali development resin bed and the 7th copper foil layer are closed in the 5th copper foil layer one side pressure of circuit substrate, also close hexabasic development resin bed and the 8th copper foil layer in the 6th conducting wire layer one side pressure of circuit substrate, described hexabasic development resin bed contacts with layer surface, the 6th conducting wire, and described the 8th copper foil layer contacts with hexabasic development resin bed; Forming the 4th opening simultaneously or after the 5th alkali development resin bed that exposure exposes, also the 7th copper foil layer is made the 7th conducting wire layer from the 4th opening, also the 8th copper foil layer is made simultaneously the 8th conducting wire layer; Before removing the 5th alkali development resin bed, the 3rd alkali development resin bed and the first alkali development resin bed of exposed portion with the alkaline-based developer dissolving, on layer surface, the 7th conducting wire the second welding resisting layer is set, on layer surface, the 8th conducting wire the 3rd welding resisting layer is set.
13. multilayer circuit board, formed by manufacture method making as claimed in claim 1, described multilayer circuit board comprises the circuit substrate of successively pressing, the first alkali development resin bed and the 3rd conducting wire layer, described circuit substrate comprises substrate and is fitted in the first conducting wire layer of substrate surface, described the first conducting wire floor has exposed region and pressing district, described exposed region is provided with the first welding resisting layer, described multilayer circuit board has the groove corresponding with exposed region, described groove runs through the 3rd conducting wire layer and the first alkali development resin bed, and described the first welding resisting layer is exposed in the described groove.
14. multilayer circuit board as claimed in claim 13, it is characterized in that, described exposed region comprises many circuits and a plurality of pad, thereby described a plurality of pad exposes from the first welding resisting layer and also is exposed in the groove, described groove is used for the holding electronic components and parts, described multilayer circuit board also comprises the second alkali development resin bed, the 4th conducting wire layer, the second welding resisting layer and the 3rd welding resisting layer, described circuit substrate also comprises the second conducting wire layer, described substrate is fitted between the first conducting wire layer and the second conducting wire layer, described the second alkali development resin bed is pressed between the 4th conducting wire layer and the second conducting wire layer, described the second welding resisting layer is arranged at layer surface, the 3rd conducting wire, and described the 3rd welding resisting layer is arranged at layer surface, the 4th conducting wire.
15. multilayer circuit board, comprise the circuit substrate and the solderless substrate that are pressed on together, described circuit substrate comprises substrate and is fitted in the first conducting wire layer of substrate surface, described the first conducting wire floor has exposed region and pressing district, described exposed region surface is provided with welding resisting layer, and a plurality of pads of exposed region expose from described welding resisting layer, described solderless substrate comprises the alkali development resin bed of the multilayer grooved that is pressed on together and the conducting wire layer of multilayer opening, the conducting wire layer alternative arrangement of the alkali development resin bed of described multilayer grooved and multilayer opening, the conducting wire layer that one deck opening is only arranged between the alkali development resin bed of every adjacent two layers fluting, described solderless substrate has a groove, described groove runs through the alkali development resin bed of every layer of fluting of solderless substrate and the conducting wire layer of every layer of opening, described groove is corresponding with described welding resisting layer, so that the pad of described welding resisting layer and a plurality of exposed regions of exposing from welding resisting layer is exposed in the described groove, described groove is used for the holding electronic components and parts.
Priority Applications (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201210127474.3A CN103379749B (en) | 2012-04-27 | 2012-04-27 | Multilayer circuit board and preparation method thereof |
| TW101115804A TWI442861B (en) | 2012-04-27 | 2012-05-03 | Multilayer printed circuit board and method for manufacturing same |
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| CN201210127474.3A CN103379749B (en) | 2012-04-27 | 2012-04-27 | Multilayer circuit board and preparation method thereof |
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| CN103379749B CN103379749B (en) | 2016-06-01 |
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| CN110545635A (en) * | 2018-05-29 | 2019-12-06 | 鹏鼎控股(深圳)股份有限公司 | Method for manufacturing multilayer circuit board |
| CN110545637A (en) * | 2018-05-29 | 2019-12-06 | 鹏鼎控股(深圳)股份有限公司 | Circuit board and manufacturing method thereof |
| CN110876238A (en) * | 2018-09-03 | 2020-03-10 | 捷普电子(广州)有限公司 | Circuit board and its manufacturing method, and assembly of circuit board and electronic element and its assembling method |
| CN111132442A (en) * | 2018-10-31 | 2020-05-08 | 先丰通讯股份有限公司 | Channel type circuit board |
| CN111935909A (en) * | 2020-07-31 | 2020-11-13 | 上海安费诺永亿通讯电子有限公司 | Recyclable electronic circuit with paper substrate and preparation method and recycling method thereof |
| CN114731760A (en) * | 2021-06-30 | 2022-07-08 | 荣耀终端有限公司 | Terminal device |
| WO2023273314A1 (en) * | 2021-06-30 | 2023-01-05 | 荣耀终端有限公司 | Terminal device |
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| Publication number | Priority date | Publication date | Assignee | Title |
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| CN110545635A (en) * | 2018-05-29 | 2019-12-06 | 鹏鼎控股(深圳)股份有限公司 | Method for manufacturing multilayer circuit board |
| CN110545637A (en) * | 2018-05-29 | 2019-12-06 | 鹏鼎控股(深圳)股份有限公司 | Circuit board and manufacturing method thereof |
| CN110545637B (en) * | 2018-05-29 | 2021-08-24 | 鹏鼎控股(深圳)股份有限公司 | Circuit board and manufacturing method thereof |
| CN110545635B (en) * | 2018-05-29 | 2021-09-14 | 鹏鼎控股(深圳)股份有限公司 | Method for manufacturing multilayer circuit board |
| CN110876238A (en) * | 2018-09-03 | 2020-03-10 | 捷普电子(广州)有限公司 | Circuit board and its manufacturing method, and assembly of circuit board and electronic element and its assembling method |
| CN110876238B (en) * | 2018-09-03 | 2022-03-01 | 捷普电子(广州)有限公司 | Circuit board and its manufacturing method, and assembly of circuit board and electronic element and its assembling method |
| CN111132442A (en) * | 2018-10-31 | 2020-05-08 | 先丰通讯股份有限公司 | Channel type circuit board |
| CN111935909A (en) * | 2020-07-31 | 2020-11-13 | 上海安费诺永亿通讯电子有限公司 | Recyclable electronic circuit with paper substrate and preparation method and recycling method thereof |
| CN114731760A (en) * | 2021-06-30 | 2022-07-08 | 荣耀终端有限公司 | Terminal device |
| WO2023273314A1 (en) * | 2021-06-30 | 2023-01-05 | 荣耀终端有限公司 | Terminal device |
Also Published As
| Publication number | Publication date |
|---|---|
| TW201345356A (en) | 2013-11-01 |
| CN103379749B (en) | 2016-06-01 |
| TWI442861B (en) | 2014-06-21 |
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