CN103379749B - Multilayer circuit board and preparation method thereof - Google Patents
Multilayer circuit board and preparation method thereof Download PDFInfo
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- CN103379749B CN103379749B CN201210127474.3A CN201210127474A CN103379749B CN 103379749 B CN103379749 B CN 103379749B CN 201210127474 A CN201210127474 A CN 201210127474A CN 103379749 B CN103379749 B CN 103379749B
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Abstract
The present invention provides the manufacture method of a kind of multilayer circuit board, including step: providing circuit substrate, described circuit substrate includes substrate and is fitted in the first copper foil layer of substrate surface; First copper foil layer is made the first conductive circuit layer, and described first conductive circuit layer has the first exposed region and the first pressing district; At described first exposed region, the first welding resisting layer is set; The first conductive circuit layer side pressing the first alkali developable resin layer and the 3rd copper foil layer at circuit substrate; 3rd copper foil layer forms first opening corresponding with the first exposed region, to expose the first alkali developable resin layer corresponding to the first exposed region; The first alkali developable resin layer that exposure exposes from the first opening; Dissolve the first alkali developable resin layer removing exposed portion with alkaline-based developer, thus forming a groove, described first welding resisting layer is exposed in described groove. The present invention also provides for a kind of multilayer circuit board being made up of above method.
Description
Technical field
The present invention relates to circuit board technology, particularly relate to reeded multilayer circuit board of a kind of tool and preparation method thereof.
Background technology
In information, communication and consumer electronics industry, circuit board is the basic comprising important document that all electronic products are indispensable. Along with electronic product develops toward miniaturization, high speed direction, circuit board also develops from single-sided circuit board toward double-sided PCB, multilayer circuit board direction. Multilayer circuit board, especially the built-in type multilayer circuit board burying electronic devices and components in is widely used especially, refer to Takahashi, et al. A. it was published in IEEETrans.onComponents in 1992, the document " HighdensitymultilayerprintedcircuitboardforHITACM ~ 880 " of Packaging, andManufacturingTechnology.
Built-in type circuit board generally has a groove, with embedding electronic devices and components. When making, it is necessary to first make multilayer circuit board, then adopting the method for artificial fluting to dig out groove again, the method for artificial fluting not only needs more human resources, and the precision manually slotted is not high, can affect precision and the quality of circuit board.
Summary of the invention
Therefore, it is necessary to provide a kind of reeded multilayer circuit board of tool with better product quality and preparation method thereof.
Hereinafter with embodiment, a kind of multilayer circuit board and preparation method thereof will be described.
The manufacture method of a kind of multilayer circuit board, including step: providing circuit substrate, described circuit substrate includes substrate and is fitted in the first copper foil layer of substrate surface; First copper foil layer is made the first conductive circuit layer, and described first conductive circuit layer has the first exposed region and the first pressing district; At described first exposed region, the first welding resisting layer is set; The first conductive circuit layer side pressing the first alkali developable resin layer and the 3rd copper foil layer at circuit substrate, described first alkali developable resin floor and the first surface, pressing district and the first welding resisting layer surface contact, and described 3rd copper foil layer contacts with described first alkali developable resin layer; 3rd copper foil layer forms first opening corresponding with the first exposed region, to expose the first alkali developable resin layer corresponding to the first exposed region; The first alkali developable resin layer that exposure exposes from the first opening; And the first alkali developable resin layer removing exposed portion is dissolved with alkaline-based developer, thus forming a groove, described first welding resisting layer is exposed in described groove.
The manufacture method of a kind of multilayer circuit board, including step: providing circuit substrate, described circuit substrate includes substrate and is fitted in the first copper foil layer of substrate surface; First copper foil layer is made the first conductive circuit layer, and described first conductive circuit layer has the first exposed region and the first pressing district; At described first exposed region, the first welding resisting layer is set; The first conductive circuit layer side pressing the first alkali developable resin layer and the 3rd copper foil layer at circuit substrate, described first alkali developable resin floor and the first surface, pressing district and the first welding resisting layer surface contact, and described 3rd copper foil layer contacts with described first alkali developable resin layer; 3rd copper foil layer forms the first opening corresponding to the first exposed region, to expose the first alkali developable resin layer corresponding to the first exposed region; The first alkali developable resin layer that exposure exposes from the first opening; The 3rd copper foil layer side pressing the 3rd alkali developable resin layer and the 5th copper foil layer at circuit substrate, described 3rd alkali developable resin layer and described 3rd copper foil layer and the first alkali developable resin layer exposed from the first opening contact, and described 5th copper foil layer and the 3rd alkali developable resin layer contact; 5th copper foil layer is formed second opening corresponding with the first opening; The 3rd alkali developable resin layer that exposure exposes from the second opening; And the 3rd alkali developable resin layer and the first alkali developable resin layer of removing exposed portion is dissolved with alkaline-based developer, thus forming a groove, described first welding resisting layer is exposed in described groove.
The manufacture method of a kind of multilayer circuit board, including step: providing circuit substrate, described circuit substrate includes substrate and is fitted in the first copper foil layer of substrate surface; First copper foil layer is made the first conductive circuit layer, and described first conductive circuit layer has the first exposed region and the first pressing district; At described first exposed region, the first welding resisting layer is set; The first conductive circuit layer side pressing the first alkali developable resin layer and the 3rd copper foil layer at circuit substrate, described first alkali developable resin floor and the first surface, pressing district and the first welding resisting layer surface contact, and described 3rd copper foil layer contacts with described first alkali developable resin layer; 3rd copper foil layer forms the first opening corresponding to the first exposed region, to expose the first alkali developable resin layer corresponding to the first exposed region; The first alkali developable resin layer that exposure exposes from the first opening; The 3rd copper foil layer side pressing the 3rd alkali developable resin layer and the 5th copper foil layer at circuit substrate, described 3rd alkali developable resin layer and described 3rd copper foil layer and the first alkali developable resin layer exposed from the first opening contact, and described 5th copper foil layer and the 3rd alkali developable resin layer contact; 5th copper foil layer is formed second opening corresponding with the first opening; The 3rd alkali developable resin layer that exposure exposes from the second opening; The 5th copper foil layer side pressing the 5th alkali developable resin layer and the 7th copper foil layer at circuit substrate, described 5th alkali developable resin layer and described 5th copper foil layer and the 3rd alkali developable resin layer exposed from the second opening contact, and described 7th copper foil layer and the 5th alkali developable resin layer contact; 7th copper foil layer is formed fourth opening corresponding with the second opening; The 5th alkali developable resin layer that exposure exposes from the 4th opening; And dissolve removal the 5th alkali developable resin layer of exposed portion, the 3rd alkali developable resin layer and the first alkali developable resin layer with alkaline-based developer, thus forming a groove, described first welding resisting layer is exposed in described groove.
A kind of multilayer circuit board, made by manufacture method as above and formed, described multilayer circuit board includes the circuit substrate of pressing successively, first alkali developable resin layer and the 3rd conductive circuit layer, described circuit substrate includes substrate and is fitted in the first conductive circuit layer of substrate surface, described first conductive circuit layer has exposed region and pressing district, described exposed region is provided with the first welding resisting layer, described multilayer circuit board has the groove corresponding with exposed region, described groove runs through the 3rd conductive circuit layer and the first alkali developable resin layer, described first welding resisting layer is exposed in described groove.
A kind of multilayer circuit board, including the circuit substrate being pressed on together and solderless substrate, described circuit substrate includes substrate and is fitted in the first conductive circuit layer of substrate surface, described first conductive circuit layer has exposed region and pressing district, described exposed region surface configuration has welding resisting layer, and multiple pads of exposed region expose from described welding resisting layer, described solderless substrate includes the conductive circuit layer of alkali developable resin layer and the multilamellar opening being pressed on multilayer grooved together, the alkali developable resin layer of described multilayer grooved and the conductive circuit layer of multilamellar opening are alternately arranged, the conductive circuit layer of one layer of opening is only had between the alkali developable resin layer of every adjacent two layers fluting, described solderless substrate has a groove, described groove runs through the alkali developable resin layer of every layer of fluting of solderless substrate and the conductive circuit layer of every layer of opening, described groove is corresponding with described welding resisting layer, so that described welding resisting layer and the pad of multiple exposed regions exposed from welding resisting layer are exposed in described groove, described groove is used for holding electronic components and parts.
In the process making multilayer circuit board of the technical program, by pressing alkali developable resin layer, the follow-up step that can pass through to develop makes formation groove easily, such then make whole processing technology all can pass through present stage comparatively ripe automatic flow and realize, eliminate the waste of human resources, and the precision making processing technology is higher, the multilayer circuit board made has good quality, it is to avoid the error of artificial fluting and high scrappage.
Accompanying drawing explanation
The circuit substrate schematic diagram that Fig. 1 provides for the technical program embodiment.
Copper foil layer in the circuit substrate of Fig. 1 is formed the schematic diagram after conductive circuit layer by Fig. 2.
Fig. 3 is the elevational schematic view of Fig. 2.
Fig. 4 is the schematic diagram after the circuit substrate of Fig. 3 arranges the first welding resisting layer.
Fig. 5 is the schematic diagram after Fig. 4 both sides respectively pressing alkali developable resin lamination copper foil layer.
Fig. 6 will form the schematic diagram after the first opening corresponding with the first welding resisting layer in the downside copper foil layer of the circuit substrate of Fig. 5.
The copper foil layer of both sides up and down of Fig. 6 is made conductive circuit layer thus obtaining the schematic diagram of four laminar substrates by Fig. 7.
Fig. 8 is the schematic diagram having reeded four-layer circuit board being made up of four laminar substrates of Fig. 7.
Fig. 9 is the elevational schematic view of Fig. 7.
Figure 10 is the schematic diagram after arranging the second welding resisting layer on four laminar substrates of Fig. 7.
Figure 11 is the schematic diagram after the pressing alkali developable resin lamination copper foil layer respectively of the four laminar substrate both sides of Figure 10.
The copper foil layer of both sides up and down of Figure 11 is made conductive circuit layer thus obtaining the schematic diagram of six laminar substrates by Figure 12.
Figure 13 is the schematic diagram after the both sides pressing alkali developable resin lamination copper foil layer respectively of six laminar substrates of Figure 12.
Figure 14 is the schematic diagram after the copper foil layer of both sides up and down of Figure 13 is made conductive circuit layer.
Figure 15 is the schematic diagram of the 8-layer printed circuit board with two grooves being made up of eight laminar substrates of Figure 14.
Main element symbol description
| Circuit substrate | 10 |
| First copper foil layer | 11 |
| Substrate | 100 |
| Second copper foil layer | 12 |
| First conductive circuit layer | 110 |
| Second conductive circuit layer | 120 |
| First pressing district | 111 |
| First exposed region | 112 |
| Circuit | 113��143 |
| Pad | 114��144 |
| First welding resisting layer | 21 |
| First via | 101 |
| First alkali developable resin layer | 31 |
| 3rd copper foil layer | 13 |
| Second alkali developable resin layer | 32 |
| 4th copper foil layer | 14 |
| First blind via hole | 102 |
| Second blind via hole | 103 |
| First opening | 131 |
| 4th conductive circuit layer | 140 |
| 3rd conductive circuit layer | 130 |
| Four laminar substrates | 10a |
| First groove | 41��42 |
| Four-layer circuit board | 10b |
| Second welding resisting layer | 22��24 |
| 3rd welding resisting layer | 23��25 |
| Second pressing district | 141 |
| Second exposed region | 142 |
| 3rd alkali developable resin layer | 33 |
| 5th copper foil layer | 15 |
| 4th alkali developable resin layer | 34 |
| 6th copper foil layer | 16 |
| 3rd blind via hole | 104 |
| 4th blind via hole | 105 |
| Second opening | 151 |
| 3rd opening | 161 |
| Six laminar substrates | 10c |
| 5th conductive circuit layer | 150 |
| 6th conductive circuit layer | 160 |
| 5th alkali developable resin layer | 35 |
| 7th copper foil layer | 17 |
| Hexabasic developable resin layer | 36 |
| 8th copper foil layer | 18 |
| 5th blind via hole | 106 |
| 6th blind via hole | 107 |
| 4th opening | 171 |
| 5th opening | 181 |
| 7th conductive circuit layer | 170 |
| 8th conductive circuit layer | 180 |
| Eight laminar substrates | 10d |
| Second groove | 43 |
| 4th welding resisting layer | 26 |
| 8-layer printed circuit board | 10e |
Following detailed description of the invention will further illustrate the present invention in conjunction with above-mentioned accompanying drawing.
Detailed description of the invention
Below in conjunction with accompanying drawing and multiple embodiment, multilayer circuit board that the technical program provides and preparation method thereof is described in further detail.
The manufacture method of the multilayer circuit board that the technical program first embodiment provides, including step:
The first step, refers to Fig. 1, it is provided that circuit substrate 10. In the present embodiment, described circuit substrate 10 is double face copper, including the first copper foil layer 11 fitted successively from top to bottom, substrate 100 and the second copper foil layer 12. Described substrate 100 is the insulating barrier being made up of insulant. In other embodiments, described substrate 100 can be multilager base plate, i.e. substrate 100 can be the structure including the alternately arranged copper foil layer of multilamellar with insulating barrier. In other embodiments, circuit substrate 10 can be single-side coated copper plate, only includes the first copper foil layer 11 and substrate 100.
Second step, sees also Fig. 2 to Fig. 4, and described first copper foil layer 11 is made the first conductive circuit layer 110, and the second copper foil layer 12 is made the second conductive circuit layer 120. It is respectively provided with a plurality of conducting wire and multiple conductive junction point in first conductive circuit layer 110 and the second conductive circuit layer 120, can by image transfer and optionally chemical etching the first copper foil layer 11 and the second copper foil layer 12 and formed, it is also possible to formed by laser selective ground ablation the first copper foil layer 11 and the second copper foil layer 12.
Described first conductive circuit layer 110 has the first pressing district 111 and the first exposed region 112. In the present embodiment, described first exposed region 112 is rectangle, and described first pressing district 111 surrounds and surround the first exposed region 112. First exposed region 112 includes a plurality of circuit 113 and multiple pad 114. After forming the first conductive circuit layer 110 and the second conductive circuit layer 120, at the first exposed region 112, the first welding resisting layer 21 is set, first welding resisting layer 21 covers a plurality of circuit 113 of the first exposed region 112, and cover the surface of substrate 100 exposed from the first exposed region 112, expose multiple pads 114 of the first exposed region 112 simultaneously. First welding resisting layer 21 can be formed by the mode printed, it is also possible to is formed by the mode fitted.
In the technical program, before making the first conductive circuit layer 110 and the second conductive circuit layer 120, also hole to form at least one first through hole in circuit substrate 10, and form conductive layer by chemical plating and electroplating technology at the hole wall of the first through hole, the first through hole to be made the first via 101. Described first via 101 can conduct the first conductive circuit layer 110 and the second conductive circuit layer 120.
3rd step, refers to Fig. 5, pressing the first alkali developable resin layer 31 and the 3rd copper foil layer 13 on the downside of circuit substrate 10, simultaneously pressing the second alkali developable resin layer 32 and the 4th copper foil layer 14 on the upside of circuit substrate 10. That is, the first alkali developable resin floor 31 is placed on the first welding resisting layer 21 surface of the first surface, pressing district 111 of the first conductive circuit layer 110 and the first exposed region 112, the 3rd copper foil layer 13 is placed on the first alkali developable resin layer 31 surface, place the second alkali developable resin layer 32 on the second conductive circuit layer 120 surface simultaneously, the 4th copper foil layer 14 is placed on the second alkali developable resin layer 32 surface, and by pressing machine disposable pressing the first alkali developable resin layer the 31, the 3rd copper foil layer 13, circuit substrate the 10, second alkali developable resin layer 32 and the 4th copper foil layer 14.
The material of described first alkali developable resin layer 31 and the second alkali developable resin layer 32 can be identical, constitutes by alkali developable resin, acid-fast alkali-proof when described alkali developable resin refers to unexposed, and the resin material that can dissolve in alkaline-based developer after exposing. For example, it is possible to be the abundant invisible ink in river, for instance, it is possible to for the photoresist of alkali-developable; Again for example, it is possible to be the alkali development resin composition in patent application 200580000757.
Can realize as follows at circuit substrate 10 both sides pressing the first alkali developable resin layer the 31, the 3rd copper foil layer the 13, second alkali developable resin layer 32 and the 4th copper foil layer 14: the dry film of alkali-developable of first fitting respectively in circuit substrate 10 both sides, then fit respectively on dry film Copper Foil, finally adopt pressing machine to carry out one step press. Certainly, can also realize as follows: first print the ink of alkali-developable then Copper Foil of fitting on the ink of upside printing in the upside of circuit substrate 10, afterwards turn over circuit substrate 10, after also passing through the operation of printing-ink, laminating Copper Foil, pressing machine is finally adopted to carry out one step press.
At circuit substrate 10 both sides pressing the first alkali developable resin layer 31, 3rd copper foil layer 13, after second alkali developable resin layer 32 and the 4th copper foil layer 14, laser drilling process can be carried out, chemical-copper-plating process and copper plating process, to form, between the 3rd copper foil layer 13 and the first conductive circuit layer 110, the first blind via hole 102 conducted, form, between the 4th copper foil layer 14 and the second conductive circuit layer 120, the second blind via hole 103 conducted, so that the 4th copper foil layer 14, second conductive circuit layer 120, first conductive circuit layer 110 and the 3rd copper foil layer 13 realize conducting, as shown in Figure 6.
4th step, see also Fig. 6 and Fig. 7,3rd copper foil layer 13 is formed the first opening 131 corresponding to the first exposed region 112, first opening 131 exposes the first alkali developable resin layer 31 corresponding to the first exposed region 112, and exposes the first alkali developable resin layer 31 exposed from the first opening 131.
3rd copper foil layer 13 forms the first opening 131 simultaneously or after, also described 3rd copper foil layer 13 is made the 3rd conductive circuit layer 130, the 4th copper foil layer 14 is made the 4th conductive circuit layer 140. Described 3rd conductive circuit layer 130 and the 4th conductive circuit layer 140 all include a plurality of conducting wire and multiple conductive junction point. So, four laminar substrate 10a can be obtained.
It is to say, the conducting wire of the 3rd conductive circuit layer 130, conductive junction point can etch formation with the first opening 131 simultaneously, it is also possible to step-etching is formed. In other words, in this step, an image transfer can be passed through and be etched selectively to the 3rd copper foil layer 13 the 3rd copper foil layer 13 to be made the 3rd conductive circuit layer 130 with the first opening 131, then expose the first alkali developable resin layer 31 exposed from the first opening 131; First time image transfer can also be passed through and be etched selectively to the material of the 3rd copper foil layer 13 removing the first opening 131 place, to form the first opening 131, then the first alkali developable resin layer 31 exposed from the first opening 131 is exposed, again through second time image transfer and be etched selectively to and remove the material of the 3rd copper foil layer 13 corresponding to the first pressing district 111, thus forming the conducting wire of the 3rd conductive circuit layer 130, conductive junction point. The conducting wire of the 4th conductive circuit layer 140, conductive junction point can concurrently form with the conducting wire of the 3rd conductive circuit layer 130, conductive junction point.
5th step, refers to Fig. 8, dissolves with alkaline-based developer and removes the first alkali developable resin layer 31 after this part is exposed, thus forming the first groove 41. Described first welding resisting layer 21 is exposed in the first groove 41. Pad 114 in first exposed region 112 of the first conductive circuit layer 110 exposed from the first welding resisting layer 21 is also exposed in the first groove 41. Described alkaline-based developer can be the NaOH solution of PH > 13 or for the KOH solution of PH > 13.
Before dissolve the first alkali developable resin layer 31 after being exposed with alkaline-based developer, or after forming the 3rd conductive circuit layer 130, or after forming the first groove 41, can at the 3rd conductive circuit layer 130 surface configuration the second welding resisting layer 22, at the 4th conductive circuit layer 140 surface configuration the 3rd welding resisting layer 23. So, four-layer circuit board 10b can be obtained.
Preferably, the second welding resisting layer the 22, the 3rd welding resisting layer 23 can be previously formed at the first alkali developable resin layer 31 being exposed with alkaline-based developer dissolving removal.
As shown in Figure 8, it includes the 4th conductive circuit layer the 140, second alkali developable resin layer 32 of pressing successively, circuit substrate the 10, first alkali developable resin layer 31 and the 3rd conductive circuit layer 130 to the four-layer circuit board 10b that above step according to first embodiment prepares. Described circuit substrate 10 includes the second conductive circuit layer 120, substrate 100 and the first conductive circuit layer 110 fitted successively. Described first to fourth conductive circuit layer 110 to 140 is conducted by first via the 101, first blind via hole 102 and the second blind via hole 103. Described four-layer circuit board 10b has the first groove 41 running through the 3rd conductive circuit layer 130 and the first alkali developable resin layer 31, is exposed in the first groove 41 so that being arranged in the first welding resisting layer 21 of the first exposed region 112 of the first conductive circuit layer 110 and the first exposed region 112 pad 114 exposed from the first welding resisting layer 21. Described first groove 41 may be used for holding electronic components and parts so that electronic devices and components are installed in the first exposed region 112 on the pad 114 exposed from the first welding resisting layer 21, so that electronic devices and components are not take up space outerpace.
The step that it will be understood by those skilled in the art that in the method making multilayer circuit board of first embodiment is not essential features. Such as, in the third step, can only pressing the first alkali developable resin layer 31 and the 3rd copper foil layer 13 on the downside of circuit substrate 10, and time different on the upside of circuit substrate 10 pressing the second alkali developable resin layer 32 and the 4th copper foil layer 14, so, after subsequent step, it is possible to make three layer circuit boards with a groove.
Except making three layer circuit boards or the four-layer circuit board with a groove, the technical program can make the multilayer circuit board of any number of plies with any amount groove. Hereinafter, there is the 8-layer printed circuit board of two grooves illustrate making.
The manufacture method of the multilayer circuit board that the technical program the second embodiment provides, including step:
The first step, refers to Fig. 7, it is provided that by the first embodiment first step to the 4th rapid four laminar substrate 10a prepared step by step.
As it was previously stated, four laminar substrate 10a include from top to bottom the 4th conductive circuit layer the 140, second alkali developable resin layer the 32, second conductive circuit layer 120 of pressing successively, substrate the 100, first conductive circuit layer the 110, first alkali developable resin layer 31 and the 3rd conductive circuit layer 130.
Second step, sees also Fig. 9 and Figure 10, and in described four laminar substrate 10a, definition the 4th conductive circuit layer 140 includes the second pressing district 141 and the second exposed region 142, and arranges the second welding resisting layer 24 on the second exposed region 142.
In the present embodiment, described second exposed region 142 is also rectangle, and described second pressing district 141 surrounds and surround the second exposed region 142. Second exposed region 142 includes a plurality of circuit 143 and multiple pad 144. Second welding resisting layer 24 covers a plurality of circuit 143 of the second exposed region 142, and covers the surface of the second alkali developable resin layer 32 exposed from the second exposed region 142, exposes multiple pads 144 of the second exposed region 142 simultaneously.
3rd step, refers to Figure 11, pressing the 3rd alkali developable resin layer 33 and the 5th copper foil layer 15 on the downside of four laminar substrate 10a, simultaneously pressing the 4th alkali developable resin layer 34 and the 6th copper foil layer 16 on the upside of circuit substrate 10. that is, the 3rd alkali developable resin layer 33 is placed on the 3rd conductive circuit layer 130 surface and the first alkali developable resin layer 31 surface exposed from the first opening 131, the 5th copper foil layer 15 is placed on the 3rd alkali developable resin layer 33 surface, place the 4th alkali developable resin floor 34 on the second surface, pressing district 141 of the 4th conductive circuit layer 140 and the second welding resisting layer 24 surface simultaneously, the 6th copper foil layer 16 is placed on the 4th alkali developable resin layer 34 surface, and adopt pressing machine disposable pressing the 6th copper foil layer 16, 4th alkali developable resin layer 34, four laminar substrate 10a, 3rd alkali developable resin layer 33 and the 5th copper foil layer 15.
Can by realizing with the 3rd akin method of step in first embodiment at four laminar substrate 10a both sides pressing the 3rd alkali developable resin layer the 33, the 5th copper foil layer the 15, the 4th alkali developable resin layers 34 and the 6th copper foil layer 16. at four laminar substrate 10a both sides pressing the 3rd alkali developable resin layers 33, 5th copper foil layer 15, after 4th alkali developable resin layer 34 and the 6th copper foil layer 16, laser drilling process can be carried out, chemical-copper-plating process and copper plating process, to form, between the 5th copper foil layer 15 and the 3rd conductive circuit layer 130, the 3rd blind via hole 104 conducted, form, between the 6th copper foil layer 16 and the 4th conductive circuit layer 140, the 4th blind via hole 105 conducted, so that the 6th copper foil layer 16, 5th copper foil layer 15, 4th conductive circuit layer 140, 3rd conductive circuit layer 130, second conductive circuit layer 120 and the first conductive circuit layer 110 realize conducting, as shown in figure 12.
4th step, refer to Figure 12,5th copper foil layer 15 is formed second opening 151 corresponding with the first opening 131,6th copper foil layer 16 is formed threeth opening 161 corresponding with the second exposed region 142, and exposes the 3rd alkali developable resin layer 33 exposed from the second opening 151 and the 4th alkali developable resin layer 34 exposed from the 3rd opening 161.
5th copper foil layer 15 forms the second opening 151 simultaneously or after, also described 5th copper foil layer 15 is made the 5th conductive circuit layer 150, the 6th copper foil layer 16 is made the 6th conductive circuit layer 160, thus forming six laminar substrate 10c. Described 5th conductive circuit layer 150 and the 6th conductive circuit layer 160 all include a plurality of conducting wire and multiple conductive junction point. It is said that in general, the conducting wire of the 5th conductive circuit layer the 150, the 6th conductive circuit layer 160, conductive junction point can concurrently form.
The conducting wire of the 5th conductive circuit layer the 150, the 6th conductive circuit layer 160, conductive junction point can etch formation with the second opening the 151, the 3rd opening 161 simultaneously, it is also possible to step-etching is formed. Illustrate for the 5th copper foil layer 15, in this step, an image transfer can be passed through and be etched selectively to the 5th copper foil layer 15 the 5th copper foil layer 15 to be made the 5th conductive circuit layer 150 with the second opening 151, then expose the 3rd alkali developable resin layer 33 exposed from the second opening 151; First time image transfer can also be passed through and be etched selectively to the material of the 5th copper foil layer 15 removing the second opening 151 place, to form the second opening 151, then the 3rd alkali developable resin layer 33 exposed from the second opening 151 is exposed, again through second time image transfer and be etched selectively to and remove corresponding to the material of the 5th copper foil layer 15 except the second opening 151, thus forming the conducting wire of the 5th conductive circuit layer 150, conductive junction point.
5th step, refers to Figure 13, pressing the 5th alkali developable resin layer 35 and the 7th copper foil layer 17 on the downside of six laminar substrate 10c, simultaneously pressing hexabasic developable resin layer 36 and the 8th copper foil layer 18 on the upside of six laminar substrate 10c. that is, the 5th alkali developable resin layer 35 is placed on the 5th conductive circuit layer 150 surface and the 3rd alkali developable resin layer 33 surface exposed from the second opening 151, the 7th copper foil layer 17 is placed on the 5th alkali developable resin layer 35 surface, place hexabasic developable resin layer 36 on the 6th conductive circuit layer 160 surface and the 4th alkali developable resin layer 34 surface exposed from the 3rd opening 161 simultaneously, the 8th copper foil layer 18 is placed on hexabasic developable resin layer 36 surface, then pressing machine disposable pressing the 8th copper foil layer 18 is adopted, hexabasic developable resin layer 36, six laminar substrate 10c, 5th alkali developable resin layer 35 and the 7th copper foil layer 17.
Can by realizing with the 3rd akin method of step in first embodiment at six laminar substrate 10c both sides pressing the 5th alkali developable resin layer the 35, the 7th copper foil layers 17, hexabasic developable resin layer 36 and the 8th copper foil layer 18. in six laminar substrate 10c both sides, pressing the 5th alkali developable resin layer 35, 7th copper foil layer 17, after hexabasic developable resin layer 36 and the 8th copper foil layer 18, laser drilling process can be carried out, chemical-copper-plating process and copper plating process, to form, between the 7th copper foil layer 17 and the 5th conductive circuit layer 150, the 5th blind via hole 106 conducted, form, between the 8th copper foil layer 18 and the 6th conductive circuit layer 160, the 6th blind via hole 107 conducted, and in six laminar substrate 10c, form the second via 108, so that the 8th copper foil layer 18, 7th copper foil layer 17, 6th conductive circuit layer 160, 5th conductive circuit layer 150, 4th conductive circuit layer 140, 3rd conductive circuit layer 130, second conductive circuit layer 120 and the first conductive circuit layer 110 realize conducting, as shown in figure 14.
6th step, refer to Figure 14,7th copper foil layer 17 is formed fourth opening 171 corresponding with the second opening 151,8th copper foil layer 18 is formed fiveth opening 181 corresponding with the 3rd opening 161, and exposes the 5th alkali developable resin layer 35 exposed from the 4th opening 171 and the hexabasic developable resin layer 36 exposed from the 5th opening 181.
7th copper foil layer 17 forms the 4th opening 171 simultaneously or after, also described 7th copper foil layer 17 is made the 7th conductive circuit layer 170,8th copper foil layer 18 forms the 5th opening 181 simultaneously or after, also described 8th copper foil layer 18 is made the 8th conductive circuit layer 180. So, namely can be made into eight laminar substrate 10d. It is said that in general, the 4th opening 171 and the 5th opening 181 can concurrently form, the 7th conductive circuit layer 170 and the 8th conductive circuit layer 180 can concurrently form. The conducting wire of the 7th conductive circuit layer the 170, the 8th conductive circuit layer 180, conductive junction point can etch formation with the 4th opening the 171, the 5th opening 181 simultaneously, it is also possible to step-etching is formed. When step-etching is formed, the step of exposure can after forming the 4th opening 171 and the 5th opening 181, carry out before forming the 7th conductive circuit layer the 170, the 8th conductive circuit layer 180, it is also possible to is carrying out after forming the 7th conductive circuit layer the 170, the 8th conductive circuit layer 180.
7th step, see also Figure 14 and Figure 15, dissolve with alkaline-based developer and remove the 5th alkali developable resin layer the 35, the 3rd alkali developable resin layer the 33, first alkali developable resin layer 31 of exposed portion, hexabasic developable resin layer 36 and the 4th alkali developable resin layer 34, thus forming the first groove 42 and the second groove 43. Can pass through to be placed in alkaline-based developer certain time by eight laminar substrate 10d leachings, or alkaline-based developer be sprayed in eight laminar substrate 10d both sides, so that alkaline-based developer dissolves the alkali developable resin layer removing exposed portion.
Specifically, the 5th alkali developable resin layer 35 being exposed exposes from the 4th opening 171, can be dissolved by alkaline-based developer and remove, after the 5th alkali developable resin layer 35 of exposed portion is dissolved removal, the 3rd alkali developable resin layer 33 exposed from the second opening 151 will also contact thus being dissolved removal with alkaline-based developer, same the first alkali developable resin layer 31 exposed from the first opening 131 also will contact thus being dissolved removal with alkaline-based developer afterwards, so, then can be formed and run through the 7th conductive circuit layer 170, 5th alkali developable resin layer 35, 5th conductive circuit layer 150, 3rd alkali developable resin layer 33, first groove 42 of the 3rd conductive circuit layer 130 and the first alkali developable resin layer 31. described first welding resisting layer 21 is exposed in the first groove 42. similar, hexabasic developable resin layer 36 after the exposure that the 5th opening 181 exposes can be dissolved by alkaline-based developer to be removed, after the hexabasic developable resin layer 36 of exposed portion is dissolved removal, the 4th alkali developable resin layer 34 exposed from the 3rd opening 161 will contact thus being dissolved removal with alkaline-based developer, so, then the second groove 43 running through the 8th conductive circuit layer 180, hexabasic developable resin layer the 36, the 6th conductive circuit layer 160 and the 4th alkali developable resin layer 34 can be formed. described second welding resisting layer 24 is exposed in the second groove 43. described alkaline-based developer can be the KOH solution of NaOH solution or the PH of PH > 13 > 13.
Before dissolving, with alkaline-based developer, the alkali developable resin layer being exposed, or after forming the 7th conductive circuit layer the 170, the 8th conductive circuit layer 180, or after forming first groove the 42, second groove 43, can at the 7th conductive circuit layer 170 surface configuration the 3rd welding resisting layer 25, at the 8th conductive circuit layer 180 surface configuration the 4th welding resisting layer 26. So, 8-layer printed circuit board 10e can be obtained. Preferably, the 3rd welding resisting layer the 25, the 4th welding resisting layer 26 can be previously formed at the alkali developable resin layer being exposed with alkaline-based developer dissolving.
As shown in figure 15, it includes the 8th conductive circuit layer 180 of pressing successively, hexabasic developable resin layer the 36, the 6th conductive circuit layer the 160, the 4th alkali developable resin layer the 34, the 4th conductive circuit layer the 140, second alkali developable resin layer 32, circuit substrate the 10, first alkali developable resin layer the 31, the 3rd conductive circuit layer the 130, the 3rd alkali developable resin layer the 33, the 5th conductive circuit layer the 150, the 5th alkali developable resin layer 35 and the 7th conductive circuit layer 170 to the 8-layer printed circuit board 10e that above step according to the second embodiment prepares. Described circuit substrate 10 includes the second conductive circuit layer 120, substrate 100 and the first conductive circuit layer 110 fitted successively. Described first to the 8th conductive circuit layer 110 to 180 realizes conducting by the first via the 101, first to the 6th the 6th blind via hole 102 to 107. Described 8-layer printed circuit board 10e has the first groove 42 running through the 7th conductive circuit layer the 170, the 5th alkali developable resin layer the 35, the 5th conductive circuit layer the 150, the 3rd alkali developable resin layer the 33, the 3rd conductive circuit layer 130 and the first alkali developable resin layer 31, so that the first welding resisting layer 21 and the pad 114 that exposes from the first welding resisting layer 21 are exposed in the first groove 42. Described 8-layer printed circuit board 10e also has the second groove 43 running through the 8th conductive circuit layer 180, hexabasic developable resin layer the 36, the 6th conductive circuit layer 160 and the 4th alkali developable resin layer 34, so that the second welding resisting layer 24 and the pad 144 that exposes from the second welding resisting layer 24 are exposed in the second groove 43. Described first groove 42 and the second groove 43 may be incorporated for holding electronic components and parts, make electronic devices and components can be installed in the first exposed region 112 on the pad 114 exposed from the first welding resisting layer 21, can also be installed in the second exposed region 142 on the pad 144 exposed from the second welding resisting layer 24, so that electronic devices and components are not take up space outerpace.
It will be understood by those skilled in the art that the deformation of the above step using the technical program can make the multilayer circuit board of other numbers of plies of the groove with other quantity. such as, the 6-layer circuit board with two grooves can be made by the step of the first step of the second embodiment to the 4th step and development. namely, if dissolve the six laminar substrate 10c removed in Figure 12 with alkaline-based developer, then can obtain the 6-layer circuit board of the groove with two different depths, one of them groove runs through the 6th conductive circuit layer 160 and the 4th alkali developable resin layer 34, and another groove runs through the 5th conductive circuit layer the 150, the 3rd alkali developable resin layer the 33, the 3rd conductive circuit layer 130 and the first alkali developable resin layer 31. again such as, in the above step of the second embodiment, if only at downside addition the first alkali developable resin layer 31 of circuit substrate 10, 3rd copper foil layer 13, 3rd alkali developable resin layer 33, 5th copper foil layer 15, 5th alkali developable resin layer 35 and the 7th copper foil layer 17, and not at upside addition the second alkali developable resin layer 32 of circuit substrate 10, 4th copper foil layer 14, 4th alkali developable resin layer 34, 6th copper foil layer 16, hexabasic developable resin layer 36 and the 8th copper foil layer 18, then by making opening, exposure, after making the step of conductive circuit layer and development, five layer circuit boards with a groove can be made, this groove runs through the 7th conductive circuit layer 170, 5th alkali developable resin layer 35, 5th conductive circuit layer 150, 3rd alkali developable resin layer 33, 3rd conductive circuit layer 130 and the first alkali developable resin layer 31. again such as, if only at downside addition the first alkali developable resin layer the 31, the 3rd copper foil layer the 13, the 3rd alkali developable resin layer the 33, the 5th copper foil layer 15 of circuit substrate 10, and other any layers of not addition, then by after the step of making opening, exposure, making conductive circuit layer and development, can making a four-layer circuit board with a groove, this groove runs through the 5th conductive circuit layer the 150, the 3rd alkali developable resin layer the 33, the 3rd conductive circuit layer 130 and the first alkali developable resin layer 31. it is, of course, also possible to made the multilayer circuit board of other numbers of plies with other structures by the deformation of the step of above example.
It will be understood by those skilled in the art that multilayer circuit board that the technical program produces is it is believed that include being pressed on circuit substrate 10 together and solderless substrate. Described circuit substrate 10 includes the first conductive circuit layer 110, and the exposed region 112 of the first conductive circuit layer 110 is provided with welding resisting layer. The number of plies of described solderless substrate is depending on the number of times of pressing, including the conductive circuit layer of the alkali developable resin layer of the multilayer grooved being pressed on together and multilamellar opening. Such as, the alkali developable resin layer of three layers fluting and the conductive circuit layer of three layers opening can be included, be positioned at solderless substrate on the downside of circuit substrate 10, that be made up of the 7th conductive circuit layer the 170, the 5th alkali developable resin layer the 35, the 5th conductive circuit layer the 150, the 3rd alkali developable resin layer the 33, the 3rd conductive circuit layer 130 and the first alkali developable resin layer 31 as shown in figure 15. The alkali developable resin layer of described multilayer grooved and the conductive circuit layer of multilamellar opening are alternately arranged, only have the conductive circuit layer of one layer of opening between every adjacent two layers alkali developable resin layer. Described solderless substrate has a groove, described groove runs through the alkali developable resin layer of every layer of fluting of solderless substrate and the conductive circuit layer of every layer of opening, the described welding resisting layer that described groove is arranged with exposed region 112 is corresponding, so that described welding resisting layer and the multiple pads 114 of exposed region 112 exposed from welding resisting layer are exposed in described groove, described groove is used for holding electronic components and parts.
In the process making multilayer circuit board of the technical program, by pressing alkali developable resin layer, the follow-up step that can pass through to develop makes formation groove easily, such then make whole processing technology all can pass through present stage comparatively ripe automatic flow and realize, eliminate the waste of human resources, and the precision making processing technology is higher, it is to avoid the error of artificial fluting and high scrappage.
It is understood that for the person of ordinary skill of the art, it is possible to conceive according to the technology of the present invention and make other various corresponding changes and deformation, and all these change and deform the protection domain that all should belong to the claims in the present invention.
Claims (15)
1. a manufacture method for multilayer circuit board, including step:
Thering is provided circuit substrate, described circuit substrate includes substrate and is fitted in the first copper foil layer of substrate surface;
First copper foil layer is made the first conductive circuit layer, and described first conductive circuit layer has the first exposed region and the first pressing district;
At described first exposed region, the first welding resisting layer is set;
The first conductive circuit layer side pressing the first alkali developable resin layer and the 3rd copper foil layer at circuit substrate, described first alkali developable resin floor and the first surface, pressing district and the first welding resisting layer surface contact, and described 3rd copper foil layer contacts with described first alkali developable resin layer;
3rd copper foil layer forms first opening corresponding with the first exposed region, to expose the first alkali developable resin layer corresponding to the first exposed region;
The first alkali developable resin layer that exposure exposes from the first opening; And
Dissolve the first alkali developable resin layer removing exposed portion with alkaline-based developer, thus forming a groove, described first welding resisting layer is exposed in described groove.
2. the manufacture method of multilayer circuit board as claimed in claim 1, it is characterised in that when forming first opening corresponding with the first exposed region in the 3rd copper foil layer, also the 3rd copper foil layer is made the 3rd conductive circuit layer.
3. the manufacture method of multilayer circuit board as claimed in claim 1, it is characterised in that after the first alkali developable resin layer that exposure exposes from the first opening, the 3rd copper foil layer is made the 3rd conductive circuit layer.
4. the manufacture method of multilayer circuit board as claimed in claim 2 or claim 3, it is characterised in that before dissolve the first alkali developable resin layer removing exposed portion with alkaline-based developer, at the 3rd conductive circuit layer surface configuration the second welding resisting layer.
5. the manufacture method of multilayer circuit board as claimed in claim 1, it is characterised in that described alkaline-based developer is the pH value NaOH solution more than 13, or is the pH value KOH solution more than 13.
6. the manufacture method of multilayer circuit board as claimed in claim 1, it is characterised in that first conductive circuit layer side pressing the first alkali developable resin layer and the 3rd copper foil layer at circuit substrate include step:
Circuit substrate first conductive circuit layer side laminating alkali-developable photoresist dry film as described first alkali developable resin layer;
Photoresist dry film is fitted described 3rd copper foil layer; And
Adopt pressing machine one step press circuit substrate, photoresist dry film and the 3rd copper foil layer.
7. the manufacture method of multilayer circuit board as claimed in claim 1, it is characterised in that first conductive circuit layer side pressing the first alkali developable resin layer and the 3rd copper foil layer at circuit substrate include step:
The ink layer of alkali-developable is printed as described first alkali developable resin layer in the first conductive circuit layer side of circuit substrate;
The ink layer of printing is fitted described 3rd copper foil layer; And
Pressing machine is adopted to carry out one step press circuit substrate, ink layer and the 3rd copper foil layer.
8. the manufacture method of multilayer circuit board as claimed in claim 1, it is characterised in that described circuit substrate also includes the second copper foil layer, and described substrate is fitted between the first copper foil layer and the second copper foil layer; When the first copper foil layer is made the first conductive circuit layer, also the second copper foil layer is made the second conductive circuit layer; When first conductive circuit layer side pressing the first alkali developable resin layer and three copper foil layers of circuit substrate, also at the second conductive circuit layer side pressing the second alkaline development resin bed and the 4th copper foil layer of circuit substrate, described second alkali developable resin layer and the second conductive circuit layer surface contact, and described 4th copper foil layer and the second alkali developable resin layer contact; Forming the first opening while or after the first alkali developable resin layer that exposure exposes from the first opening, also the 3rd copper foil layer is made the 3rd conductive circuit layer, also the 4th copper foil layer is made the 4th conductive circuit layer simultaneously; Before dissolve the first alkali developable resin layer removing exposed portion with alkaline-based developer, at the 3rd conductive circuit layer surface configuration the second welding resisting layer, at the 4th conductive circuit layer surface configuration the 3rd welding resisting layer.
9. a manufacture method for multilayer circuit board, including step:
Thering is provided circuit substrate, described circuit substrate includes substrate and is fitted in the first copper foil layer of substrate surface;
First copper foil layer is made the first conductive circuit layer, and described first conductive circuit layer has the first exposed region and the first pressing district;
At described first exposed region, the first welding resisting layer is set;
The first conductive circuit layer side pressing the first alkali developable resin layer and the 3rd copper foil layer at circuit substrate, described first alkali developable resin floor and the first surface, pressing district and the first welding resisting layer surface contact, and described 3rd copper foil layer contacts with described first alkali developable resin layer;
3rd copper foil layer forms the first opening corresponding to the first exposed region, to expose the first alkali developable resin layer corresponding to the first exposed region;
The first alkali developable resin layer that exposure exposes from the first opening;
The 3rd copper foil layer side pressing the 3rd alkali developable resin layer and the 5th copper foil layer at circuit substrate, described 3rd alkali developable resin layer and described 3rd copper foil layer and the first alkali developable resin layer exposed from the first opening contact, and described 5th copper foil layer and the 3rd alkali developable resin layer contact;
5th copper foil layer is formed second opening corresponding with the first opening;
The 3rd alkali developable resin layer that exposure exposes from the second opening; And
Dissolve the 3rd alkali developable resin layer and the first alkali developable resin layer of removing exposed portion with alkaline-based developer, thus forming a groove, described first welding resisting layer is exposed in described groove.
10. the manufacture method of multilayer circuit board as claimed in claim 9, it is characterised in that described circuit substrate also includes the second copper foil layer, and described substrate is fitted between the first copper foil layer and the second copper foil layer; When the first copper foil layer is made the first conductive circuit layer, also the second copper foil layer is made the second conductive circuit layer; When first conductive circuit layer side pressing the first alkali developable resin layer and three copper foil layers of circuit substrate, also at the second conductive circuit layer side pressing the second alkaline development resin bed and the 4th copper foil layer of circuit substrate, described second alkali developable resin layer and the second conductive circuit layer surface contact, and described 4th copper foil layer and the second alkali developable resin layer contact; Forming the first opening while or after the first alkali developable resin layer that exposure exposes from the first opening, also the 3rd copper foil layer is made the 3rd conductive circuit layer, also the 4th copper foil layer is made the 4th conductive circuit layer simultaneously; When the 3rd copper foil layer side pressing the 3rd alkali developable resin layer and five copper foil layers of circuit substrate, also at the 4th conductive circuit layer side pressing the 4th alkaline development resin bed and the 6th copper foil layer of circuit substrate, described 4th alkali developable resin layer and the 4th conductive circuit layer surface contact, and described 6th copper foil layer and the 4th alkali developable resin layer contact; Forming the second opening while or after the 3rd alkali developable resin layer that exposure exposes from the second opening, also the 5th copper foil layer is made the 5th conductive circuit layer, also the 6th copper foil layer is made the 6th conductive circuit layer simultaneously; Before dissolve the 3rd alkali developable resin layer and the first alkali developable resin layer of removing exposed portion with alkaline-based developer, at the 5th conductive circuit layer surface configuration the second welding resisting layer, at the 6th conductive circuit layer surface configuration the 3rd welding resisting layer.
11. a manufacture method for multilayer circuit board, including step:
Thering is provided circuit substrate, described circuit substrate includes substrate and is fitted in the first copper foil layer of substrate surface;
First copper foil layer is made the first conductive circuit layer, and described first conductive circuit layer has the first exposed region and the first pressing district;
At described first exposed region, the first welding resisting layer is set;
The first conductive circuit layer side pressing the first alkali developable resin layer and the 3rd copper foil layer at circuit substrate, described first alkali developable resin floor and the first surface, pressing district and the first welding resisting layer surface contact, and described 3rd copper foil layer contacts with described first alkali developable resin layer;
3rd copper foil layer forms the first opening corresponding to the first exposed region, to expose the first alkali developable resin layer corresponding to the first exposed region;
The first alkali developable resin layer that exposure exposes from the first opening;
The 3rd copper foil layer side pressing the 3rd alkali developable resin layer and the 5th copper foil layer at circuit substrate, described 3rd alkali developable resin layer and described 3rd copper foil layer and the first alkali developable resin layer exposed from the first opening contact, and described 5th copper foil layer and the 3rd alkali developable resin layer contact;
5th copper foil layer is formed second opening corresponding with the first opening;
The 3rd alkali developable resin layer that exposure exposes from the second opening;
The 5th copper foil layer side pressing the 5th alkali developable resin layer and the 7th copper foil layer at circuit substrate, described 5th alkali developable resin layer and described 5th copper foil layer and the 3rd alkali developable resin layer exposed from the second opening contact, and described 7th copper foil layer and the 5th alkali developable resin layer contact;
7th copper foil layer is formed fourth opening corresponding with the second opening;
The 5th alkali developable resin layer that exposure exposes from the 4th opening; And
Dissolving with alkaline-based developer and remove the 5th alkali developable resin layer of exposed portion, the 3rd alkali developable resin layer and the first alkali developable resin layer, thus forming a groove, described first welding resisting layer is exposed in described groove.
12. the manufacture method of multilayer circuit board as claimed in claim 11, it is characterised in that described circuit substrate also includes the second copper foil layer, and described substrate is fitted between the first copper foil layer and the second copper foil layer; When the first copper foil layer is made the first conductive circuit layer, also the second copper foil layer is made the second conductive circuit layer; When first conductive circuit layer side pressing the first alkali developable resin layer and three copper foil layers of circuit substrate, also at the second conductive circuit layer side pressing the second alkaline development resin bed and the 4th copper foil layer of circuit substrate, described second alkali developable resin layer and the second conductive circuit layer surface contact, and described 4th copper foil layer and the second alkali developable resin layer contact; Forming the first opening while or after the first alkali developable resin layer that exposure exposes from the first opening, also the 3rd copper foil layer is made the 3rd conductive circuit layer, also the 4th copper foil layer is made the 4th conductive circuit layer simultaneously; When the 3rd copper foil layer side pressing the 3rd alkali developable resin layer and five copper foil layers of circuit substrate, also at the 4th conductive circuit layer side pressing the 4th alkaline development resin bed and the 6th copper foil layer of circuit substrate, described 4th alkali developable resin layer and the 4th conductive circuit layer surface contact, and described 6th copper foil layer and the 4th alkali developable resin layer contact; Forming the second opening while or after the 3rd alkali developable resin layer that exposure exposes from the second opening, also the 5th copper foil layer is made the 5th conductive circuit layer, also the 6th copper foil layer is made the 6th conductive circuit layer simultaneously; When the 5th copper foil layer side pressing the 5th alkali developable resin layer and seven copper foil layers of circuit substrate, also at the 6th pressing of conductive circuit layer side hexabasic developable resin layer and the 8th copper foil layer of circuit substrate, described hexabasic developable resin layer and the 6th conductive circuit layer surface contact, and described 8th copper foil layer and hexabasic developable resin layer contact; Forming the 4th opening while or after the 5th alkali developable resin layer that exposure exposes from the 4th opening, also the 7th copper foil layer is made the 7th conductive circuit layer, also the 8th copper foil layer is made the 8th conductive circuit layer simultaneously; Before dissolve removal the 5th alkali developable resin layer of exposed portion, the 3rd alkali developable resin layer and the first alkali developable resin layer with alkaline-based developer, at the 7th conductive circuit layer surface configuration the second welding resisting layer, at the 8th conductive circuit layer surface configuration the 3rd welding resisting layer.
13. a multilayer circuit board, made by manufacture method as claimed in claim 1 and formed, described multilayer circuit board includes the circuit substrate of pressing successively, first alkali developable resin layer and the 3rd conductive circuit layer, described circuit substrate includes substrate and is fitted in the first conductive circuit layer of substrate surface, described first conductive circuit layer has exposed region and pressing district, described exposed region is provided with the first welding resisting layer, described multilayer circuit board has the groove corresponding with exposed region, described groove runs through the 3rd conductive circuit layer and the first alkali developable resin layer, described first welding resisting layer is exposed in described groove.
14. multilayer circuit board as claimed in claim 13, it is characterized in that, described exposed region includes a plurality of circuit and multiple pad, the plurality of pad exposes thus being also exposed in groove from the first welding resisting layer, described groove is used for holding electronic components and parts, described multilayer circuit board also includes the second alkali developable resin layer, 4th conductive circuit layer, second welding resisting layer and the 3rd welding resisting layer, described circuit substrate also includes the second conductive circuit layer, described substrate is fitted between the first conductive circuit layer and the second conductive circuit layer, described second alkali developable resin layer is pressed between the 4th conductive circuit layer and the second conductive circuit layer, described second welding resisting layer is arranged at the 3rd conductive circuit layer surface, described 3rd welding resisting layer is arranged at the 4th conductive circuit layer surface.
15. a multilayer circuit board, including the circuit substrate being pressed on together and solderless substrate, described circuit substrate includes substrate and is fitted in the first conductive circuit layer of substrate surface, described first conductive circuit layer has exposed region and pressing district, described exposed region surface configuration has welding resisting layer, and multiple pads of exposed region expose from described welding resisting layer, described solderless substrate includes the conductive circuit layer of alkali developable resin layer and the multilamellar opening being pressed on multilayer grooved together, the alkali developable resin layer of described multilayer grooved and the conductive circuit layer of multilamellar opening are alternately arranged, the conductive circuit layer of one layer of opening is only had between the alkali developable resin layer of every adjacent two layers fluting, described solderless substrate has a groove, described groove runs through the alkali developable resin layer of every layer of fluting of solderless substrate and the conductive circuit layer of every layer of opening, described groove is corresponding with described welding resisting layer, so that described welding resisting layer and the multiple pads being arranged in described exposed region exposed from welding resisting layer are exposed to described groove, described groove is used for holding electronic components and parts.
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| CN201210127474.3A CN103379749B (en) | 2012-04-27 | 2012-04-27 | Multilayer circuit board and preparation method thereof |
| TW101115804A TWI442861B (en) | 2012-04-27 | 2012-05-03 | Multilayer printed circuit board and method for manufacturing same |
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| CN110545637B (en) * | 2018-05-29 | 2021-08-24 | 鹏鼎控股(深圳)股份有限公司 | Circuit board and manufacturing method thereof |
| CN110545635B (en) * | 2018-05-29 | 2021-09-14 | 鹏鼎控股(深圳)股份有限公司 | Method for manufacturing multilayer circuit board |
| CN110876238B (en) * | 2018-09-03 | 2022-03-01 | 捷普电子(广州)有限公司 | Circuit board and its manufacturing method, and assembly of circuit board and electronic element and its assembling method |
| CN111132442B (en) * | 2018-10-31 | 2021-05-04 | 先丰通讯股份有限公司 | Channel type circuit board |
| CN111935909B (en) * | 2020-07-31 | 2021-12-17 | 上海安费诺永亿通讯电子有限公司 | Recyclable electronic circuit with paper substrate and preparation method and recycling method thereof |
| CN118647130A (en) * | 2021-06-30 | 2024-09-13 | 荣耀终端有限公司 | Terminal equipment |
| CN215935150U (en) * | 2021-06-30 | 2022-03-01 | 荣耀终端有限公司 | Terminal device |
Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH1022645A (en) * | 1996-07-08 | 1998-01-23 | Nippon Avionics Co Ltd | Manufacture of printed wiring board with cavity |
| KR20020022477A (en) * | 2000-09-20 | 2002-03-27 | 정해원 | Manufacturing method for build-up multi layer printed circuit board using physical vapor deposition |
| CN101872124A (en) * | 2009-04-27 | 2010-10-27 | 日东电工株式会社 | Photosensitive polymer combination, use the method for making of its flexible circuit board and this circuit substrate |
-
2012
- 2012-04-27 CN CN201210127474.3A patent/CN103379749B/en active Active
- 2012-05-03 TW TW101115804A patent/TWI442861B/en active
Patent Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH1022645A (en) * | 1996-07-08 | 1998-01-23 | Nippon Avionics Co Ltd | Manufacture of printed wiring board with cavity |
| KR20020022477A (en) * | 2000-09-20 | 2002-03-27 | 정해원 | Manufacturing method for build-up multi layer printed circuit board using physical vapor deposition |
| CN101872124A (en) * | 2009-04-27 | 2010-10-27 | 日东电工株式会社 | Photosensitive polymer combination, use the method for making of its flexible circuit board and this circuit substrate |
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Address after: Guangdong city of Shenzhen province Baoan District Songgang street Chuanyan Luo Lu Yan Co-patentee after: Peng Ding Polytron Technologies Inc Patentee after: Peng Ding Holdings (Shenzhen) Limited by Share Ltd Address before: 518000 Guangdong city of Shenzhen province Baoan District Songgang streets Yan Chuanyan Luzhen Luo Ding Technology Park plant A1 building to building A3 Co-patentee before: Peng Ding Polytron Technologies Inc Patentee before: Fuku Precision Components (Shenzhen) Co., Ltd. |
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| CP03 | Change of name, title or address |