CN103582325A - Circuit board and manufacturing method thereof - Google Patents
Circuit board and manufacturing method thereof Download PDFInfo
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- CN103582325A CN103582325A CN201210267133.6A CN201210267133A CN103582325A CN 103582325 A CN103582325 A CN 103582325A CN 201210267133 A CN201210267133 A CN 201210267133A CN 103582325 A CN103582325 A CN 103582325A
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Abstract
A circuit board comprises press fit substrates and an inner layer circuit substrate which are pressed together. The inner layer circuit substrate comprises an insulating layer and a conducting line layer adhering to the surface of the insulating layer, the conducting line layer is provided with an exposure area and a press fit area, the surface of the exposure area is provided with an anti-welding layer, and a plurality of connecting pads of the exposure area are exposed out of the anti-welding layer. Every press fit substrate comprises adhesion rubber pieces, press fit rubber pieces and conductive pattern layers, wherein the adhesion rubber pieces, the press fit rubber pieces and the conductive pattern layers are pressed together and provided with openings. The adhesion rubber pieces are formed on a press fit area of the inner layer circuit substrate and are in contact with the press fit rubber pieces, grooves penetrating through the press fit substrates are formed in a multi-layer circuit board and correspond to the exposure area so that the anti-welding layer and the connecting pads exposed out of the anti-welding layer are exposed in the grooves, and the grooves are used for accommodating electronic components. The invention further provides a manufacturing method of the circuit board.
Description
Technical field
The present invention relates to circuit board making field, relate in particular to a kind of circuit board with groove structure and preparation method thereof.
Background technology
Printed circuit board (PCB) is widely used because having packaging density advantages of higher.Application about circuit board refers to document Takahashi, A. Ooki, N. Nagai, A. Akahoshi, H. Mukoh, A. Wajima, M. Res. Lab, High density multilayer printed circuit board for HITAC M-880, IEEE Trans. on Components, Packaging, and Manufacturing Technology, 1992,15 (4): 418-425.
Due to the demand of electronics miniaturization, conventionally in circuit board, be provided with groove structure, this encapsulation groove is used for cooperatively interacting with the electronic component of other encapsulation or grafting, thereby reduces the occupied space of whole circuit board package.Yet, in prior art, make above-mentioned groove and in circuit board making process, need to form at the glue-line of circuit board corresponding opening and then carry out the steps such as pressing and circuit making.In film due to respective slot part, be formed with opening.In carrying out pressing process, easily cause between the bottom portion of groove of groove part and the conductive layer of pressing in conjunction with poor.Like this, in circuit manufacturing process, easily cause flowing into the conducting wire of bottom portion of groove due to the liquid medicine that outer field conductive layer breakage is, thereby cause bottom portion of groove conducting wire damaged.
Summary of the invention
Therefore, be necessary to provide a kind of making and method thereof of circuit board, described circuit board manufacturing method can effectively be protected the line pattern of inside grooves.
A kind of circuit board, comprise the solderless substrate and the internal layer circuit substrate that are pressed on together, internal layer circuit substrate comprises substrate and is fitted in the conducting wire layer of substrate surface, described conducting wire floor has exposed region and pressing district around being connected exposed region, described exposed region surface is provided with welding resisting layer, and a plurality of connection gaskets of exposed region expose from described welding resisting layer, solderless substrate comprises the adhesive sheet being pressed on together, pressing film and conductive pattern layer, described adhesive sheet is bonded between the pressing district and pressing film of internal layer circuit substrate, and form dielectric layer with this pressing film bonding bonding with it, in described circuit board, there is the groove that only runs through described solderless substrate, described groove is corresponding with described exposed region, so that the welding resisting layer on exposed region surface and described a plurality of connection gaskets of exposing from welding resisting layer are exposed in described groove, described groove is for holding electronic components and parts.
A kind of manufacture method of circuit board, comprise step: provide internal layer circuit substrate, described circuit substrate comprises insulating barrier and is formed at the first conducting wire layer of surface of insulating layer, and described the first conducting wire floor comprises the first exposed region and around the first pressing district that connects the first exposed region; The first exposed region at the first conducting wire layer arranges the first protection film; At first conducting wire layer one side riveted the first adhesive sheet of internal layer circuit substrate, described the first adhesive sheet has first opening corresponding with the first exposed region, and described the first protection film is positioned at the first opening; The first adhesive sheet one side at internal layer circuit substrate forms the first solderless substrate and obtains multilager base plate, described the first solderless substrate comprises at least one lamination rubber alloy sheet, at least one deck conductive pattern layer and described the first adhesive sheet, described at least one lamination rubber alloy sheet, one deck conductive pattern layer alternative arrangement at least, described the first adhesive sheet contacts with one deck pressing film in described the first solderless substrate, and forms the first dielectric layer with the pressing film bonding contacting with it; And near a side of the first solderless substrate, along the border of the first exposed region, cut the first solderless substrate at multilager base plate; to form, only run through the first annular otch the first solderless substrate and corresponding with the borderline phase of the first exposed region; removal by the first otch around this part first solderless substrate; and remove the first protection film, thereby form the groove corresponding with the first exposed region.
Compared with prior art, the manufacture method of the circuit board that the technical program provides, surperficial pressing at internal layer conducting wire layer has two films, and wherein a film offers the opening corresponding with internal layer conducting wire layer exposed region, and another is not provided with the opening corresponding with groove.Than the method that a film with corresponding opening is only set carries out pressing; when pressing; can ensure more gummosis flows between protection film and the Copper Foil of pressing; thereby the Copper Foil being positioned on the layer exposed region of internal layer conducting wire is combined closely with corresponding position internal layer circuit substrate; and; the thickness that can guarantee the dielectric layer that two films form can meet the demands, and follow-uply Copper Foil is made while forming conducting wire to thickness due to dielectric layer can not meet the demands and causes liquid medicine by the conducting wire corrosion of internal substrate preventing.
Accompanying drawing explanation
Fig. 1 is the generalized section of the internal substrate that provides of the technical program embodiment.
Fig. 2 is the vertical view of Fig. 1.
Fig. 3 is the upward view of Fig. 1.
Fig. 4 is that the first conducting wire layer one side of the internal layer circuit substrate of Fig. 1 forms the first welding resisting layer and the first protection film, and the second conducting wire layer forms the generalized section after the second welding resisting layer and the second protection film.
The first adhesive sheet that Fig. 5 the technical program provides and the generalized section of the first pressing film.
Fig. 6 is the internal substrate of Fig. 4 and the cutaway view of the first adhesive sheet and the first pressing film riveted postforming sheet structure.
Fig. 7 closes the 3rd adhesive sheet and the first Copper Foil in a side pressure of the laminate structure of Fig. 6, the cutaway view after opposite side pressing the second pressing film and the second Copper Foil.
Fig. 8 is that in Fig. 7, the first Copper Foil is made formation the first conductive pattern layer, and the second Copper Foil is made the cutaway view that forms the multilager base plate obtaining after the second conducting wire layer.
Fig. 9 forms the 3rd welding resisting layer on the first conductive pattern layer of Fig. 8, forms the cutaway view after the 4th welding resisting layer on the second conductive pattern layer.
Figure 10 is that the multilager base plate of Fig. 9 forms the cutaway view after the first otch and the second otch.
Figure 11 be in Figure 10 by the first otch around material be removed and form the first groove, by the second otch around material be removed the cutaway view of the multilayer circuit board that forms the second groove and obtain.
Main element symbol description
| |
100 |
| |
101 |
| The |
102 |
| The |
103 |
| The |
104 |
| The |
105 |
| Internal |
110 |
| |
110a |
| |
110b |
| The first |
110c |
| The second |
110d |
| The |
1100 |
| The first conducting |
111 |
| |
1101 |
| The first conducting |
1111 |
| The first connection gasket | 1112 |
| The first exposed |
1113 |
| The first pressing |
1114 |
| The second conducting |
112 |
| The second conducting |
1121 |
| The second connection gasket | 1122 |
| The second exposed |
1123 |
| The second pressing |
1124 |
| |
113 |
| The first |
114 |
| The |
115 |
| The second |
116 |
| The |
117 |
| The first |
130 |
| The first conductive |
131 |
| The second |
140 |
| The second conductive |
141 |
| The first |
150 |
| The second |
160 |
| The 3rd |
170 |
| The 4th |
180 |
| Conductive through |
190 |
| The first |
20 |
| The first opening | 21 |
| The |
22 |
| The second |
30 |
| The second opening | 31 |
| The |
32 |
| The |
41 |
| The |
42 |
| The first |
51 |
| The second |
52 |
Following embodiment further illustrates the present invention in connection with above-mentioned accompanying drawing.
Embodiment
The circuit board manufacturing method that the technical program provides comprises the steps:
The first step, sees also Fig. 1 to Fig. 3, and internal layer circuit substrate 110 is provided.
Internal layer circuit substrate 110 comprises substrate 113, the first conducting wire layer 111 and the second conducting wire layer 112.The first conducting wire layer 111 and the second conducting wire layer 112 are formed at respectively relative two surfaces of substrate 113.
The first conducting wire layer 111 comprises many first conducting wires 1111 and a plurality of the first connection gasket 1112.The mid portion zone definitions of the first conducting wire layer 111 is the first exposed region 1113, for making the bottom of the groove of the circuit board with groove structure.Beyond the first exposed region 1113 is the first pressing district 1114.The first pressing district 1114 is around connecting the first exposed region 1113.The shape of the groove of the circuit board that the shape of the first exposed region 1113 can be made is according to actual needs set.In the present embodiment, the shape of the first exposed region 1113 is roughly rectangle.The first conducting wire 1111 of the first connection gasket 1112 and part is arranged in the first exposed region 1113.The first connection gasket 1112 for be packaged in the groove of circuit board in electronic component be mutually electrically connected to, the first conducting wire 1111 in the first exposed region 1113 is for being mutually electrically connected to the first connection gasket 1112 and outer other the first conducting wire 1111 of the first exposed region 1113.Certainly, it will be appreciated by those skilled in the art that, in Fig. 2, only illustrate first connection gasket 1112 and minority the first conducting wire 1111 is illustrated, in fact in the first conducting wire layer 111, the quantity of the first conducting wire 1111 and the first connection gasket 1112, shape and distributing all do not limit.
The second conducting wire layer 112 comprises the second conducting wire 1121 and the second connection gasket 1122.The mid portion zone definitions of the second conducting wire layer 112 is the second exposed region 1123, for making the bottom of the groove of the circuit board with groove structure.Beyond the second exposed region 1123 is the second pressing district 1124.The shape of the groove of the circuit board that the shape of the second exposed region 1123 can be made is according to actual needs set.In the present embodiment, the shape of the second exposed region 1123 is roughly rectangle.The second conducting wire 1121 of the second connection gasket 1122 and part is arranged in the second exposed region 1123.The second connection gasket 1122 for be packaged in the groove of circuit board in electronic component be mutually electrically connected to, the second conducting wire 1121 in the second exposed region 1123 is for being mutually electrically connected to the second connection gasket 1122 and outer other the second conducting wire 1121 of the second exposed region 1123.Certainly, in the second exposed region 1123, also the second conducting wire 1121 can be set.
Be understandable that, internal layer circuit substrate 110 can be multi-layer sheet, also can double-sided PCB.In the present embodiment, internal layer circuit substrate 110 is double-sided PCB, i.e. substrate 113 is a layer insulating.In the interior making conductive hole of substrate 113 structure 1101 of internal layer circuit substrate 110, so that the first conducting wire layer 111 and the second conducting wire layer 112 are conducted mutually.When internal layer circuit substrate 110 is multilayer circuit board, substrate 113 can be for comprising at least dielectric layers and at least sandwich construction of one deck conducting wire layer.In described sandwich construction, between the layer of conducting wire, can mutually conduct by conductive hole.
In the present embodiment, also offer a plurality of the first registration holes 1100 in internal layer circuit substrate 110, the plurality of the first registration holes 1100 is for running through the through hole of internal layer circuit substrate 110.The first registration holes 1100 does not run through in the first exposed region 1113 and the second exposed region 1123.
Second step, sees also Fig. 4, and the surface of the first conducting wire 1111 in the first exposed region 1113 forms the first welding resisting layer 114, and to cover the first conducting wire 1111 in the first exposed region 1113, and the first connection gasket 1112 exposes from the first welding resisting layer 114.And protect film 115 at first of whole the first exposed region 1113 of the surface of the first welding resisting layer 114 and the first connection gasket 1112 formation covering.The surface of the second conducting wire 1121 in the second exposed region 1123 forms the second welding resisting layer 116, and to cover the second conducting wire 1121 in the second exposed region 1123, and the second connection gasket 1122 exposes from the second welding resisting layer 116.And protect film 117 at second of whole the second exposed region 1123 of the surface of the second welding resisting layer 116 and the second connection gasket 1122 formation covering.
In the present embodiment, the mode by silk screen printing anti-solder ink forms the first welding resisting layer 114 on the surface of the surface of the first conducting wire 1111 of the first exposed region 1113 correspondences and the substrate 113 of exposing by the first conducting wire layer 111.Surface in the surface of the second conducting wire 1121 of the second exposed region 1123 correspondences and the substrate 113 of exposing by the second conducting wire layer 112 forms the second welding resisting layer 116.The region corresponding with the first connection gasket 1112 at the first welding resisting layer 114 is formed with the first through hole 1141, and each first connection gasket 1112 is all exposed from the first through hole 1141 corresponding with it.The region corresponding with the second connection gasket 1122 at the second welding resisting layer 116 is formed with the second through hole 1161, and each second connection gasket 1122 is all exposed from the second through hole 1161 corresponding with it.
While not including the first conducting wire 1111 in the first exposed region 1113, can at the first exposed region 1113, not form the first welding resisting layer 114.While not including the second conducting wire 1121 in the second exposed region 1123, can at the second exposed region 1123, not form the second welding resisting layer 116.
In the present embodiment, in order to make the welding resisting layer forming can better protect conducting wire, the region of the covering of the first welding resisting layer 114 is greater than the first exposed region 1113, and the first welding resisting layer 114 also covers first exposed region 1113 part the first pressing district 1114 around.The region that the second welding resisting layer 116 covers is greater than the second exposed region 1123, and the second welding resisting layer 116 also covers second exposed region 1123 part the second pressing district 1124 around.
In the present embodiment, the mode of the surface printing fluid oil ink material by the first welding resisting layer 114 in the first exposed region 1113 correspondences and the first connection gasket 1112 forms the first protection film 115.The mode of the surface printing fluid oil ink material by the second welding resisting layer 116 in the second exposed region 1123 correspondences and the second connection gasket 1122 forms the second protection film 117.Described fluid oil ink material can be thermosetting peelable type ink, can be also developable ink.The fluid oil ink material adopting is after solidifying, and its maximum temperature that can bear should be greater than 200 degrees Celsius, can bear the pressure that pressure is 25 kilograms per square centimetres.And fluid oil ink material has good acid and alkali resistance and the corrosive nature of oxidant after solidifying.
When adopting thermosetting peelable type ink; can directly liquid ink material be printed in to surface and the second welding resisting layer 116 of the second exposed region 1123 correspondences and the surface of the second connection gasket 1122 of the first welding resisting layer 114 and first connection gasket 1112 of the first exposed region 1113 correspondences; and through heat treated, make liquid ink material solidify to form the first protection film 115 and the second protection film 117.Heat curing-type peelable type ink has the advantages that to be easy to divest, thereby can avoid damaging the first connection gasket 1112, the first welding resisting layer 114, the second connection gasket 1122 and the second welding resisting layer 116 in carrying out strip.The heat fixed type ink adopting can be the peelable release ink of LM-600 PSMS thermmohardening.
When adopting developable ink; can first will directly liquid ink material be printed in to surface and the second welding resisting layer 116 of the second exposed region 1123 correspondences and the surface of the second connection gasket 1122 of the first welding resisting layer 114 and first connection gasket 1112 of the first exposed region 1113 correspondences; then the liquid ink material forming is carried out to exposure imaging, thus the protection film 115 of first after being hardened and the second protection film 117.Developable ink material needs to adopt corresponding stripper solution to be removed after solidifying.The developable ink material adopting can be PR 2000SA photosensitive type ink.
Be understandable that, when the first exposed region 1113 does not form the first welding resisting layer 114, can directly on the surface of the first conducting wire layer 111, form the first protection film 115.When the second exposed region 1123 does not form the second welding resisting layer 116, can directly on the surface of the second conducting wire layer 112, form the second protection film 117.
In the present embodiment, shape and the size of the first protection film 115 are all identical with shape and the size of the first exposed region 1113.The shape of the second protection film 117 is all identical with shape and the size of the second exposed region 1123 with size.
In order to make to have between the second conducting wire layer 112 and the first conducting wire layer 111 and follow-up pressing glue-line thereon the good stronger pull-out capacity that can keep after pressing.After this step; can carry out roughening treatment to being formed with the second conducting wire layer 112 exposing after the first protection film 115 and the second protection film 117 and the first conducting wire layer 111 exposing, to increase the roughness on the second conducting wire layer 112 and the first conducting wire layer 111 surface.Described roughening treatment can adopt melanism or brown to process, the copper on the first conducting wire layer 111 surface that are about to the second conducting wire layer 112 and expose carries out oxidation processes, make part copper be oxidized to monovalence copper or cupric, make the second conducting wire layer 112 and the first conducting wire layer 111 surface coarsening.
The 3rd step, sees also Fig. 5, and the first adhesive sheet 20, the 3rd adhesive sheet 30 are provided.In the first adhesive sheet 20, offer in the first opening 21, the three adhesive sheets 30 corresponding with the first exposed region 1113 and offer second opening 31 corresponding with the second exposed region 1123.
In the present embodiment, the first adhesive sheet 20 and the 3rd adhesive sheet 30 are semi-solid preparation film.The shape of cross section of the first opening 21 is identical with the shape of the first exposed region 1113, and the area of the cross section of the first opening 21 is greater than the area of the first exposed region 1113.The shape of cross section of the second opening 31 is identical with the shape of the second exposed region 1123, and the area of the cross section of the second opening 31 is greater than the area of the second exposed region 1123.In the present embodiment, the shape of cross section of the first opening 21 is also rectangle, the length of the cross section of the first opening 21 is greater than the length of the first corresponding exposed region 1113, the width of the cross section of the first opening 21 is greater than the width of the first corresponding exposed region 1113, large 10 to 20 microns of the length of Length Ratio first exposed region 1113 of the cross section of the first opening 21, large 10 to 20 microns than the width of the first exposed region 1113 of the width of the cross section of the first opening 21.The shape of cross section of the second opening 31 is also rectangle, the length of the cross section of the second opening 31 is greater than the length of the second corresponding exposed region 1123, the width of the cross section of the second opening 31 is greater than the width of the second corresponding exposed region 1123, large 10 to 20 microns of the length of Length Ratio second exposed region 1123 of the cross section of the second opening 31, large 10 to 20 microns than the width of the second exposed region 1123 of the width of the cross section of the second opening 31.
In the present embodiment, offer a plurality of the second registration holes 22 in the first adhesive sheet 20, offer a plurality of the 3rd registration holes 32 in the 3rd adhesive sheet 30, each second registration holes 22 and each the 3rd registration holes 32 are all corresponding with first registration holes 1100.
The 4th step; refer to Fig. 6; contraposition stacking the first adhesive sheet 20, internal layer circuit substrate 110 and the 3rd adhesive sheet 30 successively; make the first protection film 115 be positioned at the first opening 21; the second protection film 117 is positioned at the second opening 31; and the first adhesive sheet 20, internal layer circuit substrate 110 and the 3rd adhesive sheet 30 described in riveted, obtain laminate structure 110a.
In this step, adopt riveting device at the first registration holes 1100, the second registration holes 22 and the interior rivet 101 that arranges of the 3rd registration holes 32 of correspondence, and under the effect of rivet 101 pressure, make rivet 101 the first adhesive sheet 20, internal layer circuit substrate 110 and the 3rd adhesive sheet 30 close contacts around.By riveted can guarantee the first adhesive sheet 20, the 3rd adhesive sheet 30 all with the accurate contraposition of internal layer circuit substrate 110, make the first protection film 115 be positioned at the first opening 21, the second protection films 117 and be positioned at the second opening 31.Preferably, the gap width between the edge of the first protection film 115 and the first opening 21 the first adhesive sheet 20 around about equally.The edge of the second protection film 117 and the gap width between the second opening 31 are about equally.
The 5th step, refers to Fig. 7, in the first adhesive sheet 20 1 sides of internal layer circuit substrate 110, forms the first solderless substrate 110c, in the 3rd adhesive sheet 30 1 sides of laminate structure 110a, forms the second solderless substrate 110d and obtains multilager base plate 110b.
Described the first solderless substrate 110c can comprise at least one lamination rubber alloy sheet, at least one deck conductive pattern layer and described the first adhesive sheet 20, described at least one lamination rubber alloy sheet, one deck conductive pattern layer alternative arrangement at least, described the first adhesive sheet 20 contacts with one deck pressing film in described the first solderless substrate, and forms the first dielectric layer 130 with the pressing film bonding contacting with it.
In the present embodiment, the first solderless substrate 110c of take only comprises that one deck pressing film and one deck conductive pattern layer also describe the specific practice of the 5th step as example.
First, the first Copper Foil 41, the second Copper Foil 42, the first pressing film 51 and the second pressing film 52 are provided, and stack gradually and pressing the first Copper Foil 41, the first pressing film 51, laminate structure 110a, the first Copper Foil 41 and the second pressing film 52, the first adhesive sheet 20 and first pressing film 51 common formation the first dielectric layer 130, the three adhesive sheets 30 and second pressing film 52 common formation the second dielectric layers 140.The material of the first pressing film 51 can be identical with the material of the first adhesive sheet 20, also can be not identical.When can adopting pressing, makes than the higher material of the first adhesive sheet 20 mobility by the first pressing film 51.The material of the second adhesive sheet 30 can be identical with the material of the second pressing film 52, also can be not identical.When can adopting pressing, makes than the 3rd year higher material of adhesive sheet 30 mobility by the second pressing film 52.The first pressing film 51 and the second pressing film 52 can be respectively smooth prepreg.In pressing process, the gummosis of the first pressing film 51 is filled in the space between the first protection film 115 and the first Copper Foil 41, and the gummosis of the second pressing film 52 is filled in the space between the second protection film 117 and the second Copper Foil 42.Thereby the first Copper Foil 41 and the second Copper Foil 42 can be combined closely with internal layer circuit substrate 110.And the thickness that can guarantee to be positioned at the first dielectric layer 130 that in the first pressing district 1114 of the first exposed region 1113 peripheries, the first adhesive sheet 20 and the first pressing film 51 form can meet the demands, be positioned at the 3rd adhesive sheet 30 in the second pressing district 1124 of the second exposed region 1123 peripheries and can meet the demands with the thickness of the second dielectric layer 140 of the second pressing film 52 formation.
Then, at the first Copper Foil 41 and interior formation the first conductive blind hole 131 of the first dielectric layer 130, at the second Copper Foil 42 and interior formation the second conductive blind hole 141 of the second dielectric layer 140, and formation runs through the conductive through hole 190 of the first Copper Foil 41, the first dielectric layer 130, internal layer circuit substrate 110, the second dielectric layer 140 and the second Copper Foil 42, and selective etch the first Copper Foil 41 forms the first conductive pattern layer 150, selective etch the second Copper Foil 42 forms the second conductive pattern layer 160, obtains multilager base plate 110b.
In this enforcement gift, forming the first conductive pattern 150 and the second conductive pattern 160 to front formation the first conductive blind hole 131 and conductive through hole 190.The formation of the first conductive blind hole 131 can be made in the following way: first perforate in the first Copper Foil 41 and the first dielectric layer 130, then the interior formation electric conducting material of the mode by chemical plating and plating in described hole obtains the first conductive blind hole 131.The first conducting wire layer 111 conducts mutually by the first conductive blind hole 131 and the first Copper Foil 41.The formation method of the second conductive blind hole 141 is identical with the formation method of the first conductive blind hole 131, and the second conducting wire layer 112 conducts mutually by the second conductive blind hole 141 and the second Copper Foil 42.
Conductive through hole 190 can be by first forming the through hole of the first Copper Foil 41, the first dielectric layer 130, internal layer circuit substrate 110, the second dielectric layer 140 and the second Copper Foil 42, and then in through hole, the mode of filled conductive material forms.
The first conductive pattern layer 150 and the second conductive pattern layer 160 all adopt image transfer technique and etch process to form.The first conductive pattern layer 150 conducts mutually by the first conductive blind hole 131 and the first conducting wire layer 111, and the first conductive pattern layer 150 conducts mutually by the second conductive blind hole 141 and the second conducting wire layer 112.In the present embodiment, the first conductive pattern layer 150 covers the first exposed region 1113, the second conductive pattern layers 160 and covers the second exposed region 1123.
After this, can also repeat the operation of above-mentioned the 6th step, to obtain the first more multi-layered solderless substrate 110c and the second solderless substrate 110d.
The 6th step, refers to Fig. 9, forms the 3rd welding resisting layer 170 on the first conductive pattern layer 150, forms the 4th welding resisting layer 180 on the second conductive pattern layer 160.
In this step, can adopt the mode of solder-mask printing ink to form the 3rd welding resisting layer 170 and the 4th welding resisting layer 180.The 3rd welding resisting layer 170 and the 4th welding resisting layer 180 be interior has respectively opening, and part the first conductive pattern 150 is exposed from the opening part of the first welding resisting layer 170, and part the second conductive pattern 160 exposes from the opening part of the second welding resisting layer 180.
The 7th step, see also Figure 10 and Figure 11, boundary line along the first exposed region 1113 and the first pressing district 1114, form the first otch 102 of annular, and by by the first otch 102 around the first solderless substrate 110c remove, form first groove 103 corresponding with the first exposed region 11131113.The first connection gasket 1112 that covers the first welding resisting layer 114 of the first exposed region 1113 and expose from the first welding resisting layer 114 is exposed to the first groove 103.Boundary line along the second exposed region 1123 and the second pressing district 1124; surface from described multilager base plate 110b forms the second otch 104 to the second protection film 117; and by by the second otch 104 around the second conductive pattern layer 160, the second dielectric layer 140 and the second protection film 117 remove, forms the second welding resisting layer 116 of second groove 105 covering second exposed regions 1123 corresponding with the second exposed region 1123 and the second connection gasket 1122 exposing from the second welding resisting layer 116 and is exposed to the second groove 105.So, can make the reeded multilayer circuit board 100 of tool.
The first groove 103 and the second groove 105 are respectively used to installing electronic elements.The first connection gasket 1112 exposing in the first groove 103 is for being mutually electrically connected to the electronic component of accommodating in the first groove 103.The second connection gasket 1122 exposing in the second groove 105 is for being mutually electrically connected to the electronic component of accommodating in the second groove 105.
In the present embodiment, the shape of the first otch 102 is corresponding with the shape of the first exposed region 1113, the first otch 102 around be shaped as quadrangle.The first otch 102 only runs through the first conductive pattern layer 150, the first dielectric layer 130 and the first protection film 115.By the first otch 102 around the first conductive pattern layer 150, the first dielectric layer 130 and the first protection film 115 can adopt the mode of handwork to be removed.Can first the first conductive pattern layer 150 and the first dielectric layer 130 be removed, then the first protection film 115 is removed.Also can the first conductive pattern layer 150, the first dielectric layer 130 and the first protection film 115 remove simultaneously.
In the present embodiment, the shape of the second otch 104 is corresponding with the shape of the second exposed region 1123, the second otch 104 around shape be also quadrangle.The second otch 104 only runs through the second conductive pattern layer 160, the second dielectric layer 140 and the second protection film 117.By the second otch 104 around the second conductive pattern layer 160, the second dielectric layer 140 and the second protection film 117 can adopt the mode of handwork to be removed.Can first the second conductive pattern layer 160, the second dielectric layer 140 be removed, then the second protection film 117 is removed.Also can the second conductive pattern layer 160, the second dielectric layer 140 and the second protection film 117 remove simultaneously.
In the present embodiment, the first otch 102 and the second otch 104 can adopt the mode of Ultra-Violet Laser depthkeeping cutting to form.Owing to being provided with the first protection film 115 and the second protection film 117; the first dielectric layer 130 does not contact with the first connection gasket 1112 and the first welding resisting layer 114 in the first exposed region 1113; the second dielectric layer 140 does not contact with the second connection gasket 1122 and the second welding resisting layer 116 in the second exposed region 1123, thereby can protect the first connection gasket 1112, the first welding resisting layer 114, the second connection gasket 1122 and the second welding resisting layer 116.And the first protection film 115 and the second protection film 117 have good peelable characteristic, are easy to remove.
Be understandable that, the quantity of the groove in multilayer circuit board 100, position and the degree of depth are not subject to the restriction of the present embodiment, and the quantity of the groove in multilayer circuit board 100, position and the degree of depth can be set according to the needs of multilayer circuit board.
After this step, can also comprise the step that multilayer circuit board 100 is carried out to moulding, the multilayer circuit board meeting the demands to obtain shape.
The circuit board manufacturing method that the present embodiment provides, also can make the circuit board that only has the first groove 103 and do not have the second groove 105, and like this, the second conducting wire layer 112 does not need to have the second exposed region 1123.When pressing, only need between the second Copper Foil 42 and internal layer circuit substrate 110, form the second dielectric layer 140 by pressing the second pressing film 52, do not need to arrange the 3rd adhesive sheet 30.
In the manufacture method that the present embodiment provides, not each step is steps necessary, for example, can adopt the operation of the 6th step, and directly stack gradually and pressing the first Copper Foil 41, the first pressing film 51, the first adhesive sheet 20, internal layer circuit substrate 110, the 3rd adhesive sheet 30, the second Copper Foil 42 and the second pressing film 52.In addition, the manufacture method of described circuit board also can not comprise the step that forms the 3rd welding resisting layer 170 and the 4th welding resisting layer 180.
The technical program also provides a kind of multilayer circuit board 100, comprise the first solderless substrate 110c, internal layer circuit substrate 110, the second solderless substrate 110d that are pressed on together, internal layer circuit substrate 110 comprises substrate 113 and is fitted in 113 liang of apparent surfaces' of substrate the first conducting wire layer 111 and the second conducting wire layer 112.Described the first conducting wire floor 111 has the first exposed region 1113 and the first pressing district 1114, described the first exposed region 1113 surfaces are provided with the first welding resisting layer 114, and a plurality of first connection gaskets 1112 of the first exposed region 1113 expose from described the first welding resisting layer 114.Described the second conducting wire floor 112 has the second exposed region 1123 and the second pressing district 1124, described the second exposed region 1123 surfaces are provided with the second welding resisting layer 116, and a plurality of second connection gaskets 1122 of the second exposed region 1123 expose from described the second welding resisting layer 116.
In the present embodiment, the first solderless substrate 110c and the second solderless substrate 110d all refer to comprise one deck conductive pattern layer.The first solderless substrate 110c comprises and is pressed on the first adhesive sheet 20, the first pressing film 51 and the first conductive pattern layer 150 together with opening, the first adhesive sheet 20 is formed in the first pressing district 1114 of internal layer circuit substrate 110, and the first adhesive sheet 20 is adjacent with the first pressing film 51.In multilayer circuit board 100, be formed with the first groove 103 that runs through the first solderless substrate 110c, described the first groove 103 is corresponding with described the first welding resisting layer 114, so that described the first welding resisting layer 114 and the first connection gasket 1112 of exposing from the first welding resisting layer 114 are exposed in described the first groove 103, described the first groove 103 is for holding electronic components and parts.
The first solderless substrate 110d comprises and is pressed on the second adhesive sheet 30, the second pressing film 52 and the second conductive pattern layer 160 together with opening, the second adhesive sheet 30 is formed in the second pressing district 1124 of internal layer circuit substrate 110, and the second adhesive sheet 30 is adjacent with the second pressing film 51.In multilayer circuit board 100, be formed with the second groove 105 that runs through the second solderless substrate 110d, described the second groove 105 is corresponding with described the second welding resisting layer 116, so that described the second welding resisting layer 116 and the second connection gasket 1122 of exposing from the second welding resisting layer 116 are exposed in described the second groove 105, described the second groove 105 is for holding electronic components and parts.
When the first solderless substrate 110c and the second solderless substrate 110d are multilager base plate, its structure can be for as described below.
Described the first solderless substrate 110c comprises and is pressed on first adhesive sheet 20 together with opening, the first pressing film 51 of multilayer grooved and the first conductive pattern layer 150 of multilayer opening, the first adhesive sheet 20 is adjacent with the first pressing film 51, the first conductive pattern layer 150 alternative arrangement of the first pressing film 51 of described multilayer grooved and multilayer opening, the the first conductive pattern layer 150 that only has one deck opening between the first pressing film 51 of every adjacent two layers fluting, described the first solderless substrate 110c has first groove 103, described the first groove 103 runs through the first pressing film 51 of every layer of fluting and the first conductive pattern layer 150 of every layer of opening of the first solderless substrate 110c, described the first groove 103 is corresponding with described the first welding resisting layer 114, so that described the first welding resisting layer 114 and the first connection gasket 1112 of exposing from the first welding resisting layer 114 are exposed in described the first groove 103, described the first groove 103 is for holding electronic components and parts.
Described the second solderless substrate 110d comprises second adhesive sheet 30 with opening being pressed on together, the second pressing film 52 of multilayer grooved and the second conductive pattern layer 160 of multilayer opening, the second conductive pattern layer 160 alternative arrangement of the second pressing film 52 of described multilayer grooved and multilayer opening, the the second conductive pattern layer 160 that only has one deck opening between the second pressing film 52 of every adjacent two layers fluting, described the second solderless substrate 110d has second groove 105, described the second groove 105 runs through the second pressing film 52 of every layer of fluting and the second conductive pattern layer 160 of every layer of opening of the second solderless substrate 110d, described the second groove 103 is corresponding with described the second welding resisting layer 116, so that described the second welding resisting layer 116 and the second connection gasket 1122 of exposing from the second welding resisting layer 116 are exposed in described the second groove 105, described the second groove 105 is for holding electronic components and parts.
The manufacture method of the circuit board that the technical program provides, has two films in the surperficial pressing of internal layer conducting wire layer, and wherein a film offers the opening corresponding with internal layer conducting wire layer exposed region, and another is not provided with the opening that exposed region is corresponding.Than the method that a film with corresponding opening is only set carries out pressing; when pressing; can ensure more gummosis flows between protection film and the Copper Foil of pressing; thereby the Copper Foil being positioned on the layer exposed region of internal layer conducting wire is combined closely with corresponding position internal layer circuit substrate; and; the thickness that can guarantee the dielectric layer that two films form can meet the demands, and follow-uply Copper Foil is made while forming conducting wire to thickness due to dielectric layer can not meet the demands and causes liquid medicine by the conducting wire corrosion of internal substrate preventing.
Be understandable that, for the person of ordinary skill of the art, can make other various corresponding changes and distortion by technical conceive according to the present invention, and all these change and distortion all should belong to the protection range of the claims in the present invention.
Claims (18)
1. a manufacture method for circuit board, comprises step:
Internal layer circuit substrate is provided, and described circuit substrate comprises substrate and is formed at the first conducting wire layer of substrate surface, and described the first conducting wire floor comprises the first exposed region and around the first pressing district that connects the first exposed region;
The first exposed region at the first conducting wire layer arranges the first protection film;
At first conducting wire layer one side riveted the first adhesive sheet of internal layer circuit substrate, described the first adhesive sheet has first opening corresponding with the first exposed region, and described the first protection film is positioned at the first opening;
The first adhesive sheet one side at internal layer circuit substrate forms the first solderless substrate and obtains multilager base plate, described the first solderless substrate comprises at least one lamination rubber alloy sheet, at least one deck conductive pattern layer and described the first adhesive sheet, described at least one lamination rubber alloy sheet and described at least one deck conductive pattern layer alternative arrangement, described the first adhesive sheet contacts with one deck pressing film in described the first solderless substrate, and forms the first dielectric layer with the pressing film bonding contacting with it; And
At multilager base plate, near a side of the first solderless substrate, along the border of the first exposed region, cut the first solderless substrate; to form, only run through the first annular otch the first solderless substrate and corresponding with the borderline phase of the first exposed region; removal by the first otch around this part first solderless substrate; and remove the first protection film, thereby form the groove corresponding with the first exposed region.
2. the manufacture method of circuit board as claimed in claim 1, it is characterized in that, described the first conducting wire layer comprises many first conducting wires and a plurality of the first connection gasket, and described a plurality of the first connection gaskets and part the first conducting wire are positioned at described the first exposed region.
3. the manufacture method of circuit board as claimed in claim 2; it is characterized in that; before the surface of the first conducting wire layer in the first exposed region forms the first protection film; also be included in the step that the first welding resisting layer is set on the first exposed region; described the first welding resisting layer covers many first conducting wires in the first exposed region; cover the surface of the substrate in the first exposed region; and exposing a plurality of first connection gaskets of the first exposed region, described the first protection film covers the surface of a plurality of the first connection gaskets described in the surface area of described the first welding resisting layer.
4. the manufacture method of circuit board as claimed in claim 3, is characterized in that, described the first welding resisting layer also covers the first exposed region part the first pressing district around.
5. the manufacture method of circuit board as claimed in claim 1, is characterized in that, forms the first solderless substrate comprise step in the first adhesive sheet one side of internal layer circuit substrate:
Provide the first Copper Foil and the first pressing film, and pressing the first Copper Foil, the first pressing film are to the first adhesive sheet one side of internal layer circuit substrate; And
The first Copper Foil is made and formed the first conductive pattern layer.
6. the manufacture method of circuit board as claimed in claim 5, it is characterized in that, before the first Copper Foil is made to formation the first conductive pattern layer, also be included in the first pressing film and the first Copper Foil and form the first conductive blind hole, described the first conducting wire layer and the first Copper Foil conduct mutually by the first conductive blind hole.
7. the manufacture method of circuit board as claimed in claim 5, it is characterized in that, before the first Copper Foil is made to formation the first conductive pattern, also comprise and form the conductive through hole that runs through the first Copper Foil, the first pressing film and internal layer circuit substrate, the first conducting wire layer and the first Copper Foil in internal layer circuit substrate conduct mutually by described conductive through hole.
8. the manufacture method of circuit board as claimed in claim 1; it is characterized in that; the shape of cross section of described the first opening is identical with the shape of the first protection film; the area of the cross section of the first opening is greater than the area of the first protection film; after the first adhesive sheet described in riveted and internal layer circuit substrate, between the edge of described the first protection film and first parameatal the first adhesive sheet, there is the gap of an annular.
9. a manufacture method for circuit board, comprises step:
Internal layer circuit substrate is provided, described internal layer circuit substrate comprises substrate, be formed at the first conducting wire layer of substrate surface and be formed at the second conducting wire layer of another apparent surface of substrate, described the first conducting wire floor comprises the first exposed region and around the first pressing district that connects the first exposed region, and described the second conducting wire floor comprises the second exposed region and around the second pressing district that connects the second exposed region;
The first exposed region at the first conducting wire layer arranges the first protection film, at the second exposed region of the second conducting wire layer, the second protection film is set;
First conducting wire layer one side riveted the first adhesive sheet at described internal layer circuit substrate, and at second conducting wire layer one side riveted the second adhesive sheet of circuit substrate, described the first adhesive sheet has first opening corresponding with the first exposed region, described the first protection film is positioned at the first opening, described the second adhesive sheet has second opening corresponding with the second exposed region, and described the second protection film is positioned at the second opening;
The first adhesive sheet one side at internal layer circuit substrate forms the first solderless substrate, the second adhesive sheet one side at internal layer circuit substrate forms the second solderless substrate, and acquisition multilager base plate, described the first solderless substrate comprises at least one deck the first pressing film, at least one deck the first conductive pattern layer and described the first adhesive sheet, described at least one deck the first pressing film and described at least one deck the first conductive pattern layer alternative arrangement, described the first adhesive sheet contacts with one deck the first pressing film in described the first solderless substrate, and form the first dielectric layer with the first pressing film bonding contacting with it, described the second solderless substrate comprises at least one deck the second pressing film, at least one deck the second conductive pattern layer and described the second adhesive sheet, described at least one deck the second pressing film and described at least one deck the second conductive pattern layer alternative arrangement, described the second adhesive sheet contacts with one deck the second pressing film in described the second solderless substrate, and form the second dielectric layer with the second pressing film bonding contacting with it, and
At multilager base plate, near a side of the first solderless substrate, along the border of the first exposed region, cut the first solderless substrate, to form, only run through the first annular otch the first solderless substrate and corresponding with the borderline phase of the first exposed region, removal by the first otch around this part first solderless substrate, and remove the first protection film, thereby form first groove corresponding with the first exposed region, at multilager base plate, near a side of the second solderless substrate, along the border of the second exposed region, cut the second solderless substrate, to form, only run through the second annular otch the second solderless substrate and corresponding with the borderline phase of the second exposed region, removal by the second otch around this part second solderless substrate, and remove the second protection film, thereby form second groove corresponding with the second exposed region.
10. the manufacture method of circuit board as claimed in claim 9, it is characterized in that, described the first conducting wire layer comprises many first conducting wires and a plurality of the first connection gasket, described a plurality of the first connection gasket and part the first conducting wire are positioned at described the first exposed region, described the second conducting wire layer comprises many second conducting wires and a plurality of the second connection gasket, and described the second connection gasket and part the second conducting wire are positioned at described the second exposed region.
The manufacture method of 11. circuit boards as claimed in claim 10, it is characterized in that, in the first exposed region, on the first conducting wire layer, form the first protection film, before forming the second protection film on the first conducting wire layer in the second exposed region, the surface that is also included in the first conducting wire in the first exposed region forms the first welding resisting layer, so that the first conducting wire in the first exposed region is covered, the first connection gasket exposes from described the first welding resisting layer, described the first protection film is formed at the surface of the first welding resisting layer and the first connection gasket, the surface of the second conducting wire in the second exposed region forms the second welding resisting layer, so that the second conducting wire in the second exposed region is covered, the second connection gasket exposes from described the second welding resisting layer, described the second protection film is formed at the surface of the second welding resisting layer and the second connection gasket.
The manufacture method of 12. 1 kinds of circuit boards, comprises step:
Internal layer circuit substrate is provided, described internal layer circuit substrate comprises substrate and is formed at the first conducting wire layer and the second conducting wire layer of the relative both sides of substrate, and described the first conducting wire floor comprises the first exposed region and around the first pressing district that connects the first exposed region;
The first exposed region at the first conducting wire layer arranges the first protection film;
At first conducting wire layer one side riveted the first adhesive sheet of internal layer circuit substrate, described the first adhesive sheet has first opening corresponding with the first exposed region, and described the first protection film is positioned at the first opening;
The first adhesive sheet one side at internal layer circuit substrate forms the first solderless substrate, the second adhesive sheet one side at internal layer circuit substrate forms the second solderless substrate, and acquisition multilager base plate, described the first solderless substrate comprises at least one deck the first pressing film, at least one deck the first conductive pattern layer and described the first adhesive sheet, described at least one deck the first pressing film and described at least one deck the first conductive pattern layer alternative arrangement, described the first adhesive sheet contacts with one deck the first pressing film in described the first solderless substrate, and form the first dielectric layer with the first pressing film bonding contacting with it, described the second solderless substrate comprises at least one deck the second pressing film, one deck the second conductive pattern layer at least, described at least one deck the second pressing film and described at least one deck the second conductive pattern layer alternative arrangement, one deck in described the second solderless substrate contacts with internal layer circuit substrate, and form the second dielectric layer, and
At multilager base plate, near a side of the first solderless substrate, along the border of the first exposed region, cut the first solderless substrate; to form, only run through the first annular otch the first solderless substrate and corresponding with the borderline phase of the first exposed region; removal by the first otch around this part first solderless substrate; and remove the first protection film, thereby form the groove corresponding with the first exposed region.
The manufacture method of 13. circuit boards as claimed in claim 12, it is characterized in that, described the first conducting wire layer comprises many first conducting wires and a plurality of the first connection gasket, and described a plurality of the first connection gaskets and part the first conducting wire are positioned at described the first exposed region.
The manufacture method of 14. circuit boards as claimed in claim 13; it is characterized in that; in the first exposed region, on the first conducting wire layer, form the first protection film; before forming the second protection film on the first conducting wire layer in the second exposed region; the surface that is also included in the first conducting wire in the first exposed region forms the first welding resisting layer; so that the first conducting wire in the first exposed region is covered, the first connection gasket exposes from described the first welding resisting layer, and described the first protection film is formed at the surface of the first welding resisting layer and the first connection gasket.
15. 1 kinds of circuit boards, comprise the solderless substrate and the internal layer circuit substrate that are pressed on together, internal layer circuit substrate comprises substrate and is fitted in the conducting wire layer of substrate surface, described conducting wire floor has exposed region and pressing district around being connected exposed region, described exposed region surface is provided with welding resisting layer, and a plurality of connection gaskets of exposed region expose from described welding resisting layer, solderless substrate comprises the adhesive sheet being pressed on together, pressing film and conductive pattern layer, described adhesive sheet is bonded between the pressing district and pressing film of internal layer circuit substrate, and form dielectric layer with this pressing film bonding bonding with it, in described circuit board, there is the groove that only runs through described solderless substrate, described groove is corresponding with described exposed region, so that the welding resisting layer on exposed region surface and described a plurality of connection gaskets of exposing from welding resisting layer are exposed in described groove, described groove is for holding electronic components and parts.
16. 1 kinds of circuit boards, comprise the first solderless substrate being pressed on together, internal layer circuit substrate and the second solderless substrate, internal layer circuit substrate comprises substrate, be formed on the first conducting wire layer on substrate one surface and be formed on the second conducting wire layer of another apparent surface of substrate, described the first conducting wire floor has the first exposed region and the first pressing district around being connected the first exposed region, described the first exposed region surface is provided with the first welding resisting layer, and a plurality of first connection gaskets of the first exposed region expose from described the first welding resisting layer, described the second conducting wire floor has the second exposed region and the second pressing district around being connected the second exposed region, described the second exposed region surface is provided with the second welding resisting layer, and a plurality of second connection gaskets of the second exposed region expose from described the second welding resisting layer, described the first solderless substrate comprises the first adhesive sheet being pressed on together, the first pressing film and the first conductive pattern layer, described the first adhesive sheet is bonded between the first pressing district and the first pressing film of internal layer circuit substrate, and form dielectric layer with this first pressing film bonding, in described circuit board, have and run through only the first groove of the first solderless substrate, described the first groove is corresponding with described the first exposed region, so that first welding resisting layer on the first exposed region surface and described a plurality of the first connection gaskets of exposing from the first welding resisting layer are exposed in described the first groove, the second solderless substrate comprises the second adhesive sheet being pressed on together, the second pressing film and the second conductive pattern layer, the second adhesive sheet is bonded between the second pressing district and the second pressing film of internal layer circuit substrate, and form another dielectric layer with this second pressing film bonding, in described circuit board, there is the second groove that only runs through the second solderless substrate, described the second groove is corresponding with described the second exposed region, so that second welding resisting layer on the second exposed region surface and described a plurality of the second connection gaskets of exposing from the second welding resisting layer are exposed in described the second groove, described the first groove and the second groove are all for holding electronic components and parts.
17. 1 kinds of circuit boards, comprise the solderless substrate and the internal layer circuit substrate that are pressed on together, internal layer circuit substrate comprises substrate and is fitted in the first conducting wire layer of substrate surface, described the first conducting wire floor has the first exposed region and the first pressing district around being connected the first exposed region, described the first exposed region surface is provided with the first welding resisting layer, and a plurality of first connection gaskets of the first exposed region expose from described the first welding resisting layer, described the first solderless substrate comprises the first adhesive sheet being pressed on together, multilayer the first pressing film and multilayer the first conductive pattern layer, the first adhesive sheet is bonded between one deck first pressing film of the first pressing district and the first solderless substrate, and form dielectric layer with the first pressing film bonding with it, described multilayer the first pressing film and multilayer the first conductive pattern layer alternative arrangement, between every adjacent two layers the first pressing film, only there is one deck the first conductive pattern layer, described the first solderless substrate has first groove, described the first groove runs through the first adhesive sheet in the first solderless substrate, every layer of first pressing film and every layer of first conductive pattern layer, thereby the first adhesive sheet in the first solderless substrate, in every layer of first pressing film and every layer of first conductive pattern layer, all form opening, described the first groove is corresponding with described the first exposed region, so that first welding resisting layer on the first exposed region surface and described a plurality of the first connection gaskets of exposing from the first welding resisting layer are exposed in described the first groove, described the first groove is used for installing electronic devices and components.
18. 1 kinds of circuit boards, comprise the first solderless substrate being pressed on together, internal layer circuit substrate and the second solderless substrate, internal layer circuit substrate comprises substrate, be formed on the first conducting wire layer on substrate one surface and be formed on the second conducting wire layer on another apparent surface of substrate, described the first conducting wire floor has the first exposed region and the first pressing district around being connected the first exposed region, described the first exposed region surface is provided with the first welding resisting layer, and a plurality of first connection gaskets of the first exposed region expose from described the first welding resisting layer, described the second conducting wire floor has the second exposed region and the second pressing district around being connected the second exposed region, described the second exposed region surface is provided with the second welding resisting layer, and a plurality of second connection gaskets of the second exposed region expose from described the second welding resisting layer, described the first solderless substrate comprises the first adhesive sheet being pressed on together, multilayer the first pressing film and multilayer the first conductive pattern layer, the first adhesive sheet is bonded between one deck first pressing film of the first pressing district and the first solderless substrate, and with form dielectric layer with the first pressing film of its bonding, described multilayer the first pressing film and multilayer the first conductive pattern layer alternative arrangement, between every adjacent two layers the first pressing film, only there is one deck the first conductive pattern layer, described the first solderless substrate has first groove, described the first groove runs through every layer of first pressing film and the every layer of first conductive pattern layer in the first solderless substrate, thereby the first adhesive sheet in the first solderless substrate, in every layer of first pressing film and every layer of first conductive pattern layer, all form opening, described the first groove is corresponding with described the first exposed region, so that first welding resisting layer on described the first exposed region surface and described a plurality of the first connection gaskets of exposing from the first welding resisting layer are exposed in described the first groove, described the second solderless substrate comprises the second adhesive sheet being pressed on together, multilayer the second pressing film and multilayer the second conductive pattern layer, the first adhesive sheet is bonded between one deck second pressing film of the second pressing district and the second solderless substrate, and with form another dielectric layer with the second pressing film of its bonding, described multilayer the second pressing film and multilayer the second conductive pattern layer alternative arrangement, between every adjacent two layers the second pressing film, only there is one deck the second conductive pattern layer, described the second solderless substrate has second groove, described the second groove runs through the second adhesive sheet in the second solderless substrate, every layer of second pressing film and every layer of second conductive pattern layer, thereby the second adhesive sheet in the second solderless substrate, in every layer of second pressing film and every layer of second conductive pattern layer, all form opening, described the second groove is corresponding with described the second exposed region, so that second welding resisting layer on described the second exposed region surface and described a plurality of the second connection gaskets of exposing from the second welding resisting layer are exposed in described the second groove, described the first groove and the second groove are all for installing electronic devices and components.
Priority Applications (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201210267133.6A CN103582325B (en) | 2012-07-31 | 2012-07-31 | Circuit board and preparation method thereof |
| TW101128099A TW201406244A (en) | 2012-07-31 | 2012-08-03 | Printed circuit board and method for manufacturing same |
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| Application Number | Priority Date | Filing Date | Title |
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| CN201210267133.6A CN103582325B (en) | 2012-07-31 | 2012-07-31 | Circuit board and preparation method thereof |
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| CN103582325A true CN103582325A (en) | 2014-02-12 |
| CN103582325B CN103582325B (en) | 2016-12-21 |
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| CN201210267133.6A Active CN103582325B (en) | 2012-07-31 | 2012-07-31 | Circuit board and preparation method thereof |
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| CN (1) | CN103582325B (en) |
| TW (1) | TW201406244A (en) |
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| CN109688733A (en) * | 2017-10-19 | 2019-04-26 | 宏启胜精密电子(秦皇岛)有限公司 | Multi-layer soft circuit board and preparation method thereof |
| CN110730573A (en) * | 2018-07-16 | 2020-01-24 | 健鼎（无锡）电子有限公司 | Circuit board and method for manufacturing the same |
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| TWI808716B (en) * | 2022-04-08 | 2023-07-11 | 欣興電子股份有限公司 | Circuit board and circuit board module with docking structure and manufacture method of the circuit board |
| TWI829370B (en) * | 2022-09-29 | 2024-01-11 | 健鼎科技股份有限公司 | Method for manufacturing semi-flex printed circuit board |
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| JP2009076539A (en) * | 2007-09-19 | 2009-04-09 | Nippon Mektron Ltd | Method of manufacturing printed wiring board in which resistive element is built |
| TW201215508A (en) * | 2010-10-01 | 2012-04-16 | Elite Material Co Ltd | Manufacturing method of substrate and structure capable of simplifying its manufacturing process |
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| CN109688733A (en) * | 2017-10-19 | 2019-04-26 | 宏启胜精密电子(秦皇岛)有限公司 | Multi-layer soft circuit board and preparation method thereof |
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| CN110730573A (en) * | 2018-07-16 | 2020-01-24 | 健鼎（无锡）电子有限公司 | Circuit board and method for manufacturing the same |
| CN112165788A (en) * | 2020-09-28 | 2021-01-01 | 高德(苏州)电子有限公司 | Manufacturing method of waterproof PCB |
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Also Published As
| Publication number | Publication date |
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| TW201406244A (en) | 2014-02-01 |
| CN103582325B (en) | 2016-12-21 |
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Effective date of registration: 20170303 Address after: 518103 Guangdong city of Shenzhen province Baoan District Songgang streets Yan Chuanyan Luzhen Luo Ding Technology Park plant A1 building to building A3 Patentee after: Fuku Precision Components (Shenzhen) Co., Ltd. Patentee after: Peng Ding Polytron Technologies Inc Address before: 518103 Shenzhen Province, Baoan District Town, Fuyong Tong tail Industrial Zone, factory building, building 5, floor, 1 Patentee before: Fuku Precision Components (Shenzhen) Co., Ltd. Patentee before: Zhending Technology Co., Ltd. |
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| CP03 | Change of name, title or address | ||
| CP03 | Change of name, title or address |
Address after: Guangdong city of Shenzhen province Baoan District Songgang street Chuanyan Luo Lu Yan Co-patentee after: Peng Ding Polytron Technologies Inc Patentee after: Peng Ding Holdings (Shenzhen) Limited by Share Ltd Address before: 518000 Guangdong city of Shenzhen province Baoan District Songgang streets Yan Chuanyan Luzhen Luo Ding Technology Park plant A1 building to building A3 Co-patentee before: Peng Ding Polytron Technologies Inc Patentee before: Fuku Precision Components (Shenzhen) Co., Ltd. |