CN103187455B - 用于电子器件或其它制品上的涂层的杂化层 - Google Patents
用于电子器件或其它制品上的涂层的杂化层 Download PDFInfo
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- CN103187455B CN103187455B CN201310110156.0A CN201310110156A CN103187455B CN 103187455 B CN103187455 B CN 103187455B CN 201310110156 A CN201310110156 A CN 201310110156A CN 103187455 B CN103187455 B CN 103187455B
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Classifications
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- C23—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
- C23C—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
- C23C16/00—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes
- C23C16/22—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes characterised by the deposition of inorganic material, other than metallic material
- C23C16/24—Deposition of silicon only
-
- C—CHEMISTRY; METALLURGY
- C23—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
- C23C—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
- C23C16/00—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes
- C23C16/22—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes characterised by the deposition of inorganic material, other than metallic material
- C23C16/30—Deposition of compounds, mixtures or solid solutions, e.g. borides, carbides, nitrides
- C23C16/40—Oxides
- C23C16/401—Oxides containing silicon
-
- C—CHEMISTRY; METALLURGY
- C23—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
- C23C—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
- C23C16/00—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes
- C23C16/02—Pretreatment of the material to be coated
- C23C16/0272—Deposition of sub-layers, e.g. to promote the adhesion of the main coating
-
- C—CHEMISTRY; METALLURGY
- C23—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
- C23C—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
- C23C16/00—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes
- C23C16/44—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes characterised by the method of coating
- C23C16/448—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes characterised by the method of coating characterised by the method used for generating reactive gas streams, e.g. by evaporation or sublimation of precursor materials
-
- C—CHEMISTRY; METALLURGY
- C23—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
- C23C—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
- C23C16/00—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes
- C23C16/44—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes characterised by the method of coating
- C23C16/50—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes characterised by the method of coating using electric discharges
- C23C16/505—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes characterised by the method of coating using electric discharges using radio frequency discharges
- C23C16/509—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes characterised by the method of coating using electric discharges using radio frequency discharges using internal electrodes
-
- C—CHEMISTRY; METALLURGY
- C23—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
- C23C—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
- C23C30/00—Coating with metallic material characterised only by the composition of the metallic material, i.e. not characterised by the coating process
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Abstract
公开了在表面上形成涂层的方法。该方法包括在表面上沉积包含聚合物材料和非聚合物材料的混合物的杂化层。该杂化层可以具有单一相或包含多个相。使用单一前体材料源通过化学气相沉积形成该杂化层。化学气相沉积处理可以是等离子体增强的并且可以使用反应物气体来进行。前体材料可以是有机硅化合物例如硅氧烷。杂化层可以包含各种类型的聚合物材料例如硅酮聚合物和各种类型的非聚合物材料例如氧化硅。通过改变反应条件，可以调节聚合物材料与非聚合材料的重量%比率。该杂化层可以具有各种适于与有机发光器件一起使用的性能，例如透光性、不可渗透性和/或柔韧性。
Description
本申请是申请日为2007年10月31日，题目为“用于电子器件或其它制品上的涂层的杂化层”的中国专利申请200780045610.1的分案申请。
本申请是美国申请No.11/783,361（2007年4月9日提交）的部分继续申请，其要求美国临时申请No.60/856,047（2006年11月1日提交）的优先权。通过引用将这两个申请的全部内容并入本文。
本发明是借助美国政府支持在陆军研究室(Army Research Office)授予的合同No.W911QX-06-C-0017下完成的。美国政府在本发明中可享有一定的权利。
所要求保护的本发明是由达成联合大学公司研究协议的一个或多个下列合作方完成的，代表其利益和/或与其有关：Princeton University,The University ofSouthern California，和Universal Display Corporation。在要求保护的发明完成之日或之前该协议生效，且作为在该协议范围内进行活动的结果完成所要求保护的发明。
技术领域
本发明涉及用于电子器件的阻挡涂层。
背景技术
有机电子器件例如有机发光器件(OLED)在暴露于水蒸气或氧时易于劣化。OLED上减少其对水蒸气或氧的暴露的保护性阻挡涂层可有助于改善器件的寿命和性能。已考虑将成功用于食品包装的氧化硅膜、氮化硅膜或氧化铝膜用作OLED的阻挡涂层。然而，这些无机膜倾向于含有微观缺陷，这些微观缺陷允许水蒸气和氧扩散通过该膜。在一些情形中，所述缺陷在脆性膜中显现为裂纹。虽然这种水和氧扩散水平对于食用产品也许是可接受的，但其对于OLED是不可接受的。为解决这些问题，在OLED上对使用交替的无机层和聚合物层的多层阻挡涂层进行了测试，发现对水蒸气和氧的渗透具有改善的抵抗性。但这些多层涂层具有关于复杂性和费用的缺点。因此，存在对形成适用于保护OLED的阻挡涂层的其它方法的需要。
概述
在一方面，本发明提供了在表面上形成涂层的方法，包括：提供前体材料源；将前体材料输送到与待涂覆表面邻接的反应位置；和使用该前体材料源通过化学气相沉积在该表面上沉积杂化层，其中该杂化层包含聚合物材料和非聚合物材料的混合物，其中聚合物材料与非聚合物材料的重量比在95:5至5:95范围内，且其中聚合物材料和非聚合物材料产生自相同的前体材料源。
在另一方面，本发明提供了在表面上形成多层涂层的方法，包括：提供前体材料源；将前体材料输送到与待涂覆表面邻接的反应位置；和使用该前体材料源通过化学气相沉积在该表面上沉积多个杂化层，其中各个杂化层独立地包含聚合物材料和非聚合物材料的混合物，其中聚合物材料与非聚合物材料的重量比在95:5至5:95范围内，且其中聚合物材料和非聚合物材料产生自相同的前体材料源。
在另一方面，本发明提供了形成如下涂层的方法，所述涂层与其上沉积该涂层的表面具有改善的界面结合，该方法包括：提供具有表面的衬底；预处理待涂覆的表面；提供前体材料源；将前体材料输送到与预处理表面邻接的反应位置；和使用该前体材料源通过化学气相沉积在该表面上沉积杂化层，其中该杂化层包含聚合物材料和非聚合物材料的混合物，其中聚合物材料与非聚合物材料的重量比在95:5至5:95范围内，且其中聚合物材料和非聚合物材料产生自相同的前体材料源。
在另一方面，本发明提供了保护电子器件的方法，所述电子器件设置在充当该电子器件的基底的表面上，包括：在电子器件上形成涂层，包括以下步骤：(a)提供前体材料源；(b)将前体材料输送到与待涂覆电子器件邻接的反应位置；和(c)使用该前体材料源通过化学气相沉积在该电子器件上沉积杂化层，其中该杂化层包含聚合物材料和非聚合物材料的混合物，其中聚合物材料与非聚合物材料的重量比在95:5至5:95范围内，且其中聚合物材料和非聚合物材料产生自相同的前体材料源。
在又一方面，本发明提供了控制表面上形成的涂层性能的方法，包括：提供前体材料源；将前体材料输送到与待涂覆表面邻接的反应位置；使用该前体材料源通过化学气相沉积在该表面上沉积杂化层，其中该杂化层包含聚合物材料和非聚合物材料的混合物，其中聚合物材料与非聚合物材料的重量比在95:5至5:95范围内，且其中聚合物材料和非聚合物材料产生自相同的前体材料源；和控制沉积该杂化层所处的条件。
附图简述
图1显示了可用于实施本发明某些实施方案的PE-CVD设备的示意图。
图2显示了根据一个实施方案的杂化层的光学透射谱。
图3显示了如何测量膜上水滴的接触角。
图4显示了在各种O2/HMDSO气体流量比率下形成的若干杂化层的接触角的坐标图。
图5显示了在PE-CVD处理期间于所施加的各种功率水平下形成的若干杂化层的接触角的坐标图。
图6显示了使用相对高的O2流量和相对低的O2流量形成的杂化层相对于纯SiO2（热氧化物）膜和纯聚合物膜的红外吸收光谱。
图7显示了在各种O2/HMDSO气体流量比率下形成的各种杂化层的纳米压痕硬度相对于纯SiO2膜的硬度的坐标图。
图8显示了在各种O2/HMDSO气体流量比率下形成的若干杂化层的表面粗糙度的坐标图。
图9显示了在各种功率水平下形成的若干杂化层的表面粗糙度的坐标图。
图10A和10B显示了在50μm厚Kapton聚酰亚胺箔上沉积的4μm杂化层的表面的光学显微照片。
图11显示了根据一个实施方案的封装OLED的一部分的横截面视图。
图12显示具有阻挡涂层的完整OLED的加速环境测试的结果。
图13显示了根据另一个实施方案的封装OLED。
图14显示了根据另一个实施方案的杂化层的横截面的扫描电子显微照片。
图15显示了根据另一个实施方案的封装OLED。
图16A和16B显示了根据另一个实施方案的杂化层的横截面的扫描电子显微照片。
图17A显示在一种设定条件下沉积的杂化层的横截面的扫描电子显微照片。图17B显示在另一种设定条件下沉积的杂化层的横截面的扫描电子显微照片。
图18A-C显示了聚酰亚胺衬底和在其上沉积的各种杂化层之间的应变失配的坐标图。
图19显示了根据另一个实施方案的封装OLED。
图20显示了根据另一个实施方案的封装OLED。
详述
在一方面，本发明提供了在表面上形成涂层的方法。该方法包括在表面上沉积包含聚合物材料和非聚合物材料的混合物的杂化层。该杂化层可以具有单一相或多个相。
如在本文中所使用的，术语“非聚合物”是指由具有明确限定化学式的分子所构成的材料，所述分子具有单一的、明确限定的分子量。“非聚合物”分子可以具有非常大的分子量。在一些情形中，非聚合物分子可以包括重复单元。如在本文中所使用的，术语“聚合物”是指由具有共价联接的重复亚单元(subunit)的分子所构成的材料，并且所述分子的分子量在分子与分子之间可以不等，这是因为聚合反应可以对于各个分子产生不同数目的重复单元。聚合物包括但不限于均聚物和共聚物例如嵌段、接枝、无规或交替的共聚物，以及他们的共混物及变体。聚合物包括但不限于碳或硅的聚合物。
如本文中所使用的，“聚合物材料和非聚合物材料的混合物”是指本领域技术人员可理解为既不是纯聚合物又不是纯非聚合物的组合物。术语“混合物”意欲排除含有偶存量的非聚合物材料（例如，其可必然存在于聚合物材料的间隙中）但本领域技术人员却认为是纯聚合物的任何聚合物材料。同样，这意欲排除含有偶存量的聚合材料但本领域技术人员却认为是纯的非聚合物的任何非聚合物材料。在一些情形中，杂化层中聚合物与非聚合物材料的重量比在95:5至5:95范围内，优选在90:10至10:90范围内且更优选在25:75至10:90范围内。
可以使用包括水滴的润湿接触角、红外吸收、硬度和柔韧性的各种技术来确定层的聚合物/非聚合物组成。在某些情形中，杂化层具有在30°-85°范围内，优选在30°-60°范围内且更优选在36°-60°范围内的润湿接触角。应注意，如果在沉积状态的膜表面上测定，则润湿接触角是组成的量度。因为润湿接触角可因沉积后的处理而极大变化，在这样的处理后进行的测量可能并不精确地反映出层的组成。据认为，这些润湿角适用于由有机硅前体形成的许多层。在某些情形中，杂化层具有在3-20GPa范围内，优选在10-18GPa范围内的纳米压痕硬度。在某些情形中，杂化层具有在0.1nm-10nm范围内，优选在0.2nm-0.35nm范围内的表面粗糙度（均方根）。在某些情形中，当杂化层沉积为在50μm厚的聚酰亚胺箔衬底上的4μm厚的层时，其具有足够的柔韧性，使得在0.2%的拉应变(ε)下于1英寸直径轧辊上至少55000次辊轧循环后没有观测到显微组织改变。在某些情形中，杂化层是足够柔韧的，使得在至少0.35%的拉应变(ε)（本领域技术人员认为，通常可使4μm纯氧化硅层开裂的拉应变水平）下没有出现裂纹。
术语“混合物”意欲包括具有单一相的组合物以及具有多个相的组合物。因此，“混合物”排除后续沉积的交替的聚合物层和非聚合物层。换言之，要被认为是“混合物”，则层应在相同沉积条件下和/或在相同时间进行沉积。
使用单一前体材料源通过化学气相沉积形成杂化层。如本文中所使用的，“单一前体材料源”是指在通过CVD（用或不用反应物气体）沉积前体材料时提供形成聚合物材料和非聚合物材料两者所必需的所有前体材料的源。这意欲排除其中使用一种前体材料形成聚合物材料和使用不同前体材料形成非聚合物材料的方法。通过使用单一前体材料源，该沉积方法得以简化。例如，单一前体材料源可消除对独立的前体材料流的需要和提供并控制该独立流的伴随需要。
前体材料可以是单一化合物或多种化合物的混合物。在一些情形中，当前体材料是多种化合物的混合物时，混合物中的每种不同化合物自身能够独立地充当前体材料。例如，前体材料可以是六甲基二硅氧烷(HMDSO)和二甲基硅氧烷(DMSO)的混合物。
在一些情形中，等离子体增强CVD(PE-CVD)可以用于杂化层的沉积。出于包括低温沉积、均匀涂层形成和可控工艺参数在内的各种原因，PE-CVD可为理想的。适用于本发明的各种PE-CVD方法在本领域中是已知的，包括使用RF能量产生等离子体的那些方法。
前体材料是在通过化学气相沉积进行沉积时能够形成聚合物材料和非聚合物材料两者的材料。各种这样的前体材料均适用于本发明并且就它们的各种特性对其进行选择。例如，前体材料可就其化学元素含量、其化学元素的化学计量比、和/或在CVD下形成的聚合物材料及非聚合物材料来进行选择。例如，有机硅化合物如硅氧烷是适合用作前体材料的一类化合物。硅氧烷化合物的代表性例子包括六甲基二硅氧烷(HMDSO)和二甲基硅氧烷(DMSO)。当通过CVD进行沉积时，这些硅氧烷化合物能够形成聚合物材料例如硅酮聚合物和非聚合物材料例如氧化硅。还可就各种其它特性例如费用、无毒性、操纵特性、在室温下维持液相的能力、挥发性、分子量等对前体材料进行选择。
适合用作前体材料的其它有机硅化合物包括甲基硅烷；二甲基硅烷；乙烯基三甲基硅烷；三甲基硅烷；四甲基硅烷；乙基硅烷；二硅烷基甲烷（disilanomethane）；双(甲基硅烷基)甲烷（bis(methyl-silano)methane）；1,2-二硅烷基乙烷（1,2-disilanoethane）；1,2-双(甲基硅烷基)乙烷（1,2-bis(methylsilano)ethane）；2,2-二硅烷基丙烷（2,2-disilanopropane）；l,3,5-三硅烷基-2,4,6-三亚甲基（1,3,5-trisilano-2,4,6-trimethylene），和这些化合物的氟化衍生物。适合用作前体材料的含苯基的有机硅化合物包括：二甲基苯基硅烷和二苯基甲基硅烷。适合用作前体材料的含氧有机硅化合物包括：二甲基二甲氧基硅烷；1,3,5,7-四甲基环四硅氧烷；1,3-二甲基二硅氧烷；1,1,3,3-四甲基二硅氧烷；1,3-双(硅烷基亚甲基)二硅氧烷（1,3-bis(silanomethylene)disiloxane）；双(1-甲基甲硅醚基)甲烷；2,2-双(1-甲基甲硅醚基)丙烷；2,4,6,8-四甲基环四硅氧烷；八甲基环四硅氧烷；2,4,6,8,10-五甲基环五硅氧烷；l,3,5,7-四硅烷基-2,6-二氧-4,8-二亚甲基（1,3,5,7-tetrasilano-2,6-dioxy-4,8-dimethylene）；六甲基环三硅氧烷；1,3,5,7,9-五甲基环五硅氧烷；六甲氧基二硅氧烷，和这些化合物的氟化衍生物。适合用作前体材料的含氮有机硅化合物包括：六甲基二硅氮烷；二乙烯基四甲基二硅氮烷；六甲基环三硅氮烷；二甲基双(N-甲基乙酰氨基)硅烷；二甲基双-(N-乙基乙酰氨基)硅烷；甲基乙烯基双(N-甲基乙酰氨基)硅烷；甲基乙烯基双(N-丁基乙酰氨基)硅烷；甲基三(N-苯基乙酰氨基)硅烷；乙烯基三(N-乙基乙酰氨基)硅烷；四(N-甲基乙酰氨基)硅烷；二苯基双(二乙基氨氧基)硅烷；甲基三(二乙基氨氧基)硅烷；和双(三甲基硅基)碳二亚胺。
当通过CVD进行沉积时，根据前体材料的类型、任何反应物气体的存在和其它反应条件，前体材料可以按各种量形成各种类型聚合物材料。聚合物材料可以是无机或有机的。例如，在有机硅化合物用作前体材料时，沉积的杂化层可以包括Si-O键、Si-C键或Si-O-C键的聚合物链以形成聚硅氧烷、聚碳硅烷和聚硅烷以及有机聚合物。
当通过CVD进行沉积时，根据前体材料的类型、任何反应物气体的存在和其它反应条件，前体材料可以按各种量形成各种类型非聚合物材料。非聚合物材料可以是无机或有机的。例如，在有机硅化合物用作前体材料且与含氧反应物气体组合时，非聚合物材料可包括硅氧化物例如SiO、SiO2和混合价态氧化物SiOx。当用含氮反应物气体进行沉积时，非聚合物材料可以包括硅氮化物(SiNx)。可形成的其它非聚合物材料包括硅的碳氧化物和硅的氮氧化物。
当使用PE-CVD时，前体材料可以和在PE-CVD工艺中与该前体材料反应的反应物气体结合使用。PE-CVD中反应物气体的使用在本领域中是已知的，并且各种反应物气体均适用于本发明，包括含氧气体（例如O2、臭氧、水）和含氮气体（例如氨）。反应物气体可用于改变反应混合物中存在的化学元素的化学计量比。例如，当硅氧烷前体材料与含氧或含氮反应物气体一起使用时，反应物气体将改变反应混合物中氧或氮相对于硅和碳的化学计量比。反应混合物中各种化学元素（例如硅、碳、氧、氮）之间的这种化学计量关系可以按若干方式而改变。一种方式是改变反应中前体材料或反应物气体的浓度。另一种方式是改变前体材料或反应物气体进入反应的流速。又一种方式是改变用于反应的前体材料或反应物气体的类型。
改变反应混合物中元素的化学计量比可以影响沉积的杂化层中聚合物材料和非聚合物材料的性能和相对量。例如，硅氧烷气体可以与变化量的氧组合来调节杂化层中非聚合物材料相对于聚合物材料的量。通过提高氧相对于硅或碳的化学计量比，可提高非聚合物材料例如硅氧化物的量。类似地，通过降低氧的化学计量比，可提高含硅和碳的聚合物材料的量。还可以通过调节其它反应条件改变杂化层的组成。例如，对于PE-CVD，可改变工艺参数例如RF功率和频率、沉积压力、沉积时间和气体流速。
因此，通过使用本发明的方法，能够形成具有杂化聚合物/非聚合物特性且具备适用于各种用途的特性的杂化层。这样的特性包括透光性（例如在一些情形中，该杂化层是光学透明的）、不可渗透性、柔韧性、厚度、附着性和其它力学性能。例如，可通过改变杂化层中聚合物材料的重量%（余量为非聚合物材料）来调节这些特性中的一种或多种。例如，为获得所需水平的柔韧性和不可渗透性，聚合物材料的重量%优选在5-95%范围内且更优选在10-25%范围内。然而，取决于用途其它范围也是可行的。
由纯的非聚合物材料例如氧化硅制成的阻挡层可以具有涉及透光性、良好附着性和良好膜应力的各种优点。然而，这些非聚合物层倾向于含有微观缺陷，所述缺陷允许水蒸气和氧扩散通过该层。向非聚合物层提供一些聚合物特性可以降低该层的可渗透性而不显著改变纯的非聚合物层的有利性能。不意欲受理论束缚，本发明人认为，具有杂化聚合/非聚合特性的层通过减少缺陷（特别是微裂纹）的大小和/或数目来降低该层的可渗透性。
在一些情形中，本发明的涂层可以具有多个杂化层，其中各个杂化层的组成可以独立地发生改变。在一些情形中，涂层中的一个杂化层的重量%与另一个杂化层相差至少10重量%。各个杂化层的厚度也可以独立地发生改变。通过相继调节用于沉积杂化层的反应条件可以产生不同的杂化层。例如，在PE-CVD工艺中，可相继调节提供到反应混合物中的反应物气体的量来产生多个杂化层，各个杂化层是不连续的并且具有不同的组成。
当涂层具有如下区域时：该区域中其组成从一个高度到另一个高度连续地发生显著改变，该区域内的杂化层可以非常薄，甚至在涂层内薄至最小分子单元。例如，涂层可以具有聚合物材料与非聚合物材料的重量%比率连续改变的区域。该连续改变可以是线性的（例如，聚合物材料与非聚合物材料的重量%比率可以随较高的高度而稳定地增加）或非线性的（例如，周期性提高和降低）。
可以在各种类型制品上沉积杂化层。在一些情形中，该制品可以是有机电子器件例如OLED。对于OLED，杂化层可充当抵抗水蒸气和氧渗透的阻挡涂层。例如，具有小于10-6g/m2/天的水蒸气透过速率和/或小于10-3g/m2/天的氧透过速率的杂化层可适合于保护OLED。在一些情形中，杂化层的厚度可以为0.1-10μm，但取决于用途还可使用其它厚度。此外，具有赋予透光性的厚度和材料组成的杂化层可以适于与OLED一起使用。为了与柔性OLED一起使用，可将杂化层设计成具有所需量的柔韧性。在一些情形中，可在暴露于环境时对劣化敏感的其它制品上使用该杂化层，所述制品例如医药品、医疗器械、生物试剂、生物样品、生物传感器或敏感的测量设备。
在一些情形中，可以将杂化层与同样可通过使用相同的单一前体材料源形成的未混合层组合使用，所述未混合层例如未混合的聚合物层或未混合的非聚合物层。可以在沉积杂化层之前或之后沉积该未混合层。
可以使用多种类型CVD反应器中的任何反应器来实施本发明的方法。作为一个实施例，图1显示了可用于实施本发明某些实施方案的PE-CVD设备10。PE-CVD设备10包含反应室20，在该反应室中电子器件30装载于夹具24上。对反应室20进行设计以含有真空并且将真空泵70连接到反应室20以产生和/或维持适当的压力。N2气罐50提供N2气以净化设备10。反应室20还可以包括冷却系统以减少反应产生的热。
为了操控气体流量，设备10还包括可处于手动或自动控制的各种流量控制机构（例如质量流量控制器80、关闭阀82和止回阀84）。前体材料源40提供前体材料（例如液体形式的HMDSO），该前体材料被蒸发并充入到反应室20内。在一些情形中，可以使用载气例如氩将前体材料输送到反应室20。反应物气体罐60提供反应物气体（例如氧），也将该反应物气体充入反应室20内。前体材料和反应物气体流入到反应室20内以产生反应混合物42。可另外调节反应室20内部的压力以获得沉积压力。反应室20包括安装在电极支座(standoff)26上的一组电极22，所述电极支座可以是导体或绝缘体。器件30和电极22的各种配置均是可行的。可以使用二极管或三极管电极、或者远电极(remote electrode)。器件30可以按图1中所示远距离放置，或者可以安装在二极管结构的一个或两个电极上。
为电极22提供RF功率以在反应混合物42中产生等离子体条件。将等离子体产生的反应产物沉积到电子器件30上。使反应进行足以在电子器件30上沉积杂化层的时间段。反应时间将取决于各种因素，例如器件30相对于电极22的位置、待沉积的杂化层的类型、反应条件、所需杂化层厚度、前体材料和反应物气体。反应时间可以持续5秒钟至5小时，但根据用途还可以使用更长或更短的时间。
下表1显示了用于制备三个实施例的杂化层的反应条件。由水滴的润湿接触角测定，实施例1的杂化层含有约7%聚合物材料和93%非聚合物材料。由水滴的润湿接触角测定，实施例2的杂化层含有约94%聚合物材料和6%非聚合物材料。由水滴的润湿接触角测定，实施例3的杂化层含有约25%聚合物材料和75%非聚合物材料。
表1.
图2显示了实施例3的杂化层的光学透射谱。该杂化层在从近紫外至近红外光谱具有大于90%的透光率。图3显示了如何测量膜上水滴的接触角。图4是在各种O2/HMDSO气体流量比率下形成的若干杂化层的接触角相比于纯SiO2膜和纯聚合物的接触角的坐标图。在沉积处理中的氧流速增加时，所述杂化层的接触角接近纯SiO2膜的接触角。
图5是PE-CVD处理期间于所施加的各种功率水平下形成的若干杂化层的接触角的坐标图。在功率水平增加时，所述杂化层的接触角接近纯SiO2膜的接触角，这可能是由于较高功率水平使O2成为更强的氧化剂。图6显示了使用相对高的O2流量和相对低的O2流量形成的杂化层相比于纯SiO2（热氧化物）的膜或纯聚合物的膜的红外吸收谱图。高O2杂化层在Si-O-Si带显示出强峰。认为热氧化物（纯SiO2）膜的Si-CH3带中的标称峰与Si-O振动有关。图7是在各种O2/HMDSO气体流量比率下形成的各种杂化层的纳米压痕硬度相比于纯SiO2膜的硬度的坐标图。该杂化层的硬度随沉积处理中氧流速的增加而增加，并且这些杂化层可几乎硬如纯的SiO2膜，但却是坚韧且非常柔软的。
图8是在各种O2/HMDSO气体流量比率下形成的若干杂化层的通过原子力显微术测得的表面粗糙度(均方根)的坐标图，并且显示该表面粗糙度随用于沉积处理的O2流速增加而降低。图9是在各种功率水平下形成的若干杂化层的通过原子力显微术测得的表面粗糙度(均方根)的坐标图，并且显示了该表面粗糙度随用于沉积处理的功率水平增加而降低。
图10A和10B显示了在50μm厚Kapton聚酰亚胺箔上沉积的4μm杂化层（在与上文实施例3相同的源温度、气体流速、压力和RF功率下进行沉积）的表面的光学显微照片。在图10A中，在使涂覆箔于1英寸直径轧辊上经受循环辊轧（拉应变ε=0.2%）之前和之后获得图像。在58600次辊轧循环后没有观测到显微组织改变。在图10B中，使涂覆箔经受逐渐增加的拉应变，并且在出现首次开裂（14mm的轧辊直径）之后和在大量开裂（2mm的轧辊直径）之后获得图像。这些柔韧性结果证明本发明的方法可提供高度柔韧的涂层。
图11显示了封装OLED100的一部分的横截面视图，该封装OLED包含衬底150上的OLED固有体(proper)140和作为阻挡涂层110的上述实施例3的杂化层。图12显示了具有阻挡涂层的整个OLED的加速环境测试的结果。底发射OLED和透明OLED均涂覆有6-μm厚的实施例3的杂化层。然后使器件在65℃和85%相对湿度的环境室中工作。该图像显示了在初始时刻和所示时间间隔后的OLED状态。在超过1000小时后所述OLED继续起作用，从而证明本发明的方法可提供对环境暴露劣化影响具有有效防护作用的涂层。
在杂化层用作电子器件的环境阻挡层的情形中，该杂化层可以充当在其上放置电子器件的表面、电子器件的覆盖物或这两者。例如，可以在电子器件上沉积一个杂化层来对其进行覆盖，并且可以在电子器件下方的衬底上沉积另一个杂化层来提供放置电子器件的表面。以这种方式，将电子器件封闭于两个杂化层之间。
例如，参考图13中所示的实施方案，封装OLED160包含衬底150，该衬底150上沉积有杂化层162。OLED的本体140（包括电极）置于杂化层162的表面上。将另一个杂化层164作为保形涂层沉积在OLED本体140上，该杂化层164可以具有与杂化层162相同或不同的组成。照此，除了覆盖OLED本体140的顶部外，杂化层164还朝OLED本体140的侧部向下延伸并且接触杂化层162的表面。以这种方式，将OLED本体140夹在杂化层162和杂化层164之间。
在某些实施方案中，可以在沉积杂化层之前对其上沉积杂化层的表面进行预处理以提高该表面和杂化层之间的界面结合。表面预处理可以调节各种表面性能，包括增强表面的附着性、调节表面化学性质（例如活化表面）、改变表面粗糙度、提高表面能、使表面平坦化(planarize)和/或清洁表面。通过提高表面和杂化层之间的界面结合，这种特征在减少环境污染物（例如水分或氧）从杂化层的边缘的侧向扩散是有用的。
能够提高表面和杂化层之间的界面结合的各种类型的表面处理均适用于本发明，包括机械磨蚀、化学处理（例如，暴露于氧化剂，通过官能团的引入进行活化）或物理-化学处理（例如，暴露于等离子体、电晕放电或紫外辐照）。在使用等离子体处理时，可以在用于沉积杂化层的相同腔室内进行处理，或者可以在独立的设备中进行等离子体处理，在该情形中，可以使用本领域中已知的多种类型等离子体处理设备中的任何设备，包括筒型等离子体系统和平行板型等离子体系统。
等离子体处理中常规使用的多种气体中的任何气体均可适合于预处理表面，包括气体例如氧、氢、氮、氩、氨或其混合物。特别优选的气体包括氧和氩。可使用不同气体以不同方式来调节表面。例如，采用氩气的等离子体处理用氩离子轰击表面，这可以清洁表面或使其在原子尺度上更粗糙，从而改善其对杂化层的附着能力。采用氧的等离子体处理可以用含氧官能团来化学地活化表面，所述含氧官能团能够与杂化层形成键合。为获得所需的表面性能，可以调节等离子体处理过程的各种其它参数，包括功率、频率、持续时间、压力或温度。
在一些情形中，可通过在表面和杂化层之间沉积中介层来预处理表面。中介层包含可用于改善表面和杂化层之间的界面结合的多种材料中的任何材料。例如，用于中介层的合适材料包括氮化硅、铬、钛、镍-钛合金或介电材料。可以使用常规用于沉积薄膜的多种技术中的任何技术来沉积这种层，包括化学气相沉积、等离子体气相沉积或溅射。中介层的厚度将根据具体用途而改变。在一些情形中，中介层可以是单原子层或单分子层，或者具有至多50nm的厚度，但在其它情形中其它厚度也是可行的。中介层中的材料还可以与在该中介层上方或下方的层或结构内的材料发生化学反应。
图14显示了沉积到刻蚀硅晶片上的杂化层的横截面的扫描电子显微照片(SEM)。硅晶片的未刻蚀部分（在图14的左侧显示为具有5μm台阶高度的提升边缘）覆盖有80nm厚的铬膜，该膜在硅晶片的刻蚀期间还充当刻蚀掩模。硅晶片的刻蚀部分（在图14的右侧显示）未用铬膜进行预处理。在以下条件下通过PE-CVD在硅晶片的两个部分上沉积杂化层：
*在2个分别25分钟的间歇时期中，于各时期之间进行冷却。
在间歇沉积处理的整个加热和冷却循环中，硅晶片衬底的平均温度大于80℃（起始温度为约22℃，终了温度为约160℃）。在铬处理的表面上，杂化层具有致密的显微组织。然而，在未处理的表面上，阻挡层具有不规则的柱状显微组织。基于该形貌差异，铬处理的表面上的杂化层（具有致密的显微组织）可预期具有比未处理表面上沉积的杂化层对水分和氧更小的可渗透性。
在一些情形中，中介层可以是包含一个或多个平坦化亚层和一个或多个附着促进亚层的多层结构。例如，美国专利No.6,597,111(Silvernail等)和No.7,187,119(Weaver)描述了由交替的系列聚合物平坦化亚层和高密度亚层形成的阻挡层。聚合物平坦化亚层包含形成平滑表面的聚合物平坦化材料。高密度亚层包含具有足够接近原子间距的高密度材料（例如无机、陶瓷或介电材料）使得环境污染物的扩散受到阻止。在另一个实施例中，中介层可以包含旋涂聚合物层和杂化层（以上述方式进行沉积）的多个交替层；或者SiNx层和杂化层的多个交替层；或者旋涂聚合物层和SiNx层的多个交替层。
例如，参考图15中所示的实施方案，用聚合物材料的平坦化亚层170涂覆衬底150。将附着促进亚层172置于平坦化亚层170上。将OLED本体140（包括电极）置于附着促进亚层172的表面上。然后将杂化层174作为保形涂层沉积在OLED本体140上。照此，除覆盖OLED本体140的顶部外，杂化层174还朝OLED本体140的侧部向下延伸并且接触附着促进亚层172的表面。以这种方式，杂化层174和附着促进亚层172之间的附着性可以减少环境污染物侧向扩散通过界面区域。
如上文所说明，可改变沉积条件来提供具有不同结构、组成和/或性能的杂化层，所述性能包括其对于环境污染物的可渗透性和对其上沉积杂化层的表面的附着性。在一些情形中，可以控制沉积温度（例如在衬底的整个加热和冷却中）来降低杂化层的可渗透性。图16A和16B显示了沉积到刻蚀硅晶片上的杂化层的横截面的扫描电子显微照片(SEM)。用薄铬膜覆盖硅晶片的未刻蚀部分（在图16A和16B的右侧显示为提升的边缘），该膜在硅晶片的刻蚀期间还充当刻蚀掩模。硅晶片的刻蚀部分（在16A和16B的左侧显示）未用薄铬膜进行预处理。在以下条件下通过PE-CVD在硅晶片的两个部分上沉积杂化层：
*在16个分别5分钟的间歇时期中，于各时期之间进行冷却。
在间歇沉积处理的整个加热和冷却循环中，硅晶片衬底的平均温度为约35℃。在间歇沉积处理中，控制沉积温度的一种方法是调节加热和/或循环（cycle）的数目或持续时间。照此，因为该杂化层以较短持续时间的加热循环和较多数目的冷却循环进行沉积，因此平均沉积温度比用于沉积图14中所示杂化层的温度低。结果，硅晶片的铬处理表面和裸表面二者上的杂化层具有不规则的柱状结构。此外，该步骤的侧面上具有差的覆盖。因此，使用在一定范围内的较高沉积温度形成的杂化层可预期比使用较低沉积温度形成的杂化层具有更小的可渗透性。在一些情形中，在40℃-90℃范围内的沉积温度下沉积杂化层。
在一些情形中，可控制沉积功率来减少杂化层的可渗透性。图17A显示了沉积在底发射OLED叠层上的杂化层的横截面的扫描电子显微照片(SEM)。在以下条件下通过PE-CVD沉积杂化层：
*以如下间歇时段：在100毫托下9分钟，接着8次在100毫托下6分钟，接着在130毫托下8分钟，接着在150毫托下10分钟，接着在125毫托下9分钟，接着在150毫托下7分钟，接着在125毫托下8分钟，接着在150毫托下10分钟，接着在125毫托下8分钟，和接着在125毫托下9分钟。
认为较高的沉积功率增加单体断链（fragmentation）。因此，通过逐渐将功率从24W提高至50W，观测到杂化层中各个后续子层(stratum)具有较大的类氧化物特性和较小的类聚合物特性。在图17A中，最接近表面的杂化层的子层（在较低的功率下沉积）具有多孔的类聚合物的显微组织，而最远离表面的子层（在较高的功率下沉积）具有较致密的类氧化物的显微组织。
图17B显示另一个杂化层的横截面的扫描电子显微照片(SEM)，该杂化层在以下条件下通过PE-CVD沉积在顶发射OLED叠层上：
*在12个分别10分钟的间歇时期中，于各时期之间进行冷却。
相对于图17A所示的杂化层，在沉积图17B中所示的杂化层中使用较高的沉积功率。结果，该杂化层具有比图17A中所示的杂化层更致密的显微组织。因此，使用较高沉积功率形成的杂化层可预期具有比使用较低沉积功率形成的杂化层更小的可渗透性。
当将两种相异材料互相紧密接触放置时，这样的接触可特别在该两种材料的界面处引起应力。因此，在某些实施方案中，可控制杂化层的残余内应力来减少杂化层中应力诱导缺陷例如裂纹、空隙、翘曲或分层的发生。控制杂化层中内应力的一种方法是调节沉积条件。
图18A-C显示了25μm厚Kapton-E聚酰亚胺衬底和于不同条件下沉积于其上的各种杂化层（320-600nm厚）之间的应变失配。正失配对应于杂化层中的拉应力，负失配对应于杂化层中的压应力。参考图18A，将沉积压力从100毫托提高至150毫托，而沉积功率和气体流速保持恒定，结果在杂化层中产生较大的拉应力。参考图18B，将沉积功率从50W提高至80W，而沉积压力和气体流速保持恒定，结果在杂化层中产生较大的压应力。参考图18C，将HMDSO/O2气体流速从1.0/34提高至2.0/67，而沉积压力和功率保持恒定，结果在杂化层中产生较大的拉应力。
这些结果表明，可通过改变沉积参数来调节杂化层中的内应力。这些结果还表明存在最佳的沉积参数设置，在该设置下杂化层中的应力可被最小化。例如，可以调节一个沉积参数以在杂化层中产生压应力，同时可以调节另一个参数以在杂化层中产生匹配的拉应力，从而产生为零或接近零的残余净应力。在多层涂层包含多个杂化层的情形中，还能够独立地调节各个杂化层中的应力来控制涂层中的总应力。例如，可调节各个杂化层来平衡涂层中的总应力，或者随着距表面的距离增加而逐渐提高杂化层中的应力量。
在某些实施方案中，当电子器件置于充当基底的表面（即基底表面）上时，杂化层和/或表面还可以包含边缘阻挡体以减少环境污染物（例如水分或氧）通过侧向扩散的渗透，要么经由基底材料本身要么经由基底表面和杂化层之间的界面。基底可以由本文所述的任何材料或已知用于在其上设置电子器件的任何其它材料（例如，用于平坦化的材料和/或金属箔衬底或涂覆阻挡体的塑性衬底上的绝缘层）形成。本领域中已知的多种类型的边缘阻挡体中的任何边缘阻挡体均可适用于本发明。在一些情形中，通过在与电子器件周缘邻接的区域处将杂化层结合至基底表面构成边缘阻挡体。可通过向这些区域施加热封或粘合剂（例如环氧基粘合剂）实现该结合。
在一些情形中，边缘阻挡体可以是从电子器件的顶面沿着电子器件的侧边向下延伸并且与基底表面接触的封头(end cap)。美国专利No.7,002,294(Forrest等)中描述了可适用于本发明的一种封头。该封头可以由能够保护电子器件免受环境污染物的侧向进入的任何材料制成，包括高密度陶瓷材料（例如二氧化硅）或金属材料。
例如，参考图19中所示的实施方案，封装的OLED180包含衬底150，该衬底具有置于其上的OLED本体140（包括电极）。杂化层182沉积在OLED本体140上。封头184置于杂化层182和OLED本体140周围以便从杂化层182的顶面向下朝OLED本体140的侧面延伸，并且与衬底150的表面接触。封头184起到减少环境污染物经由OLED180的侧部表面或边缘侧向进入的作用。
在一些情形中，可以通过在与电子器件周缘邻接的区域中产生到基底表面的一个或多个不连续体来形成边缘阻挡体。这些不连续体可以充当抵抗由多种机制中的任何机制产生的环境污染物渗透的阻挡体，这些机制包括提高用于环境污染物侧向进入的路径长度，或者在基底材料充当环境污染物进入的管道(conduit)时，在该管道中形成中断。如本文中所使用的，术语“不连续体”是指通过使用控制空隙的大小、形状和位置的技术移除或沉积材料而在基底表面中产生的不连续空隙（例如沟、槽、缝、裂纹、断口、间隙、孔洞、穿孔）。例如，这样的技术包括使用能量束（例如激光、离子或电子）的直写刻蚀、显微机械加工、微细钻削、光刻工艺或在待产生空隙的区域上利用选择性掩蔽而掩模沉积基底材料。
例如，参考图20中所示的实施方案，用聚酰亚胺膜194涂覆衬底150。聚酰亚胺膜194充当基底表面，OLED本体140（包括电极）位于该表面上。围绕OLED本体140的周缘在聚酰亚胺膜194内刻蚀出沟196。作为替代方式，可以在聚酰亚胺膜194的沉积期间通过选择性掩蔽该区域形成沟196。沟196延伸穿过聚酰亚胺膜194的整个厚度。OLED本体140覆盖有杂化层192，该杂化层覆盖OLED本体194的顶部，以及向下朝OLED本体140的侧部延伸至基底表面。在该基底表面上，杂化层192还填充沟196以防止聚酰亚胺膜充当用于环境污染物侧向进入的管道。
给出上述描述和实施例仅仅是为了说明本发明，而非意欲对其进行限制。本发明的各个公开方面和实施方案可以单独地或与本发明的其它方面、实施方案和变体组合来加以考虑。本领域技术人员可想到综合本发明精神和实质的公开实施方案的变体且这些变体在本发明范围内。
Claims (26)
1.一种设置在基底表面上的有机电子器件，其中该器件包括：
设置在基底上的OLED本体；和
设置在OLED本体上的杂化层，该杂化层基本由聚合有机硅和包含含硅化合物的非聚合物材料的混合物构成，其中对于0.1-10μm的杂化层厚度，聚合有机硅和包含含硅化合物的非聚合物材料的混合物处于单一相。
2.权利要求1的器件，其中对于和的杂化层厚度，聚合有机硅和包含含硅化合物的非聚合物材料的混合物处于单一相。
3.权利要求1的器件，其中通过杂化层的水蒸气透过率小于10-6g/m2/天。
4.权利要求1的器件，其中杂化层对水蒸气和氧具有足够的不可渗透性，使得器件在65℃和85％相对湿度下具有大于1000小时的工作寿命。
5.权利要求1的器件，其中至少部分杂化层延伸越过OLED本体的边缘并延伸至基底。
6.权利要求5的器件，还包含置于基底表面和杂化层之间的中介层，中介层包含用于增加基底表面和杂化层之间的界面结合的材料。
7.权利要求6的器件，其中中介层包含无机材料。
8.权利要求7的器件，其中无机材料是铬或氮化硅。
9.权利要求6的器件，其中中介层是基底的表面处理。
10.权利要求1的器件，其中通过前体材料的等离子体增强的化学气相沉积形成杂化层，且其中聚合有机硅和包含含硅化合物的非聚合物材料产生自相同的前体材料源。
11.权利要求5的器件，其中杂化层完全覆盖OLED本体。
12.权利要求5的器件，还包括在与OLED本体周缘邻接的一个或多个区域处的边缘阻挡体。
13.权利要求12的器件，其中边缘阻挡体包含在与OLED本体周缘邻接的一个或多个区域处的基底表面中的一个或多个不连续体。
14.权利要求13的器件，其中不连续体通过刻蚀基底表面而形成。
15.权利要求13的器件，其中不连续体延伸穿过基底表面的全厚度。
16.权利要求12的器件，其中边缘阻挡体包含围绕OLED本体边缘的封头。
17.权利要求12的器件，其中边缘阻挡体包括杂化层和基底表面之间的粘接结合部。
18.权利要求1的器件，包含含硅化合物的非聚合物材料是氧化硅。
19.权利要求1的器件，其中基底是衬底。
20.权利要求1的器件，还包括衬底，其中基底是衬底上的平坦化亚层。
21.权利要求20的器件，其中平坦化亚层包含形成平滑表面的聚合物平坦化材料。
22.权利要求21的器件，其中OLED本体被杂化层和平坦化亚层所封装。
23.权利要求20的器件，其中附着促进亚层置于平坦化亚层上。
24.权利要求1的器件，包括多个杂化层，各个杂化层独立地基本由聚合有机硅和包含含硅化合物的非聚合物材料的混合物组成，其中对于0.1-10μm的杂化层厚度，各杂化层的聚合有机硅和包含含硅化合物的非聚合物材料的混合物处于单一相。
25.权利要求24的器件，其中通过多个杂化层的水蒸气透过率小于10-6g/m2/天。
26.权利要求2的器件，其中通过杂化层的水蒸气透过率小于10-6g/m2/天。
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2007
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- 2007-10-31 JP JP2009535320A patent/JP5491186B2/ja active Active
- 2007-10-31 CN CN201310110156.0A patent/CN103187455B/zh active Active
- 2007-10-31 WO PCT/US2007/023098 patent/WO2008057394A1/en active Application Filing
- 2007-10-31 EP EP07853069A patent/EP2097555A1/en not_active Ceased
- 2007-10-31 KR KR1020157014828A patent/KR20150084893A/ko not_active Application Discontinuation
- 2007-10-31 EP EP11009799A patent/EP2466665A1/en not_active Ceased
- 2007-10-31 TW TW096141151A patent/TWI514641B/zh active
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2014
- 2014-02-27 JP JP2014036437A patent/JP5968931B2/ja active Active
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2016
- 2016-07-06 JP JP2016134084A patent/JP2016207660A/ja active Pending
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2017
- 2017-10-24 JP JP2017205078A patent/JP6716521B2/ja active Active
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| CN1273697A (zh) * | 1998-07-03 | 2000-11-15 | 伊索沃尔塔奥地利绝缘材料厂股份公司 | 光电模块及其制造方法 |
| WO2005051525A1 (en) * | 2003-11-25 | 2005-06-09 | Polyvalor, Limited Partnership | Permeation barrier coating or layer with modulated properties and methods of making the same |
Also Published As
| Publication number | Publication date |
|---|---|
| JP5968931B2 (ja) | 2016-08-10 |
| US20080102223A1 (en) | 2008-05-01 |
| JP2010508640A (ja) | 2010-03-18 |
| CN103187455A (zh) | 2013-07-03 |
| JP2016207660A (ja) | 2016-12-08 |
| JP2014150063A (ja) | 2014-08-21 |
| WO2008057394A1 (en) | 2008-05-15 |
| TW200832776A (en) | 2008-08-01 |
| TWI514641B (zh) | 2015-12-21 |
| KR20150084893A (ko) | 2015-07-22 |
| JP6716521B2 (ja) | 2020-07-01 |
| KR20090087457A (ko) | 2009-08-17 |
| EP2466665A1 (en) | 2012-06-20 |
| EP2097555A1 (en) | 2009-09-09 |
| JP2018018830A (ja) | 2018-02-01 |
| JP5491186B2 (ja) | 2014-05-14 |
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