CN103178030A - 包括安装在dcb衬底上的分立器件的模块及制造模块的方法 - Google Patents

包括安装在dcb衬底上的分立器件的模块及制造模块的方法 Download PDF

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CN103178030A
CN103178030A CN2012105687938A CN201210568793A CN103178030A CN 103178030 A CN103178030 A CN 103178030A CN 2012105687938 A CN2012105687938 A CN 2012105687938A CN 201210568793 A CN201210568793 A CN 201210568793A CN 103178030 A CN103178030 A CN 103178030A
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discrete device
semiconductor chip
substrate
dcb substrate
dcb
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CN103178030B (zh
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丹尼尔·多梅斯
拉尔夫·奥特伦巴
罗兰·鲁普
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Infineon Technologies AG
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Infineon Technologies AG
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Abstract

本发明涉及一种包括安装在DCB衬底上的分立器件的模块及用于制造该模块的方法，该模块包括DCB衬底以及安装在DCB衬底上的分立器件，其中，分立器件包括：引线框架；安装在引线框架上的半导体芯片；以及覆盖半导体芯片的封装材料。

Description

包括安装在DCB衬底上的分立器件的模块及制造模块的方法
技术领域
本发明涉及一种包括安装在DCB衬底上的分立器件（discrete device）的模块及制造该模块的方法。 
背景技术
在半导体模块中，未封装的半导体芯片（包括集成电路）常常直接安装在DCB（direct copper bonding，直接铜键合）衬底上。由铝制成的键合线（bond wire）用于将半导体芯片的接触垫接合至DCB衬底。由于所述键合线在这种模块的生产和工作过程中易于损坏的事实，所以所述键合线就限制了模块的制造产量和工作时间。 
发明内容
根据本发明的第一方面，提供了一种模块，包括：直接铜键合（DCB）衬底；以及安装在DCB衬底上的分立器件，其中，分立器件包括：引线框架；安装在引线框架上的半导体芯片；以及覆盖半导体芯片的封装材料。 
进一步地，该模块还包括：金属载体，其中，DCB衬底安装在金属载体上；以及壳体，其中，壳体布置在金属载体上并且容纳DCB衬底和分立器件。 
进一步地，该模块还包括金属夹，其中，金属夹的一端附接至DCB衬底，并且金属夹的另一端布置在壳体外部。 
进一步地，金属夹的布置在壳体外部的端部是外部接触元件。 
进一步地，半导体芯片具有第一表面、以及与第一表面相对的第二表面，其中，在第一表面上布置有第一电极，并且在第二表面上布置有第二电极。 
进一步地，半导体芯片包括由碳化硅制成的衬底。 
进一步地，该模块还包括安装在DCB衬底上的另一半导体芯片。 
进一步地，半导体芯片包括由碳化硅制成的半导体芯片，并且另一半导体芯片包括由硅制成的衬底。 
进一步地，该模块还包括嵌入分立器件的硅凝胶层。 
进一步地，该模块还包括沉积在硅凝胶层上的环氧树脂层。 
进一步地，该模块还包括安装在DCB衬底上的另一分立器件。 
进一步地，DCB衬底包括由两个铜层包围的陶瓷层。 
进一步地，半导体芯片是功率MOSFET、IGBT、JFET以及功率双极晶体管中的一者。 
进一步地，分立器件是表面安装器件（SMD）。 
根据本发明的第二方面，提供了一种模块，包括：金属载体；安装在金属载体上的直接铜键合（DCB）衬底；安装在DCB衬底上的表面安装器件（SMD）；壳体，其中，壳体布置在金属载体上并且容纳DCB衬底和 SMD；以及至少一个金属夹，其中，至少一个金属夹的一端附接至DCB衬底，并且至少一个金属夹的另一端布置在壳体外部。 
根据本发明的第三方面，提供了一种用于制造模块的方法，该方法包括：设置包括半导体芯片的分立器件；将分立器件安装在直接铜键合（DCB）衬底上；以及将至少一个金属夹安装在DCB衬底上，其中，至少一个金属夹的一部分是模块的外部接触元件。 
进一步地，分立器件包括电端子，DCB衬底包括结构化铜层，并且将分立器件安装在DCB衬底上包括将分立器件的电端子附接至DCB衬底的结构化铜层。 
进一步地，该方法还包括：将DCB衬底安装在金属载体上；以及在金属载体上放置壳体，其中，壳体容纳DCB衬底和分立器件。 
进一步地，该方法还包括在将分立器件安装在DCB衬底上之前制造分立器件。 
进一步地，制造分立器件包括：设置引线框架；将半导体芯片安装在引线框架上；以及用封装材料覆盖半导体芯片。 
进一步地，该方法还包括在将分立器件安装在DCB衬底上之后用硅凝胶覆盖分立器件。 
进一步地，该方法还包括在硅凝胶层上沉积环氧树脂。 
进一步地，半导体芯片是功率MOSFET、IGBT、JFET以及功率双极晶体管中的一者。 
进一步地，分立器件是表面安装器件（SMD）。 
根据本发明的第四方面，提供了一种方法，该方法包括：设置金属载体；在金属载体上安装直接铜键合（DCB）衬底；在DCB衬底上安装表面安装器件（SMD）；将至少一个金属夹的第一部分附接至DCB衬底；以及在金属载体上放置壳体，壳体容纳DCB衬底和SMD，其中，所述至少一个金属夹的第二部分布置在壳体外部。 
附图说明
包含附图，以提供对实施方式的进一步理解，并且将附图并入本说明书中并构成本说明书的一部分。附图示出了实施方式并且与详细一起用于解释实施方式原理的描述。将易于认识到其它实施方式和实施方式的许多预期优点，因为通过参照以下详细描述它们将变得更加容易理解。附图中的元件并非必须相对于彼此按比例绘制。相似的参考标号表示对应的相似部件。 
图1示意性地示出了包括安装在DCB衬底上的分立器件的模块的一个实施方式的横截面图； 
图2A-图2G示意性地示出了包括将分立器件安装在DCB衬底上、将DCB衬底安装在金属载体上以及将壳体放置在金属载体上的方法的一个实施方式的横截面图； 
图3A-图3F示意性地示出了包括将半导体芯片安装在引线框架上以及用封装材料覆盖半导体芯片以构造分立器件的方法的一个实施方式的横截面图； 
图4示意性地示出了包括安装在DCB衬底上的图3所示的分立器件的模块的一个实施方式的横截面图； 
图5示意性地示出了包括堆叠在彼此的顶部上的两个功率半导体芯片的分立器件的一个实施方式的透视图； 
图6示意性地示出了包括安装在引线框架上的两个功率半导体芯片的分立器件的一个实施方式的横截面图和俯视图；以及 
图7示意性地示出了包括安装在引线框架上的两个功率半导体芯片的分立器件的一个实施方式的横截面图和俯视图。 
具体实施方式
在以下的详细描述中，参照附图，附图构成说明书的一部分，并且在附图中示例性地示出了可以在其中实践本发明的具体实施方式。在这方面，参照所描述的附图的方向来使用例如“顶部”、“底部”、“前面”、“后面”、“在前的”、“后缘的（trailing）”等的方向性术语。由于实施方式的组件可以定位在多个不同方向上，方向性术语仅用于说明的目的并且决不是限制性的。应当理解的是，在不背离本发明的范围的情况下，可以利用其他实施方式，并且可以做出结构或逻辑改变。因此，以下详细描述不应当被认为是限制性的，并且本发明的范围由所附权利要求限定。 
应当理解的是，除非另有特别声明，本文中描述的不同示例性实施方式的特征可以彼此组合。 
正如本描述所使用的，术语“接合（couple）”和/或“电接合（electrically couple）”并不意味着元件必须直接接合在一起；在“接合的”或“电接合的”元件之间可以设置介入元件。 
下面描述包含半导体芯片（特别是功率半导体芯片）的分立的器件。半导体芯片可以是不同的类型，可以通过不同技术制造，并且可以包括，例如集成电的、电光的或电机械的电路或无源器件。集成电路可以设计成，例如逻辑集成电路、模拟集成电路、混合信号集成电路、功率集成电路、存储器电路或集成无源器件。此外，半导体芯片可以构造成所谓的MEMS（微机电系统），并且可以包括例如电桥、膜片或衔铁结构（舌簧结构， tongue structure）的微机械结构。半导体芯片可以构造成传感器或致动器，例如压力传感器、加速传感器、旋转传感器、磁场传感器、电磁场传感器、传声器（麦克风，microphone）等。半导体芯片不需要由例如Si、SiC、SiGe、GaAs的特定半导体材料制造，并且此外，其可以包含不是半导体的无机和/或有机材料，例如，绝缘体、塑料或金属。另外，半导体芯片可以是封装或未封装的。 
特别地，可以包括具有竖直结构的半导体芯片，即，半导体芯片可以构造成使得电流可以在与半导体芯片的正面（main face）垂直的方向上流通。具有竖直结构的半导体芯片在其两个正面上具有电极，即在其顶侧和底侧上。特别地，功率半导体芯片可以具有竖直结构并且在其两个正面上具有负载电极。竖直的功率半导体芯片可以构造成，例如功率MOSFET（金属氧化物半导体场效应晶体管），IGBT（绝缘栅双极晶体管），JFET（结栅场效应晶体管）或功率双极晶体管。例如，功率MOSFET的源极和栅极可以位于一个面上，而功率MOSFET的漏极布置在其它面上。此外，下面描述的器件可以包括用于控制功率半导体芯片集成电路的集成电路。 
半导体芯片具有接触垫（或接触元件或端子），其允许与包括在半导体芯片中的集成电路电接触。接触垫可以包括施加给半导体材料的一个或多个金属层。金属层可以制造成具有任何期望的几何外形以及由任何期望的材料成分。金属层可以是，例如覆盖一片区域的层的形式。可以将任何期望的金属或金属合金，例如铝、钛、金、银、铜、钯、铂、镍、铬或镍钒用作材料。金属层不必要是均质的或仅由一种材料制成，即可以在金属层中包括材料的不同成分和浓度。 
下面描述的器件可以设置成具有两个或更多电端子的分立形式。分立器件的电端子旨在通过，例如焊接连接至DCB衬底。分立器件包括可以安装在引线框架上的一个或多个半导体芯片。引线框架包括裸片垫和引线。裸片垫和引线两者可以形成分立器件的电端子。此外，可以通过将半 导体芯片覆盖以封装材料而将半导体芯片或至少部分半导体芯片封装，所述封装材料可以是电绝缘的并且可以形成封装体。封装材料可以是任何适当的硬质塑料、热塑性塑料或热固性材料或薄片材料（laminate）（半固化片）并且可以包含填充材料。可以采用不同技术用封装材料将半导体芯片封装，例如压模成型、注塑成型、粉料成型、液体成型或层压。 
分立器件安装在DCB（直接铜键合）衬底上。DCB衬底包括陶瓷衬底，例如由氧化铝制成。铜层沉淀在陶瓷衬底的上表面和下表面上。铜层还可以构造成形成导体轨道。 
下面描述的模块包括外部接触元件（或外部接触垫），其可以是任何形状和尺寸。外部接触元件可以从模块外部进入，并且因此可以允许从模块外部与半导体芯片电接触。此外，外部接触元件可以是热传导的，并且用作使由半导体芯片生成的热量消散的散热片。外部接触元件可以由任何期望的导电材料组成，例如由诸如铜、铝或金的金属或金属合金组成。外部接触元件可以由部分金属夹形成。例如焊球或焊接凸点（solder bump）的焊接材料可以沉淀在外部接触元件上。 
每个模块均具有至少一个安装表面。安装表面用作将模块安装到另一个组件上，例如诸如PCB（印刷电路板）的电路板。外部接触元件以及特别是外部接触表面布置在安装表面，从而允许将模块接合至安装模块的组件。焊接沉积，例如焊球或其它适当的连接元件可用于建立模块与安装模块的组件之间的电连接，特别是机械连接。 
图1示意性地示出了模块10的横截面图。模块10包括金属载体11、安装在金属载体11上的DCB衬底12以及安装在DCB衬底12上的分立器件13。此外，金属夹14、15安装在DCB衬底12上，并且壳体16放置在容纳DCB衬底12和分立器件13的金属载体11的上方。金属夹14、15的表面17、18用作外部接触元件。 
图2A-图2G（统称图2），示意性地图示了如图2G所示的模块20的制造方法的实施方式。 
图2A示意性地图示了DCB衬底21。DCB衬底21包括陶瓷衬底22，陶瓷衬底22由例如氧化铝制成。铜层23、24分别沉积在陶瓷衬底22的上表面和下表面上。至少陶瓷衬底22的上表面上的铜层23构造成使得所述铜层23被分成彼此电绝缘的铜垫。 
图2B示意性地图示了安装在铜层23的铜垫上的分立器件25、金属夹26以及半导体芯片27。在将分立器件25安装在DCB衬底21上之前，分立器件25已预制。在一个实施方式中，在将分立器件25安装在DCB衬底21上之前，分立器件25已被测试。分立器件25包括封装的半导体芯片28（其是功率半导体芯片），并且在半导体芯片28下表面具有第一接触垫29以及在半导体芯片28上表面具有第二接触垫30。在一个实施方式中，第一接触垫29和第二接触垫30是负载电极，而未在图2B中示出的用作控制电极的第三接触垫布置在半导体芯片28的上表面上。半导体芯片28安装在引线框架9上，其中，第一接触垫29面向引线框架9。金属夹31的一端附接至第二接触垫30。封装材料32覆盖半导体芯片28、引线框架9以及金属夹31的至少一部分。金属夹31的另一端（未附接至第二接触垫30）以及引线框架9的下表面构成分立器件25的端子，这些端子用于将分立器件25电地或机械地接合至铜层23。 
金属夹26具有附接至铜层23的端部33以及随后用作外部接触元件的端部34。金属夹26由适当的金属或金属合金（例如铜或铝）制成。 
半导体芯片27是未封装的，并且直接放置在铜层23上。半导体芯片27的上表面上具有接触垫35。半导体芯片27粘合至铜层23。 
在一个实施方式中，分立器件25和金属夹26通过扩散焊接而电地并且机械地接合至DCB衬底21。为此，在分立器件25的端子和金属夹26 的端部33上沉积焊接材料。在一个实施方式中，所述焊接材料由AuSn、AgSn、CuSn、Sn、AuIn、AgIn、AuSi或CuIn组成。 
在一个实施方式中，DCB衬底21与分立器件25和金属夹26一起放置在炉中加热至适当温度，从而使焊接材料熔化。在焊接过程中，分立器件25和金属夹26可以被按压在DCB衬底21上。焊接材料随后在分立器件25的端子、金属夹26与铜层23的垫之间形成金属接头，由于如下事实所述金属接头能够经受高温：焊接材料与分立器件25的端子、金属夹26以及铜层23的难熔材料形成耐高温并且具有高机械稳定性的金属间相。该金属间具有比用来生成该金属间相的焊接材料更高的熔点。在此过程中，低熔点焊接材料完全转化，即其完全变为金属间相。 
图2C示意性地图示了将半导体芯片27的接触垫35电接合至铜层23的垫的键合线40。 
图2D示意性地图示了金属载体41。为了机械稳定性和散热，例如通过将铜层24焊接至金属载体41的上表面，将DCB衬底21安装在金属载体41上。在模块20运行过程中，金属载体41可以将热损失转移至冷却系统。金属载体41由例如铜的适当的金属或金属合金制成。 
图2E示意性地图示了壳体42，其放置在金属载体41上，并且容纳DCB衬底21、分立器件25以及半导体芯片27。壳体42具有开口43，开口43使得金属夹26的上端34能够位于壳体42的外面，上端34在壳体42的外面可以用作外部接触元件。壳体42可以由塑料制成。 
图2F示意性地图示了硅凝胶44，其沉积在DCB衬底21上，并且覆盖分立器件25、金属夹26的下部、半导体芯片27以及键合线40。 
图2G示意性地图示了沉积在硅凝胶44上的环氧树脂45。 
如图2G所示的模块20仅包括一个分立器件25。在一个实施方式中，类似于器件25的更多的分立器件安装在DCB衬底21上。包括在这些分立器件中的一个或多个半导体芯片由碳化硅（SiC）衬底制成。此外，类似于半导体芯片27的其它的未封装的半导体芯片可以直接附接至DCB衬底21。在一个实施方式中，分立器件中包含的所有半导体芯片都由碳化硅衬底制成，并且直接安装在DCB衬底21上的所有未封装的半导体芯片都由硅衬底制成。在一个实施方式中，模块20中仅含有分立器件，并且没有未封装的半导体芯片直接安装在DCB衬底上。 
图2G中示出了用作外部接触元件的仅一个金属夹26。然而显然的是，可以设置类似金属夹26的更多的金属夹，这些金属夹附接至铜层23并且部分位于壳体42的表面46处以用作外部接触元件，从而使得能够接入模块20中包含的分立器件和半导体芯片。表面46可以用作将模块20安装到另一组件（例如诸如PCB（印刷电路板）的电路板）上的安装表面。 
由于功率半导体芯片28包含在分立器件25中，所以不必使用键合线将功率半导体芯片28接合至DCB衬底21。这增加了模块20的制造产量和运行时间。此外，就传导状态损耗和开关损耗而言，金属夹31改善了分立器件25的性能。另外，如果在分立器件25内使用键合线，器件25的稳定性和性能得以改善，对于小于10mm2小的芯片面积和细于100μm的键合线而言尤其是这样。 
显然，可以将除了图2G中所示的分立器件25以外的其它的分立器件安装在DCB衬底21上。图3A-3F示意性地图示了制造如图3F所示的器件30的方法的一个实施方式的横截面图，所述器件30可以包含在类似于模块20的模块中。 
图3A示意性地图示了在俯视图（上部）中、在沿着俯视图中绘出的线A-A'截取的横截面图（中间）中、以及在沿着俯视图中绘出的线B-B'截取的横截面图（底部）中的引线框架190。引线框架190包括多个裸片 垫200，在图3A中示出了所述多个裸片垫中的仅一个。各裸片垫都分配有三个引线210、220以及230（或更多引线）。引线210、220以及230可以大体平行地从裸片垫200的一侧突出。引线210与裸片垫200的一侧是连接的。裸片垫200与引线210、220以及230通过坝（dam）（连杆）连接在一起，为了清晰起见，所述坝未在图3A中示出。如图3A的横截面图所示，引线210、220以及230布置在不同于裸片垫200的平面中，但是可替换地，可以布置在相同平面中。 
引线框架190由金属或金属合金（特别是由铜、铜合金、铁镍、铝、铝合金）或其它导电材料制造。此外，引线框架190可以镀有导电材料，例如铜、银、铁镍或镍磷。引线框架190的形状不限于任何尺寸或几何形状。例如，引线框架190可以具有在100μm到1mm范围内的厚度或者甚至可以更厚。引线框架190可以通过对金属板进行冲孔、铣削或冲压金属板而已经制造好了。 
图3B示意性地图示了安装在裸片垫200上的功率半导体芯片100。更多的半导体芯片（也可以是功率半导体芯片）可以安装在引线框架190的更多的裸片垫（未在图3B中示出）上。半导体芯片可能已制造在由半导体材料制成的晶片上（特别地，已制造在相同的晶片上），但是可替换地，可以制造在不同的晶片上。此外，半导体芯片可以是物理上相同的，但是也可以包含不同的集成电路。 
功率半导体芯片100安装在裸片垫200上，功率半导体芯片100的第一表面130朝着裸片垫200。功率半导体芯片100在第一表面130上具有第一电极110并且在第二表面140上具有第二电极120。第一电极110和第二电极120是负载电极。此外，功率半导体芯片100在其第二表面140上具有第三电极150。第三电极150是控制电极。 
在一个实施方式中，功率半导体芯片100构造为功率晶体管，例如功率MOSFET、IGBT、JFET或功率双极晶体管。在功率MOSFET或JFET 的情况下,第一负载电极110是漏极电极，第二负载电极120是源极电极，并且控制电极150是栅极电极。在IGBT的情况下，第一负载电极110是集电极，第二负载电极120是发射极，并且控制电极150是栅极电极。在功率双极晶体管的情况下,第一负载电极110是集电极，第二负载电极120是发射极，并且控制电极150是基电极。在运行过程中，可以在负载电极110与120之间施加高达5V、50V、100V、500V或1000V或者甚至更高的电压。施加给控制电极150的开关频率可以在1kHz到100MHz的范围内，但是也可以超出这个范围。 
第一电极110可以通过扩散焊接电接合至裸片垫200。为此，通过可以例如溅射或其它合适的物理或化学沉积方法，将焊接材料沉积在第一电极110上或裸片垫200的上表面（未示出）上。焊接材料的厚度可以在100nm至10μm范围内，特别地在1至3μm范围内。在焊接操作过程中，焊接材料扩散到毗邻材料中，这使得在功率半导体芯片100与裸片垫200之间的界面处形成金属间相。所述焊接材料可以由，例如AuSn、AgSn、CuSn、Sn、AuIn、AgIn、AuSi或CuIn组成。 
代替扩散焊接工艺，可以使用其它连接技术（例如软钎焊接或者利用导电粘结剂的粘合剂接合）将功率半导体芯片100附接至裸片垫200。当使用软钎焊接工艺将功率半导体芯片100与裸片垫200彼此连接时，在焊接工艺已结束之后，焊接材料残留在功率半导体芯片100与裸片垫200之间的界面处。在粘合剂粘合的情况下，可以使用导电粘合剂，该导电粘合剂可以基于填充的或未填充的聚酰亚胺、环氧树脂、丙烯酸树脂、有机硅树脂或者它们的混合物，并且可以添加金、银、镍或铜以产生导电性。 
图3C示意性地图示了放置在功率半导体芯片100和引线220上方的金属夹160。金属夹160由300、310以及320三个部分组成，它们在图3C中由虚线表示。部分300与功率半导体芯片100和引线框架190的上表面平行地延伸。部分310和320实质上与部分300垂直地延伸。部分310的一端具有接触表面330，接触表面330附接至功率半导体芯片100的第 二电极120。部分320的一端具有接触表面340，接触表面340附接至引线220的上表面。 
金属夹160由金属或金属合金（特别是由铜、铜合金、铁镍、铝、铝合金）制造，或由其它导电材料制造。在一个实施方式中，金属夹160可以镀有导电材料，例如铜、银、铁镍或镍磷。金属夹160的形状不限于任何尺寸或几何外形。金属夹160可以具有如图3C中示例性示出的形状，但是任何其它形状也是可能的。金属夹160的厚度可以在100μm至几毫米的范围内的厚度或者可以甚至更厚。金属夹160可以通过冲压、冲孔、压合、切削、锯、铣削或任何其它适当的技术制造。 
金属夹160可以以与半导体芯片100附接至裸片垫200类似的方式附接至功率半导体芯片100和引线220。例如，可以采用扩散焊接、软钎焊接或者利用导电粘附剂的粘附剂接合。 
图3D示意性地图示了附接至引线230和功率半导体芯片100的控制电极150的键合线350。例如，可以使用球形键合（ball bonding）或楔形键合作为生产键合线350的互连技术。 
图3E示意性地图示了这样的封装材料360：其将器件30的任何部分封装，但是至少保留金属夹160的上表面180以及引线210、220和230的部分是未覆盖的。此外，裸片垫200部分未由封装材料360覆盖，特别地，是裸片垫200的底部表面。封装材料360的顶部表面与金属夹160的顶部表面180一起形成一个平面。可以进行模具转印（mold transfer）过程，从而使用作为封装材料360的模具材料来封装布置在引线框架190上的组件。 
所述模具材料可以由任何适当的热塑性材料或热固性材料构成，特别地，其可以由在现代半导体封装技术中通常使用的材料构成。可以采用各 种技术（例如压模成型、注塑成型、粉末成型或液体成型）来覆盖器件30的组件。 
在利用模具材料封装之前或之后，通过将引线框架190分隔（例如通过锯或切割引线框架190的坝）而使单个器件30彼此分隔。也可以采用其它分隔方法，例如蚀刻、铣削、激光烧蚀或冲压。 
图3F示意性地图示了引线210、220和230以S形的方式弯曲，从而形成如图3F所示的台阶。可以在例如修剪和形成过程中进行引线210、220和230的弯曲。在一个实施方式中，在金属夹160的方向上弯曲引线210、220和230的端部。引线210、220和230的弯曲使得它们的顶部表面240、250和260分别布置在平面270中（在图3F中由虚线示出），所述平面270由金属夹160的露出表面180和（特别地）封装材料360的顶部表面限定。金属夹160的露出表面180的表面面积可以设置为比引线210的表面240的接触面积大，所述金属夹160电接合至功率半导体芯片100的电极120，所述引线210电接合至功率半导体芯片100的电极110。 
金属夹160和引线210、220以及230用作器件30的电端子。金属夹160的表面180、以及引线210、220和230的表面240、250和260用于将器件30电接合至其它组件，例如，如下所述的DCB衬底。 
图4示意性地图示了包含图3F中所示分立器件30的模块50的横截面图。模块50包括具有陶瓷衬底22和铜层23、24的DCB衬底21，其中，至少上铜层23被结构化。器件30安装在铜层23上，使得引线210、220、230与铜层23的不同的铜垫电接触。此外，DCB衬底21安装在金属载体41上，并且壳体42放置在容纳DCB衬底21和分立器件30的金属载体41的上方。金属夹26附接至铜层23并且穿过壳体42中的开口43延伸至壳体42的上表面，金属夹26的上端34在壳体42的上表面用作外部接触元件。所述外部接触元件允许电接入（electrical access）至引线210、220和230。 
显然，在图2G和图4中示出的分立器件25和分立器件30仅仅是能够集成到模块20和50内的分立表面安装器件（SMD）的例子。通常，其它分立表面安装器件可以集成到模块20和50中。这样的分立器件的例子在图5-图7中示出。 
图5示意性地图示了器件500的透视图，所述器件包括裸片垫501，引线502-506，功率半导体芯片507、508，金属夹509、510以及键合线511、512。功率半导体芯片507安装在裸片垫501上，功率半导体芯片507的漏极电极面向裸片垫501。金属夹510将功率半导体芯片507的源极电极515电接合至引线503，并且键合线511将功率半导体芯片507的栅极电极516电接合至引线506。功率半导体芯片508放置在金属夹510的上方，功率半导体芯片508的漏极电极面向金属夹510。功率半导体芯片508的源极电极513通过金属夹509电接合至引线504，并且功率半导体芯片508的栅极电极514通过键合线512电接合至引线502。裸片垫501和引线505制成一体。裸片垫501和功率半导体芯片507、508由模具材料封装，该模具材料未在图5中示出。 
图6示意性地图示了器件600的俯视图（顶部）和沿着器件600的俯视图中所绘的线A-A'获得的横截面图（底部）。器件600包括裸片垫601、602，引线603-605，功率半导体芯片606、607，金属层608-611以及模具材料612。功率半导体芯片606、607分别安装在裸片垫601、602上，它们的漏极电极分别面向裸片垫601、602。金属层608、610将功率半导体芯片606的源极电极613和栅极电极614分别电接合至裸片垫602和引线603。金属层609、611将功率半导体芯片607的源极电极615和栅极电极616分别电接合至引线605、604。模具材料612覆盖功率半导体芯片606、607。在一个实施方式中，通过电流沉积法沉积金属层608-611。在一个实施方式中，金属层608-611是金属夹。 
图7示意性地图示了器件700的俯视图（顶部）和沿着器件700的俯视图中所绘的线A-A'获得的横截面图（底部）。器件700包括裸片垫701、 702，引线703-710，功率半导体芯片711、712，金属夹713，键合线714、715以及模具材料716。功率半导体芯片711、712分别安装在裸片垫701、702上，功率半导体芯片711、712的漏极电极717、718分别面向裸片垫701、702。金属夹713将功率半导体芯片711、712的源极电极719、720电接合至引线708、709。键合线714、715将功率半导体芯片711、712的栅极电极721、722电接合至引线707、710。模具材料716覆盖功率半导体芯片711、712。裸片垫701和引线703、704制成一体。裸片垫702和引线705、706制成一体。引线708、709制成一体。 
此外，虽然已关于几个实施方式中的仅一个公开了本发明的一个实施方式的特定特征或方面，这样的特征或方面可以与其他实施方式的一个或多个其它功能或方面结合，这种结合对于任何给出或特定的应用是期望的且有利的。此外，就在详细描述或权利要求中使用的术语“包括（include）”、“具有（have）”、“具有（with）”或它们的其它变型的程度而言，这样的术语旨在是包含性的，类似于术语“包括（comprise）”。此外，应当理解的是，本发明的实施方式可以在分立电路、部分集成电路或完全集成电路或可编程装置中实施。而且，术语“示例性的”仅仅意味着作为例子，而并非最好的或最优的。应当认识到的是，为了简便易懂起见，本文中描绘的特征和/或元件示出了相对彼此的特定尺寸，它们的实际尺寸可能与本文中示出的尺寸具有很大不同。 
虽然本文中已示出和描述了具体实施方式，本领域的普通技术人员应当认识到的是，在不背离本发明的范围的情况下，示出和描述的具体实施方式可以由各种替换的和/或等同的实施替代。本发明旨在覆盖本文中所讨论的具体实施方式的任何修改或变化。因此，本发明旨在仅由权利要求及其等同物限定。 

Claims (25)

1.一种模块，包括：
直接铜键合（DCB）衬底；以及
安装在所述DCB衬底上的分立器件，其中，所述分立器件包括：
引线框架；
安装在所述引线框架上的半导体芯片；以及
覆盖所述半导体芯片的封装材料。
2.根据权利要求1所述的模块，还包括：
金属载体，其中，所述DCB衬底安装在所述金属载体上；以及
壳体，其中，所述壳体布置在所述金属载体上并且容纳所述DCB衬底和所述分立器件。
3.根据权利要求2所述的模块，还包括金属夹，其中，所述金属夹的一端附接至所述DCB衬底，并且所述金属夹的另一端布置在所述壳体外部。
4.根据权利要求3所述的模块，其中，所述金属夹的布置在所述壳体外部的端部是外部接触元件。
5.根据权利要求1所述的模块，其中，所述半导体芯片具有第一表面、以及与所述第一表面相对的第二表面，其中，在所述第一表面上布置有第一电极，并且在所述第二表面上布置有第二电极。
6.根据权利要求1所述的模块，其中，所述半导体芯片包括由碳化硅制成的衬底。
7.根据权利要求1所述的模块，还包括安装在所述DCB衬底上的另一半导体芯片。
8.根据权利要求7所述的模块，其中，所述半导体芯片包括由碳化硅制成的衬底，并且所述另一半导体芯片包括由硅制成的衬底。
9.根据权利要求1所述的模块，还包括嵌入所述分立器件的硅凝胶层。
10.根据权利要求9所述的模块，还包括沉积在所述硅凝胶层上的环氧树脂层。
11.根据权利要求1所述的模块，还包括安装在所述DCB衬底上的另一分立器件。
12.根据权利要求1所述的模块，其中，所述DCB衬底包括由两个铜层包围的陶瓷层。
13.根据权利要求1所述的模块，其中，所述半导体芯片是功率MOSFET、IGBT、JFET以及功率双极晶体管中的一者。
14.根据权利要求1所述的模块，其中，所述分立器件是表面安装器件（SMD）。
15.一种模块，包括：
金属载体；
安装在所述金属载体上的直接铜键合（DCB）衬底；
安装在所述DCB衬底上的表面安装器件（SMD）；
壳体，其中，所述壳体布置在所述金属载体上并且容纳所述DCB衬底和所述SMD；以及
至少一个金属夹，其中，所述至少一个金属夹的一端附接至所述DCB衬底，并且所述至少一个金属夹的另一端布置在所述壳体外部。
16.一种用于制造模块的方法，所述方法包括以下步骤：
设置包括半导体芯片的分立器件；
将所述分立器件安装在直接铜键合（DCB）衬底上；以及
将至少一个金属夹安装在所述DCB衬底上，其中，所述至少一个金属夹的一部分是所述模块的外部接触元件。
17.根据权利要求16所述的方法，其中，所述分立器件包括电端子，所述DCB衬底包括结构化铜层，并且将所述分立器件安装在所述DCB衬底上包括将所述分立器件的所述电端子附接至所述DCB衬底的所述结构化铜层。
18.根据权利要求16所述的方法，还包括：
将所述DCB衬底安装在金属载体上；以及
在所述金属载体上放置壳体，其中，所述壳体容纳所述DCB衬底和所述分立器件。
19.根据权利要求16所述的方法，还包括在将所述分立器件安装在所述DCB衬底上之前制造所述分立器件。
20.根据权利要求19所述的方法，其中，制造所述分立器件包括：
设置引线框架；
将所述半导体芯片安装在所述引线框架上；以及
用封装材料覆盖所述半导体芯片。
21.根据权利要求16所述的方法，还包括在将所述分立器件安装在所述DCB衬底上之后用硅凝胶覆盖所述分立器件。
22.根据权利要求21所述的方法，还包括在所述硅凝胶层上沉积环氧树脂。
23.根据权利要求16所述的方法，其中，所述半导体芯片是功率MOSFET、IGBT、JFET以及功率双极晶体管中的一者。
24.根据权利要求16所述的方法，其中，所述分立器件是表面安装器件（SMD）。
25.一种方法，包括以下步骤：
设置金属载体；
在所述金属载体上安装直接铜键合（DCB）衬底；
在所述DCB衬底上安装表面安装器件（SMD）；
将至少一个金属夹的第一部分附接至所述DCB衬底；以及
在所述金属载体上放置壳体，其中，所述壳体容纳所述DCB衬底和所述SMD，并且其中，所述至少一个金属夹的第二部分布置在所述壳体外部。
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