CN1790697A - 强大的功率半导体封装 - Google Patents

强大的功率半导体封装 Download PDF

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Publication number
CN1790697A
CN1790697A CNA2005101199028A CN200510119902A CN1790697A CN 1790697 A CN1790697 A CN 1790697A CN A2005101199028 A CNA2005101199028 A CN A2005101199028A CN 200510119902 A CN200510119902 A CN 200510119902A CN 1790697 A CN1790697 A CN 1790697A
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power semiconductor
described power
terminal
binding post
electrode
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CN1790697B (zh
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弗朗西斯·J·卡尔尼
杰弗里·皮尔斯
斯蒂芬·St·日尔曼
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Semiconductor Components Industries LLC
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Semiconductor Components Industries LLC
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Abstract

一种功率半导体封装,包括具有至少一个第一端子,第二端子和第三端子的引线框。该封装还包括具有界定了第一电流承载电极的底面和其上安装了界定第二电流承载电极的第一金属化区域和界定控制电极的第二金属化区域的顶面,该底面结合于引线框,以便第一端子能够电气连接于第一电流承载电极。接线柱也结合于界定了第二电流承载电极的第一金属化区域,并结合于第二端子,以便其能够电气连接于第二电流承载电极。

Description

强大的功率半导体封装
技术领域
本发明大体涉及一种功率半导体封装,更具体地说,涉及一种当功率半导体管芯控制电极通过一个带状连接电气结合于引线框时,承载功率半导体管芯电流的电极在其内部通过一个接线柱(clip)电气结合于引线框的功率半导体封装(如,SO8或QFN)。
背景技术
参照图1和图2,显示了根据现有技术如在美国专利6,040,626中提出的半导体封装10。该半导体封装10包括了底板部分13及端子12a,12b和18。半导体管芯16包括界定了半导体管芯16顶面第一连接区的第一金属化区域19(以铝为代表),和界定了半导体管芯16顶面第二连接区的第二金属化区域15(以铝为代表)。端子12a,12b和18的部分、底板13及半导体管芯16均封装在一般由压模材料形成的外壳22中。
为了取得第一金属化区域19与端子12b之间的电气连接,接线柱17连接于第一金属化区域19的一端17a及端子12b的远端17b。接线柱17一般由相当坚硬的铜制成,并对于焊料连接或导电环氧连接而言可选地镀银。第二金属化区域15与端子12a之间的电气连接是通过将丝焊连接14的一端14a与第二金属化区域15、及丝焊连接14的一端14b与端子12a超声连接而形成的。
为了保证半导体器件的最佳电性能,需要大量减小通过功率半导体封装的电流路径中的电阻及电感;为了增加散热以保证提高的功率效力,也需要最小化或减少总台面23的面积及半导体封装10的厚度24。不幸的是,依据现有技术制成的半导体封装并不能完全实现这些目标,因为,除了别的情况之外,金属化区域或栅极接触15的面积必须足够大,以允许连接丝焊连接14,然而,如下将示,这样反而有害地减小了金属化区域或源极接触19的面积。
如该领域中所熟知的,丝焊连接14通常包括为连接棚极接触15而在丝焊连接14的一端14a上形成丝焊连接球,并包括为连接端子12a而在丝焊连接14的一端14b上形成的丝焊缝合处。大体来说,决定其面积的栅极接触15的尺寸通常选定为丝焊连接14直径的大约五倍,而丝焊连接球大约是丝焊连接14直径的大约三倍。由于丝焊连接14的直径变小了,比如减小到一百二十五微米(“microns”)以下的范围内,丝焊连接会变得脆弱,难以形成或操作,需要更昂贵的制造设备,并难以承受震动及机械应力,这样就增加了电气连接和该器件不需要的失效。即便在现在认为是实用的低成本丝焊直径限度下,其中使用比如五十微米的直径(由于至少上述脆弱性,可靠性及成本考虑,小于五十微米被认为不实用),仍然需要一个面积大约为六万两千五百平方微米(长五乘五十微米,宽五乘五十微米)的相当大的金属栅极接触15。因此,在一个大约长五千微米,宽五千微米的管芯上可为金属化区域或金属源极连接19提供的面积就大约是一千七百零六万两千五百平方微米(允许大约五百微米的间隙,比如在金属接触与管芯边缘之间)或者是可提供的管芯面积的约百分之六十八。因此,由于需要减小管芯的面积或尺寸,而对于实际目的,丝焊棚极接触的尺寸固定在约六万两千五百平方微米或稍大一些,金属源极区域需要相应地减小。
大接线柱17被使用以保证比如由大源极电流Is引起的高功率操作,并提高散热。此外,大接线柱17希望降低电阻和电感。大接线柱17需要大的金属面积以形成合适的连接。因此,由于金属源极区域是最大的发热源或需要从管芯上散去的热源,找到为特定管芯大小而将金属源极区域最大化的方法,是提高额定功率并制造更小的封装半导体器件的必要条件。
另外,甚至当使用比如直径为五十微米的小丝焊连接14时,半导体封装24的厚度24必须足够大,以保证丝焊连接14的高度WBH能被模制化合物22所覆盖。不幸的是,丝焊连接高度WBH对于通过使用最小的模制化合物覆盖管芯来减小封装半导体器件的高度24以额外增加来自于管芯的散热具有限制作用。
根本来说,需要安装功率半导体封装的台面(footprint)23的面积在某种程度上也受限于金属化区域或金属源极接触19和金属化区域或金属栅极接触15的面积,因为管芯越小,台面就越小。如上所示,金属栅极接触15的面积是相当固定的,因此,管芯尺寸的进一步缩小对减小金属源极连接19十分不利,而这对于电气及热性能,进而对额定功率都有很重要的作用。
因此,由于未来对具有更高功率及热操作要求的越来越小的管芯的需求,与减小金属源极面积相关的问题将进一步突出。
因而,需要一种在保证低生产成本的同时,具有小台面,强电流和散热能力,及高可靠性的功率半导体器件和封装。
附图说明
图1显示了依据现有技术制造的半导体封装的透视图;
图2显示了图1中半导体封装的详细透视图;
图3是一种新型功率半导体封装的透视图;及
图4是图3中新型半导体封装的详细透视图。
具体实施方式
在下列图中,具有同样参考数字的元件具有相似的功能性。
图3和图4显示了一种新型功率半导体封装100。封装100显示在一个SO8构造中。在一个替代的实施例(未示出)中,封装100可以由本领域人员构造为QFN封装。该半导体封装或器件100包括具有底板部分130和端子120a,120b和180的引线框。在一个实施例中,端子120a或120b中至少有一个与端子180共面。半导体管芯160包括在该半导体管芯160顶面界定第一连接区域的第一金属化区域或电流承载电极190(通常是可焊的顶层金属,铝之类),及在该半导体管芯160顶面界定第二连接区域的第二金属化区域或控制电极150(通常是可焊的顶层金属,铝之类)。半导体管芯160包括第三金属化区域或电流承载电极(一般是背面金属等),其界定半导体管芯160底面上的第三连接区或漏。功率半导体管芯或器件160包括场效应晶体管(FET),金属氧化物半导体场效应晶体管(MOSFET),绝缘栅双极晶体管(IGBT),双极结型晶体管(BJT)和晶闸管。第三金属化区域电耦合于底板部分130和端子180。底板部分130,端子180,120a和120b被包含在经常称为引线框的235中。
一个实施例中,半导体管芯通过焊接电气地且机械地结合于底板部分130。一个实施例中,形成的半导体管芯160长宽约五千微米,形成的第一金属化区域或源极190具有约一千七百万二百和二千万(two hundred and twentymillion)平方微米的面积,形成的第二金属化区域150或栅极具有约一万六千八百七十五平方微米的面积(像以前一样保证了约五百微米的间隙)。端子120a,120b,180的部分,底板130及半导体管芯160都封在通常由可模制材料(如塑料)制成的外壳220中。为了在第一金属化区域190与端子120b之间形成电气连接,接线柱170的一端170a被连接于第一金属化区域190上,远端170b与端子120b连接。接线柱170通常是一个由铜制成的刚性片,并可以镀银。接线柱170是通过使用拾取和放置设备进行安装的。一个实施例中,形成的接线柱170具有约一百二十五微米的厚度及约两千五百微米的宽度,并通过接线柱170焊接至第一金属化区域和端子120b,来机械和电气耦连,或替换地使用安装于接线柱与第一金属化区域之间的可固化导电材料层。
第二金属化区域150与端子120a之间的电气连接是通过将带状连接140的一端140a与第二金属化区域150,及带状连接140一端140b与端子120a超声连接而形成的。
带状连接140指的是一条长方形挠性导线,该带状连接140的宽度Rw大于该带状连接的厚度RTH。从侧面观察,该带状连接140的挠性性质可由一个波状剖面显现出来,尽管该性质在更短的跨度中或在组装情况下可能不容易用肉眼观察到。带状连接140的材料包括金,铝,银,钯和铜。一个实施例中,形成的带状连接140具有约二十五微米的厚度和约七十五微米的宽度。带状连接140的材料通常做成约六到五十微米的厚度,约五十到一千五百微米的宽度。不像丝焊连接14,由于带状连接140变得更小了,比如在约七十五微米宽,二十五微米厚以下的范围内,带状连接140保持了很高的机械强度,具有较低的环状高度WBH,更便于形成和控制,并且较同等面积的丝焊连接14,更不易受冲击和机械应力的影响,因而减少了电气连接和该器件所不期望的且代价高昂的失效。
带状连接140的连接通常包括一端140a与栅极接触150的楔形连接和一端14b与端子120a的楔形连接。大体来说,栅极接触150的面积通常选定为带状连接的三倍宽,三倍厚,因为不像对丝焊连接面积的要求,带状连接面积可以在不牺牲可制造性、可靠性或强度的情况下更小。因此,带状连接140减少了要求的金属栅极接触150的尺寸。
比如,在一个五十微米的丝焊连接被具有相同横截面积、二十五微米厚RTH、七十五微米宽RW的带状连接所代替的实施例中,需要约一万六千八百七十五平方微米的栅极焊盘面积,或比所需同等横截面积丝焊连接小约百分之七十五的栅极焊盘。因此,通过上述栅极焊盘面积的减小,可以在不增加管芯面积,从而不需要更高功率集成电路封装台面230的情况下,相应增加金属源极面积(比如,增加约十五万八千平方微米)。
提供的更大的金属源极连接190可以保证功率集成电路封装100的更高功率效力,并提高了散热。此外,更大的接线柱170也按需要降低了电阻和电感。
另外,对于丝焊连接14的环状高度RBH来说,带状连接140减小了环状高度WBH至少三倍,因此能够使封装100的厚度240明显小于封装10的厚度。在一个实施例中,形成的带状连接140具有约五十微米的环状高度。
而且,由于需要安装功率半导体封装的台面230的面积某种程度上由金属化区域或金属源极连接190的面积和金属化区域或金属栅极接触150的面积决定,功率半导体封装100可以在不牺牲性能的情况下,比现有技术制造丝焊连接的棚极/源极接线柱形式更小。
对于本发明,前面的表述已经达到了说明和描述的目的。本发明并不是毫无遗漏或是完全局限于前面所述的形式。根据上述原理,可能能够做出许多修改和改变。本发明的范围并不受限于该详细描述,而受限于所附加的关于此发明的权利要求书。因此,已经显示了一种在保证低生产成本的同时,具有小台面,强电流和散热能力,及高可靠性的新型功率半导体器件和封装。

Claims (27)

1.一种功率半导体封装,包括:
引线框,具有底板部分和至少一个从底板部分延伸出的第一端子;至少一个与第一端子共面的第二端子;
第三端子;
功率半导体管芯,其具有界定了第一电流承载电极的底面,和其上安装了界定第二电流承载电极的第一金属化区域和界定控制电极的第二金属化区域的顶面,该底面结合于引线框的底板,以便第一端子与第一电流承载电极电气连接;
结合于界定了第二电流承载电极的第一金属化区域和至少一个第二端子、以便与第二电流承载电极形成电气结合的接线柱;及
将控制电极与第三端子相结合、以增加第一金属化区域面积的带状连接。
2.权利要求1所述的功率半导体封装,进一步包括安装于接线柱与第一金属化区域之间、以便该接线柱能牢固结合于第二电流承载电极的焊料层。
3.权利要求1所述的功率半导体封装,其中的接线柱包括顶面和底面,该底面具有向引线框延伸的方向向下的突出部分。
4.权利要求3所述的功率半导体封装,进一步包括设置于接线柱与第二电流承载电极之间的可固化导电材料层。
5.权利要求4所述的功率半导体封装,其中的可固化导电材料是填充银的环氧树脂。
6.权利要求1所述的功率半导体封装,进一步包括设置于接线柱远端和所述至少一个第二端子之间的焊料层。
7.权利要求1所述的功率半导体封装,其中的功率半导体管芯包括MOSFET功率半导体管芯,且其中的第二电流承载电极包括源极区域。
8.权利要求1所述的功率半导体封装,其中形成的带状连接具有小于七十五微米的宽度。
9.权利要求1所述的功率半导体封装,其中形成的带状连接具有小于二十五微米的厚度。
10.权利要求1所述的功率半导体封装,其中带状连接是选自由金,铜,银,钯和铝组成的组中的一种金属构成。
11.权利要求1所述的功率半导体封装,其中的封装的大小和形状都与S08封装结构相一致。
12.权利要求1所述的功率半导体封装,其中封装包括基本上包封底部引线框,半导体管芯和接线柱的塑料外壳。
13.一种功率半导体封装,包括:
引线框,具有底板部分和至少一个从底板部分延伸出的第一端子;至少一个与第一端子共面的第二端子;
MOSFET管芯,具有在其上安装了界定源极的第一金属化区域和界定栅极的第二金属化区域的顶面,该MOSFET管芯进一步包括了底面,该底面界定了结合于引线框底板的漏极连接,以便第一端子与该漏极电气连接;
接线柱,结合于界定了源极连接的第一金属化区域,并结合于至少一条第二导线,以便其电气结合于源极;和将栅极结合于第三端子的带状连接。
14.权利要求13所述的功率半导体封装,其中接线柱通过焊料层连接。
15.一种功率半导体器件,包括:
引线框,具有底板部分和至少一条从底板部分延伸出的第一导线;
至少一条与第一端子共面的第二导线;
第三导线;
功率半导体管芯,具有界定了第一电流承载电极连接的底面和其上设置了界定第二电流承载电极的第一金属化区域和界定控制电极的第二金属化区域的顶面,该底面结合于引线框的底板,以便第一导线电气连接于第一电流承载电极;
结合于界定了第二电流承载电极的第一金属化区域和至少一条第二导线、以便于其电气结合于第二电流传导电极的接线柱;及
将控制电极结合于第三导线的带状连接。
16.权利要求15所述的功率半导体器件,其中接线柱包括顶面和底面,该底面具有向引线框延伸的方向向下的突出部分。
17.权利要求15所述的功率半导体器件,进一步包括了设置在接线柱和第二电流承载电极之间的可固化导电材料层。
18.权利要求17所述的功率半导体器件,其中的可固化导电材料是填充银的环氧树脂。
19.权利要求15所述的功率半导体器件,进一步包括设置在接线柱和第一金属化区域之间、以便接线柱能够牢固结合于第二电流承载电极的焊料层。
20.权利要求15所述的功率半导体器件,其中的功率半导体管芯包括MOSFET功率半导体管芯。
21.权利要求16所述的功率半导体器件,其中形成的带状连接具有小于七十五微米的宽度。
22.权利要求16所述的功率半导体器件,其中形成的带状连接具有小于二十五微米的厚度。
23.权利要求16所述的功率半导体器件,其中形成的带状连接是由选自金,铜,钯,银和铝组成的组中的一种金属形成。
24.权利要求15所述的功率半导体器件,其中的功率半导体管芯包括MOSFET功率半导体管芯。
25.权利要求16所述的功率半导体器件,其中封装的大小和形状与S08的封装构造相一致。
26.权利要求16所述的功率半导体器件,其中的封装包括基本上包封引线框,半导体管芯和接线柱的塑料外壳。
27.权利要求20所述的功率半导体器件,其中的第二金属化区域具有小于约一万七千平方微米的面积。
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Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN103178030A (zh) * 2011-12-23 2013-06-26 英飞凌科技股份有限公司 包括安装在dcb衬底上的分立器件的模块及制造模块的方法
CN103367178A (zh) * 2012-03-27 2013-10-23 德州仪器公司 堆叠半导体封装
CN102217062B (zh) * 2008-10-31 2014-10-29 仙童半导体公司 半导体封装及用于制造半导体封装的方法
CN105895606A (zh) * 2014-12-29 2016-08-24 飞思卡尔半导体公司 具有带状线的封装半导体器件

Families Citing this family (17)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7135759B2 (en) * 2000-10-27 2006-11-14 Texas Instruments Incorporated Individualized low parasitic power distribution lines deposited over active integrated circuits
NO319624B1 (no) * 2003-09-15 2005-09-05 Trouw Internat Bv Fiskefôr for laksefisk i ferskvann og anvendelse av slikt fôr.
US20070045785A1 (en) * 2005-08-30 2007-03-01 Noquil Jonathan A Reversible-multiple footprint package and method of manufacturing
US7443018B2 (en) * 2005-11-09 2008-10-28 Stats Chippac Ltd. Integrated circuit package system including ribbon bond interconnect
DE102006015447B4 (de) * 2006-03-31 2012-08-16 Infineon Technologies Ag Leistungshalbleiterbauelement mit einem Leistungshalbleiterchip und Verfahren zur Herstellung desselben
JP5390064B2 (ja) * 2006-08-30 2014-01-15 ルネサスエレクトロニクス株式会社 半導体装置
US20080111219A1 (en) * 2006-11-14 2008-05-15 Gem Services, Inc. Package designs for vertical conduction die
US9059083B2 (en) * 2007-09-14 2015-06-16 Infineon Technologies Ag Semiconductor device
US7800207B2 (en) * 2007-10-17 2010-09-21 Fairchild Semiconductor Corporation Method for connecting a die attach pad to a lead frame and product thereof
US20090230519A1 (en) * 2008-03-14 2009-09-17 Infineon Technologies Ag Semiconductor Device
US7956446B2 (en) * 2008-05-13 2011-06-07 Infineon Technologies Ag Semiconductor device and method
US8482119B2 (en) * 2008-06-24 2013-07-09 Infineon Technologies Ag Semiconductor chip assembly
JP6133093B2 (ja) * 2013-03-25 2017-05-24 本田技研工業株式会社 電力変換装置
US20150214179A1 (en) * 2014-01-28 2015-07-30 Infineon Technologies Ag Semiconductor device including flexible leads
CN105810654A (zh) * 2014-12-30 2016-07-27 展讯通信(上海)有限公司 一种引线框架型封装体
EP3389090A1 (en) 2017-04-11 2018-10-17 ABB Schweiz AG Power electronics module
US20220181290A1 (en) * 2020-12-03 2022-06-09 Semiconductor Components Industries, Llc Clip interconnect with micro contact heads

Family Cites Families (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6040626A (en) * 1998-09-25 2000-03-21 International Rectifier Corp. Semiconductor package
US6396127B1 (en) * 1998-09-25 2002-05-28 International Rectifier Corporation Semiconductor package
US6319755B1 (en) * 1999-12-01 2001-11-20 Amkor Technology, Inc. Conductive strap attachment process that allows electrical connector between an integrated circuit die and leadframe
JP4102012B2 (ja) * 2000-09-21 2008-06-18 株式会社東芝 半導体装置の製造方法および半導体装置
US6717260B2 (en) * 2001-01-22 2004-04-06 International Rectifier Corporation Clip-type lead frame for source mounted die
US7119447B2 (en) * 2001-03-28 2006-10-10 International Rectifier Corporation Direct fet device for high frequency application
US6528880B1 (en) * 2001-06-25 2003-03-04 Lovoltech Inc. Semiconductor package for power JFET having copper plate for source and ribbon contact for gate
US20040080028A1 (en) * 2002-09-05 2004-04-29 Kabushiki Kaisha Toshiba Semiconductor device with semiconductor chip mounted in package
US20040217488A1 (en) * 2003-05-02 2004-11-04 Luechinger Christoph B. Ribbon bonding

Cited By (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN102217062B (zh) * 2008-10-31 2014-10-29 仙童半导体公司 半导体封装及用于制造半导体封装的方法
CN103178030A (zh) * 2011-12-23 2013-06-26 英飞凌科技股份有限公司 包括安装在dcb衬底上的分立器件的模块及制造模块的方法
US9147637B2 (en) 2011-12-23 2015-09-29 Infineon Technologies Ag Module including a discrete device mounted on a DCB substrate
CN103178030B (zh) * 2011-12-23 2016-12-28 英飞凌科技股份有限公司 包括安装在dcb衬底上的分立器件的模块及制造模块的方法
CN103367178A (zh) * 2012-03-27 2013-10-23 德州仪器公司 堆叠半导体封装
CN110246768A (zh) * 2012-03-27 2019-09-17 德州仪器公司 堆叠半导体封装
CN105895606A (zh) * 2014-12-29 2016-08-24 飞思卡尔半导体公司 具有带状线的封装半导体器件

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