CN103165806A - 垂直式发光二极管晶粒及其制作方法 - Google Patents
垂直式发光二极管晶粒及其制作方法 Download PDFInfo
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- CN103165806A CN103165806A CN2012102526830A CN201210252683A CN103165806A CN 103165806 A CN103165806 A CN 103165806A CN 2012102526830 A CN2012102526830 A CN 2012102526830A CN 201210252683 A CN201210252683 A CN 201210252683A CN 103165806 A CN103165806 A CN 103165806A
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Abstract
本发明关于一种用以产生均匀白光的发光二极管组件,以及该发光二极管组件在晶圆层次及个别晶粒层次的制作方法。该发光二极管组件包括:一金属层;一p型半导体,耦接至该金属层;一主动区,耦接至该p型半导体;一n型半导体,耦接至该主动区;以及一波长转换层,耦接至该n型半导体的至少一部份;其中,该波长转换层实质上为保形的。
Description
技术领域
本发明涉及光电组件的技术,尤其涉及一种垂直式发光二极管(VLED)晶粒及其制作方法。
背景技术
在以发光二极管(LED)为例的光电系统中,其可包含一或多个装设于基板上的发光二极管晶粒。发光二极管晶粒具有多种类型,其一为垂直式发光二极管(VLED)晶粒,包含以复合物半导体材料组成的多层半导体基板,例如氮化镓(GaN)。该半导体基板可包含具有p型掺杂物的p型局限层、具有n型掺杂物的n型局限层、以及一用以发光的多重量子井(MQW)层位于该等局限层之间。
本发明主要针对一种垂直式发光二极管晶粒及制作该垂直式发光二极管晶粒的方法。该垂直式发光二极管晶粒可用以构成具有极佳热及电特性的发光二极管。
发明内容
根据本发明的一方面,一实施例提供一种垂直式发光二极管(VLED)晶粒,其包含:一第一金属,具有一第一表面及一相对侧的第二表面;一第二金属,位于该第一金属的该第二表面之上;以及一位于该第一金属之上的磊晶堆栈。该第一金属及该第二金属形成一阶梯状结构,用以保护该磊晶堆栈。该磊晶堆栈包含一第一型半导体层,位于该第一金属的该第一表面之上;一用以发光的多重量子井(MQW)层,位于该第一型半导体层之上;及一第二型半导体层,位于该多重量子井(MQW)层之上。其中,该第一型半导体层可包含一p型半导体层,例如p型氮化镓(p-GaN),且该第二型半导体层可包含一n型半导体层,例如n型氮化镓(n-GaN)。
根据本发明的另一方面,另一实施例提供一种发光二极管结构的制作方法,其包含以下步骤:提供一承载基板;形成一磊晶堆栈于该承载基板上;形成复数个第一凹槽,其形成十字形的图案且贯穿该磊晶堆栈及该承载基板,以定义出该承载基板之上的复数个晶粒;形成一种子层于该磊晶堆栈之上及该等凹槽之内;形成一反射层于该种子层之上;形成一具有第一面积的第一金属于该种子层之上;形成一具有第二面积的第二金属于该第一金属之上,且该第二面积小于该第一面积;移除该承载基板;形成复数个第二凹槽,其贯穿该磊晶堆栈而至该种子层;以及将该等晶粒分开成复数个垂直式发光二极管(VLED)晶粒。
本发明采用上述技术方案,具有以下优点:
该垂直式发光二极管晶粒可用以构成具有极佳热及电特性的发光二极管。
附图说明
图1A为根据本发明实施例的垂直式发光二极管晶粒的结构剖面图;
图1B为根据本发明实施例的垂直式发光二极管晶粒的上视平面图;
图1C为根据本发明实施例的垂直式发光二极管晶粒的下视平面图;
图2为包含复数个垂直式发光二极管晶粒的发光二极管系统的剖面视图;
图3A至图3K为制作该垂直式发光二极管晶粒的方法的步骤示意图。
附图标记说明:10-垂直式发光二极管晶粒;12-第一金属;14-第二金属;16-p型半导体层;18-多重量子井层;20-n型半导体层;22-种子层;24-反射层;30/52-磊晶堆栈;34-发光二极管;36-基板;38-导线;40-保护层;42-n电极;44-p电极;46-腔体;48-背侧;50-承载基板;52A-多层磊晶结构;54-n型层;56-量子井层;58-p型层;60-晶粒;62/80-凹槽;66-反射层;72-种子层;74-第一金属层;76-第二金属层;78-硬式屏蔽。
具体实施方式
在各个实施例的说明中,当一元素被描述是在另一元素的“上方/上”或“下方/下”,指“直接地”或“间接地”在该另一元素之上或之下的情况,其可包含设置于其间的其它元素。“上方/上”或“下方/下”等的描述以图式为基准进行说明,但亦包含其它可能的方向转变。在所有的说明书及图示中,将采用相同的组件编号以指定相同或类似的组件。为了说明上的便利和明确,图式中各元素的厚度或尺寸,以夸张或省略或概略的方式表示,且各元素的尺寸并未完全为其实际的尺寸。
图1A至图1C为根据本发明实施例的垂直式发光二极管(VLED)晶粒10的结构示意图;其中,图1A为其剖面视图,图1B为其上视平面图,图1A为其下视平面图。如图1A至1C所示,该垂直式发光二极管晶粒10包含一第一金属12、一第二金属14、一p型半导体层16、一多重量子井(MQW)层18、及一n型半导体层20;其中,该p型半导体层16位于该第一金属12之上,该多重量子井层18位于该p型半导体层16之上,且该n型半导体层20位于该多重量子井层18之上。该垂直式发光二极管晶粒10亦包含一种子层22及一反射层24;其中,该种子层22位于该第一金属12之上,且该反射层24位于该种子层22之上。
该p型半导体层16的较佳材料可包含p型氮化镓(p-GaN);其它适用于该p型半导体层16的材料亦包含氮化铝镓(AlGaN)、氮化铟镓(InGaN)、或氮化铟镓铝(AlInGaN)。该n型半导体层20的较佳材料可包含n型氮化镓(n-GaN);其它适用于该n型半导体层20的材料亦包含氮化铝镓(AlGaN)、氮化铟镓(InGaN)、或氮化铟镓铝(AlInGaN)。该多重量子井层18可包含一半导体材料(例如,砷化镓(GaAs)),其夹置于两层的另一半导体材料(例如,具有较宽能带间隙的砷化铝(GaAl))之间。
该第一金属12包含互相对侧的第一表面26及第二表面28。该反射层24形成于该第一表面26之上,且该第二金属14形成于该第二表面28之上。如图1B所示,该第一金属12具有一大体上(generally)正方形(具有四个等边)的周边轮廓;或者是该第一金属12可具有任何合适的多边形周边轮廓(例如,矩形或三角形)或圆形轮廓。此外,该第一金属12的厚度及各侧边宽度分别为d1及W1。该第一金属12的代表性厚度(d1)范围为1μm至500μm;该第一金属12的代表性宽度(W1)范围为1μm至10000μm。倘若该第一金属12为圆形的轮廓,则上述的宽度(W1)可相当于该圆形的直径(D)。该第一金属12的代表性面积范围可为1μm2至10000μm2。
该第一金属12可包含单金属层或至少二金属层的堆栈,并使用合适的沉积制程来制作。此外,该第一金属12可选用具有高导电性及高导热性的组成材料,其合适的材料包含铜(Cu)、镍(Ni)、银(Ag)、金(Au)、钴(Co)、铜-钴(Cu-Co)、镍-钴(Ni-Co)、铜-钼(Cu-Mo)、镍/铜(Ni/Cu)、镍/铜-钼(Ni/Cu-Mo)、或上述金属的合金。适用于制作该第一金属12的沉积制程包含电式沉积法(electro-deposition)、无电式沉积法(electroless-deposition)、化学气相沉积法(CVD)、电浆增强型化学气相沉积法(PECVD)、物理气相沉积法(PVD)、蒸镀法、及电浆喷涂法等。
如图1C所示,该第二金属14具有一大体上正方形(具有四个等边)的周边轮廓,中心对称地设置于该第一金属12之上。或者是,该第二金属14可具有任何合适的多边形周边轮廓(例如,矩形或三角形),并偏移地设置于该第一金属12之上。又或者是,该第一金属12及该第二金属14可互为同心圆的圆形周边轮廓。此外,该第二金属14的厚度及各侧边宽度分别为d2及W2。该第一金属12的代表性厚度(d2)范围为1μm至500μm;该第一金属12的代表性宽度(W1)范围为0.5μm至9999μm。该第二金属14的最大宽度(W2)及面积会随着该第一金属12的最大宽度(W1)及面积而变动,但小于该第一金属12的最大宽度(W1)及面积。换言之,该第一金属12的最大宽度(W1)及面积分别大于该第二金属14的最大宽度(W2)及面积。藉此,该第一金属12及该第二金属14可形成一阶梯状保护结构。该第一金属12的面积在申请专利范围(claim)中称为「第一面积」,而该第二金属14的面积在申请专利范围(claim)中称为「第二面积」。
该第二金属14可包含单金属层或至少二金属层的堆栈,并使用合适的沉积制程来制作。此外,该第二金属14可选用具有高导电性及高导热性的组成材料,其合适的材料包含铜(Cu)、镍(Ni)、银(Ag)、金(Au)、钴(Co)、铜-钴(Cu-Co)、镍-钴(Ni-Co)、铜-钼(Cu-Mo)、镍/铜(Ni/Cu)、镍/铜-钼(Ni/Cu-Mo)、或上述金属的合金。适用于制作该第二金属14的沉积制程包含电式沉积法(electro-deposition)、无电式沉积法(electroless-deposition)、化学气相沉积法(CVD)、电浆增强型化学气相沉积法(PECVD)、物理气相沉积法(PVD)、蒸镀法、及电浆喷涂法等。
该种子层22可包含一使用合适沉积制程(例如,电式沉积法或无电式沉积法)制作的金属覆盖层。该种子层22用以帮助该第一金属12及该第二金属14于上述沉积制程的制作,例如,电镀法或无电式镀层法;此将详述于后。此外,该种子层22可包含单金属层或金属堆栈,其合适的材料包含Ta/Cu、Ta/TaN/Cu、TaN/Cu、Ti/TaN/Cu、Ta/TiN/Cu、Ti/Cu、Ti/Tn/Cu、TiN/Cu、Cr/Au、Cr/Au/Ni/Au、Cr/Au/Ti/Ni/Au、Ti/Au、及Ti/Ni/Au。该反射层24亦可包含单金属层或金属堆栈,其合适的材料包含Ag/Ti/Au、Ag/TiN/Cu、Ag/Ta/Au、Ag/W/Au、Ag/TaN/Cu、Ag/Ni/Au、Al/Ta/Au、Al/TaN/Cu、Ni/Ag、Ni/Al、及Ni/Ag/Ni/Au。
该p型半导体层16、该多重量子井层18、及该n型半导体层20共同形成一磊晶堆栈30,其厚度为d且位于该种子层22之上。在该磊晶堆栈30中,该p型半导体层16及该n型半导体层20的功能为局限层,而该多重量子井层18的功能为发光层。
该磊晶堆栈30可使用合适的沉积制程而形成于该反射层24之上,例如,气相磊晶法(VPE)、分子束磊晶法(MBE)、或液相磊晶法(LPE)。该磊晶堆栈30的代表性厚度(d)范围可为1μm至50μm。此外,该磊晶堆栈30具有四个倾斜的侧墙32,该等侧墙32与该种子层22表面形成一角度A;其中,该种子层22的表面平行于该第一金属12的该第一表面26。该角度A大于90度,且其代表性角度(A)范围可为100度至145度。此外,该磊晶堆栈30的形状大体上为角锥形或金字塔形,并具有一平的顶端部(而非一般角锥物具有尖的顶端部)。此外,该反射层24的面积及最大宽度可分别小于该p型半导体层16的面积及最大宽度。
该磊晶堆栈30可具有该p型半导体层16所形成的四边基部(其宽度为W3)及该n型半导体层20所形成的四边顶端部(其宽度为W4)。该n型半导体层20的最大宽度W4小于该p型半导体层16的最大宽度W3。此外,该磊晶堆栈30的顶端部(即该n型半导体层20的顶端面)面积小于该磊晶堆栈30的基部(即该p型半导体层16的底面)面积。换言之,该磊晶堆栈30的截面积自基部至顶端部而渐减。除了角锥形的形状之外,该磊晶堆栈30亦可大体上为圆锥型的形状,其顶端部是平的,且其顶端部及基部皆为圆形。或者是,该磊晶堆栈30亦可形成长型角锥形的形状,其基部为长方形。
图2为包含复数个垂直式发光二极管晶粒的发光二极管系统的剖面视图。请参照图2,一发光二极管(LED)34包含一基板36、该垂直式发光二极管(VLED)晶粒10、及一保护层40;其中,该垂直式发光二极管晶粒10装设于该基板36之上,该保护层40为电性绝缘且透光的材质,并密封该垂直式发光二极管晶粒10。在图2中,该发光二极管34只有一个垂直式发光二极管晶粒10装设于该基板36上;但依据实际的应用,该发光二极管34可包含复数个垂直式发光二极管晶粒10装设于该基板36上,并设置成所需要的数组型式,以形成例如发光二极管(LED)显示器的光电组件。该基板36的材质可包含半导体材料,例如,硅、砷化镓(GaAs)、碳化硅(SiC)、氮化铝(AlN)、氧化铝(Al2O3)、或蓝宝石(sapphire)等。该基板36可包含一腔体46及一背侧48;其中,该腔体46用以装设该垂直式发光二极管晶粒10于其中。一导电的晶粒黏接层(未图示)可用以将该垂直式发光二极管晶粒10黏贴于该基板36。
如图2所示,一导线38将该n型半导体层20电性连接至该基板36上的n电极42。此外,该第一金属12及该第二金属14可将该p型半导体层16电性连接至该基板36上的p电极44。该第一金属12及该第二金属14亦可提供该垂直式发光二极管晶粒10至该基板36的散热路径。该第一金属12及该第二金属14构成的阶梯状结构可进一步增强上述散热路径的散热效果。此外,该第一金属12大于该第二金属14的结构具有保护的功能,可防止晶粒黏接材料(例如,银胶或焊锡)溢出而接触到该磊晶堆栈30。
请参照图3A至图3K,其为该垂直式发光二极管(VLED)晶粒10制作方法的步骤示意图。首先,如图3A所示,提供一承载基板50。该承载基板50可以是晶圆的形式,其材质可为例如蓝宝石、碳化硅(SiC)、硅、锗(Ge)、氧化锌(ZnO)、或砷化镓(GaAs)。在本实施例中,该承载基板50为蓝宝石基板。
如图3A所示,可使用合适的沉积制程而形成一多层磊晶结构52A于该承载基板50上,例如,气相磊晶法(VPE)、分子束磊晶法(MBE)、或液相磊晶法(LPE)。该多层磊晶结构52A可包含一n型层54、至少一量子井层56、及一p型层58。在本实施例中,该n型层54包含n型氮化镓(n-GaN)且该p型层58包含p型氮化镓(p-GaN)。除了氮化镓之外,该n型层54及该p型层58亦可包含其它各种的复合物半导体层材料,例如,氮化铝镓(AlGaN)、氮化铟镓(InGaN)、或氮化铟镓铝(AlInGaN)。该等量子井层56的材质可为合适的材料,例如,砷化镓(GaAs)层,其夹置于两层的另一材料(例如,具有较宽能带间隙的砷化铝(GaAl))之间。
接着如图3B所示,可使用合适的制程来形成贯穿该多层磊晶结构52A的凹槽62,该等凹槽62的底端可在该承载基板50上,或是延伸入该承载基板50一小段距离。该等凹槽62可形成十字形图案,类似传统半导体制程的晶粒之间的分隔道,使得复数个晶粒60可被界定出,并用以分开该磊晶堆栈52。上述的合适制程可包含藉由硬式屏蔽(hard mask)的干式蚀刻法。此外,雷射切割法、刀锯切割法、钻石切割法、湿式蚀刻法、及冲水法(water jetting)亦为其它合适的制程。在本凹槽制作步骤之后,该等晶粒60可以液体或溶剂清洗,藉以去除该蚀刻屏蔽或其它的保护涂层。该等凹槽62的宽度w范围约为0.1μm至300μm。
此外,如图3B所示,可使用合适的制程以于该p型层58之上形成一反射层66,其功能为反射器或反射镜以反射该垂直式发光二极管晶粒10的发光。举例而言,该反射层66可包含多层金属,例如,Ni/Ag/Ni/Au、Ag/Ni/Au、Ti/Ag/Ni/Au、Ag/Pt、Ag/Pd、或Ag/Cr,其可藉由沉积含有银(Ag)、金(Au)、铬(Cr)、铂(Pt)、铅(Pd)、或铝(Al)的合金而形成。该反射层(反射镜)66的厚度可小于约1.0μm。该反射层66的高温退火或合金化可用来改善其接触电阻及其对于该p型层58的黏着性。例如,上述的退火或合金化制程可在至少150℃的温度及惰性的环境(例如,含少量或完全无氧、氢、或氧氢皆无的气体环境)下进行。
接着如图3C所示,一种子层72可使用电镀法或无电式镀层法而形成于该反射层66上以及该等凹槽62的侧墙上。该种子层72可包含单一层或多层堆栈,例如,Ta/Cu、Ta/TaN/Cu、TaN/Cu、Ti/TaN/Cu、Ta/TiN/Cu、Ti/Cu、Ti/Tn/Cu、TiN/Cu、Ti/Cu、Ti/Tn/Cu、TiN/Cu、Cr/Au、Cr/Au/Ni/Au、Cr/Au/Ti/Ni/Au、Ti/Au、Ti/Ni/Au、Ni/Au、或Ni/Cu。该反射层66亦可形成一覆盖层,其亦可具有种子层的功能。在本实施例中,该反射层66可包含单一层或多层堆栈,例如,Ag/Ti/Au、Ag/TiN/Cu、Ag/Ta/Au、Ag/W/Au、Ag/TaN/Cu、Al/Ta/Au、Al/TaN/Cu、Ni/Ag、Ni/Al、或Ni/Ag/Ni/Au。
接着如图3D及图3E所示,一厚度d1的第一金属层74沉积于该种子层72上,且一厚度d2的第二金属层76沉积于该第一金属层74上。该第一金属层74将形成如图1A之该第一金属12,且该第二金属层76将形成如图1A的该第二金属14。该第一金属层74可使用合适的沉积制程来制作,例如,电式沉积法(electro-deposition)或无电式沉积法(electroless-deposition),以达到所需的厚度d1。该第一金属层74的代表性厚度(d1)范围为1μm至500μm。类似地,该第二金属层76可使用合适的沉积制程来制作,例如,电式沉积法或无电式沉积法,以达到所需的厚度d2。该第二金属层76的代表性厚度(d2)范围为1μm至500μm。该第一金属层74及该第二金属层76可包含单层的金属(例如,铜(Cu)、镍(Ni)、银(Ag)、金(Au)、或钴(Co))、金属合金(例如,铜-钴(Cu-Co)或铜-钼(Cu-Mo))、或金属层堆栈(例如,镍/铜(Ni/Cu)或镍/铜-钼(Ni/Cu-Mo))。其它适用于制作该第一金属层74及该第二金属层76的沉积制程包含化学气相沉积法(CVD)、电浆增强型化学气相沉积法(PECVD)、物理气相沉积法(PVD)、蒸镀法、及电浆喷涂法等。
接着如图3E所示,该第二金属层76可使用合适的制程加以图案化,例如,对原本沉积的层膜进行蚀刻(例如,减法制程)或藉由屏蔽的图案化沉积(例如,加法制程),以定义出该第二金属14的形状。该第二金属层76的图案化制程将使得该第二金属14的面积及宽度W2分别小于该第一金属12的面积及宽度W1。此外,一或多个额外的金属层(例如,Cr/Au、Ni或Ni/Au,未图示)可形成于该第二金属层76上以及该第一金属层74的外露面上,藉以防止氧化与腐蚀。
接着如图3F所示,该承载基板50可使用合适的制程而自该n型层54上移除,例如,脉冲式雷射照射法、蚀刻法、或化学机械平坦化制程(ChemicalMechanical planarization,CMP)。
接着如图3G所示,一硬式屏蔽78可形成于该承载基板50移除后的该n型层54表面上。该硬式屏蔽78可包含例如氧化硅(SiO2)或氮化硅(Si3N4)的沉积材料。该硬式屏蔽78亦可包含有机聚合物材料,例如,环氧化物(epoxy)、聚亚酰氨(polyimide)、热塑材料或溶胶-凝胶(sol-gel)材料。该硬式屏蔽78亦可采用光敏有机材料,例如,SU-8、NR-7、或AZ5214E。或者是,该硬式屏蔽78可包含无机材料,例如,氧化硅(SiO2)、氧化锌(ZnO)、氧化钽(Ta2O5)、氧化钛(TiO2)、氧化铪(HfO)、或氧化镁(MgO)。
接着如图3H所示,该硬式屏蔽78可用以蚀刻出复数个凹槽80,其贯穿该磊晶堆栈52而至该种子层72。所使用的蚀刻制程可包含干式蚀刻(ICP RIE)、湿式化学蚀刻、或光增强式化学蚀刻。此外,邻近该n型层54表面的该等凹槽80尺寸可大于邻近该p型层58表面的该等凹槽80尺寸。换言之,该等凹槽80的尺寸随着其深度的增加而减小。该等凹槽80的倾斜度加上90度将会等于如图1A所示的该垂直式发光二极管晶粒10的该磊晶堆栈的角度A。
接着如图3I所示,该硬式屏蔽78可使用合适的溶剂或使用合适的干式或湿式蚀刻制程而移除。
接着如图3J所示,可进行晶粒分割制程,以将该等晶粒60分割成个别的垂直式发光二极管(VLED)10。此分割制程可使用合适的制作方法,例如,雷射切割法、刀锯切割法、折断法(breaking)、空气刀法(air knifing)、或冲水法(waterjetting)。此外,一或多个抗氧化层(未图示)可使用合适的制作方法而铺涂于特定的表面(例如,边侧区),例如,使用冲水法溶液的镀膜法。
如图3K所示,各个垂直式发光二极管(VLED)10包含一第一金属12、一第二金属14、一p型半导体层16、一多重量子井(MQW)层18、及一n型半导体层20;其中,部分的该第一金属层74形成该第一金属12(如图3J所示);部分的该第二金属层76形成该第二金属14(如图3J所示);部分的该p型层58形成该p型半导体层16(如图3J所示);部分的该多重量子井层58形成该多重量子井(MQW)层18(如图3J所示);且部分的该n型层54形成该n型半导体层20(如图3J所示)。各个垂直式发光二极管(VLED)10亦包含一种子层22及一反射层24;其中,部分的该种子层72形成该种子层22(如图3J所示),且部分的该反射层66形成该反射层24(如图3J所示)。
以上所描述者即为本发明实施例的垂直式发光二极管(VLED)晶粒及其制作方法。
以上这些实施例仅是范例性的,并不对本发明的范围构成任何限制。本领域技术人员应该理解的是,在不偏离本发明的精神和范围下可以对本发明技术方案的细节和形式进行修改或替换,但这些修改和替换均落入本发明的保护范围内。
Claims (20)
1.一种垂直式发光二极管(VLED)晶粒,其包括:
一第一金属,具有一第一表面、一相对的第二表面、及一第一面积;
一第二金属,位于该第一金属的该第二表面之上,并具有一第二面积,其中,该第一金属的该第一面积大于该第二金属的该第二面积而形成一阶梯状结构;以及
一位于该第一金属之上的磊晶堆栈,包括:
一第一型半导体层,位于该第一金属的该第一表面之上;
一用以发光的多重量子井(MQW)层,位于该第一型半导体层之上;及
一第二型半导体层,位于该多重量子井(MQW)层之上。
2.如权利要求1所述的垂直式发光二极管晶粒,其特征在于,该第一型半导体层包含一p型半导体层,且该第二型半导体层包含一n型半导体层。
3.如权利要求1所述的垂直式发光二极管晶粒,进一步包含一位于该第一金属的该第一表面之上的反射层。
4.如权利要求1所述的垂直式发光二极管晶粒,其特征在于,该磊晶堆栈大体上为角锥形的形状,其中该第一型半导体层形成于其基部,且该第二型半导体层形成于其顶端部。
5.如权利要求1所述的垂直式发光二极管晶粒,其特征在于,该第一金属包含一选自由铜(Cu)、镍(Ni)、银(Ag)、金(Au)、钴(Co)、铜-钴(Cu-Co)、镍-钴(Ni-Co)、铜-钼(Cu-Mo)、镍/铜(Ni/Cu)、及镍/铜-钼(Ni/Cu-Mo)组成的金属群或其合金的材料。
6.如权利要求1所述的垂直式发光二极管晶粒,其特征在于,该第二金属包含一选自由铜(Cu)、镍(Ni)、银(Ag)、金(Au)、钴(Co)、铜-钴(Cu-Co)、镍-钴(Ni-Co)、铜-钼(Cu-Mo)、镍/铜(Ni/Cu)、及镍/铜-钼(Ni/Cu-Mo)组成的金属群或其合金的材料。
7.如权利要求1所述的垂直式发光二极管晶粒,其特征在于,该第一型半导体层包含一p型半导体层,其包含一选自由氮化镓(GaN)、氮化铝镓(AlGaN)、氮化铟镓(InGaN)、及氮化铟镓铝(AlInGaN)组成材料群的材料。
8.如权利要求1所述的垂直式发光二极管晶粒,其特征在于,该第二型半导体层包含一n型半导体层,其包含一选自由氮化镓(GaN)、氮化铝镓(AlGaN)、氮化铟镓(InGaN)、及氮化铟镓铝(AlInGaN)组成材料群的材料。
9.如权利要求1所述的垂直式发光二极管晶粒,其特征在于,该第一型半导体层包含p型氮化镓(p-GaN),且该第二型半导体层包含n型氮化镓(n-GaN)。
10.一种垂直式发光二极管(VLED)晶粒,其包括:
一第一金属,具有一第一表面、一相对的第二表面、及一第一面积;
一第二金属,位于该第一金属的该第二表面之上,并具有一第二面积,其中该第一金属的该第一面积大于该第二金属的该第二面积;以及
一位于该第一金属的该第一表面之上的磊晶堆栈,包括:
一p型半导体层,位于该第一金属的该第一表面之上;
一用以发光的多重量子井(MQW)层,位于该p型半导体层之上;及
一n型半导体层,位于该多重量子井(MQW)层之上;
其中,该第一金属及该第二金属形成一阶梯状保护结构,用以保护该磊晶堆栈;及
其中,该磊晶堆栈具有倾斜的侧墙,且该侧墙与该第一金属之间的角度大于90度。
11.如权利要求10所述的垂直式发光二极管晶粒,进一步包含一位于该第一金属的该第一表面之上的反射层。
12.如权利要求10所述的垂直式发光二极管晶粒,其特征在于,该磊晶堆栈大体上为角锥形的形状,其中该p型半导体层形成于其基部,且该n型半导体层形成于其顶端部。
13.如权利要求10所述的垂直式发光二极管晶粒,其特征在于,该第一金属及该第二金属包含一选自由铜(Cu)、镍(Ni)、银(Ag)、金(Au)、钴(Co)、铜-钴(Cu-Co)、镍-钴(Ni-Co)、铜-钼(Cu-Mo)、镍/铜(Ni/Cu)、及镍/铜-钼(Ni/Cu-Mo)组成的金属群或其合金的材料。
14.如权利要求10所述的垂直式发光二极管晶粒,其特征在于,该p型半导体层及该n型半导体层包含一选自由氮化镓(GaN)、氮化铝镓(AlGaN)、氮化铟镓(InGaN)、及氮化铟镓铝(AlInGaN)组成材料群的材料。
15.如权利要求10所述的垂直式发光二极管晶粒,其特征在于,该n型半导体层的面积及最大宽度小于该p型半导体层的面积及最大宽度。
16.一种垂直式发光二极管(VLED)晶粒的制作方法,包括以下步骤:
提供一承载基板;
形成一磊晶堆栈于该承载基板上;
形成复数个第一凹槽,其形成十字形的图案并贯穿该磊晶堆栈及该承载基板,以定义出该承载基板之上的复数个晶粒;
形成一种子层于该磊晶堆栈之上及该等凹槽之内;
形成一反射层于该种子层之上;
形成一具有第一面积的第一金属于该种子层之上;
形成一具有第二面积的第二金属于该第一金属之上,且该第二面积小于该第一面积;
移除该承载基板;
形成复数个第二凹槽,其贯穿该磊晶堆栈而至该种子层;以及
将该等晶粒分开成复数个垂直式发光二极管(VLED)晶粒。
17.如权利要求16所述的制作方法,其特征在于,该磊晶堆栈包括:
一p型半导体层,位于该第一金属的该第一表面之上;
一用以发光的多重量子井(MQW)层,位于该p型半导体层之上;及
一n型半导体层,位于该多重量子井(MQW)层之上。
18.如权利要求16所述的制作方法,其特征在于,该磊晶堆栈的侧墙与该第一金属之间的角度大于90度。
19.如权利要求16所述的制作方法,其特征在于,该第一金属及该第二金属包含一选自由铜(Cu)、镍(Ni)、银(Ag)、金(Au)、钴(Co)、铜-钴(Cu-Co)、镍-钴(Ni-Co)、铜-钼(Cu-Mo)、镍/铜(Ni/Cu)、及镍/铜-钼(Ni/Cu-Mo)组成的金属群或其合金的材料。
20.如权利要求16所述的制作方法,其特征在于,形成该等第二凹槽的步骤包含藉由屏蔽的蚀刻制程。
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TW201324845A (zh) | 2013-06-16 |
US8686461B2 (en) | 2014-04-01 |
KR20130069351A (ko) | 2013-06-26 |
TWI479685B (zh) | 2015-04-01 |
US9343620B2 (en) | 2016-05-17 |
US20140151635A1 (en) | 2014-06-05 |
US20120168716A1 (en) | 2012-07-05 |
JP2013125961A (ja) | 2013-06-24 |
WO2013086781A1 (en) | 2013-06-20 |
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