CN102844817B - 在正常操作模式及rta模式中操作存储器的方法和集成电路 - Google Patents
在正常操作模式及rta模式中操作存储器的方法和集成电路 Download PDFInfo
- Publication number
- CN102844817B CN102844817B CN201180019824.8A CN201180019824A CN102844817B CN 102844817 B CN102844817 B CN 102844817B CN 201180019824 A CN201180019824 A CN 201180019824A CN 102844817 B CN102844817 B CN 102844817B
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- CN
- China
- Prior art keywords
- reference voltage
- memory array
- voltage node
- array block
- rta
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
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Classifications
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
- G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
- G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
- G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
- G11C11/41—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming static cells with positive feedback, i.e. cells not needing refreshing or charge regeneration, e.g. bistable multivibrator or Schmitt trigger
- G11C11/413—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing, timing or power reduction
- G11C11/417—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing, timing or power reduction for memory cells of the field-effect type
Landscapes
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Computer Hardware Design (AREA)
- Static Random-Access Memory (AREA)
- Semiconductor Memories (AREA)
Applications Claiming Priority (3)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| US12/764,426 US8325511B2 (en) | 2010-04-21 | 2010-04-21 | Retain-till-accessed power saving mode in high-performance static memories |
| US12/764,426 | 2010-04-21 | ||
| PCT/US2011/033417 WO2011133763A2 (en) | 2010-04-21 | 2011-04-21 | Retain-till-accessed (rta) power saving mode in high performance static memories |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| CN102844817A CN102844817A (zh) | 2012-12-26 |
| CN102844817B true CN102844817B (zh) | 2015-12-16 |
Family
ID=44815694
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201180019824.8A Active CN102844817B (zh) | 2010-04-21 | 2011-04-21 | 在正常操作模式及rta模式中操作存储器的方法和集成电路 |
Country Status (4)
| Country | Link |
|---|---|
| US (1) | US8325511B2 (https=) |
| JP (1) | JP5822914B2 (https=) |
| CN (1) | CN102844817B (https=) |
| WO (1) | WO2011133763A2 (https=) |
Families Citing this family (29)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US8390146B2 (en) * | 2008-02-27 | 2013-03-05 | Panasonic Corporation | Semiconductor integrated circuit and various devices provided with the same |
| US8345469B2 (en) * | 2010-09-16 | 2013-01-01 | Freescale Semiconductor, Inc. | Static random access memory (SRAM) having bit cells accessible by separate read and write paths |
| JP2013004110A (ja) * | 2011-06-11 | 2013-01-07 | Handotai Rikougaku Kenkyu Center:Kk | 書込み用ビットラインの充放電電力を削減する半導体記憶装置 |
| US8560931B2 (en) * | 2011-06-17 | 2013-10-15 | Texas Instruments Incorporated | Low power retention random access memory with error correction on wake-up |
| US8654562B2 (en) * | 2012-01-17 | 2014-02-18 | Texas Instruments Incorporated | Static random access memory cell with single-sided buffer and asymmetric construction |
| US9666483B2 (en) * | 2012-02-10 | 2017-05-30 | Taiwan Semiconductor Manufacturing Company, Ltd. | Integrated circuit having thinner gate dielectric and method of making |
| US9299395B2 (en) | 2012-03-26 | 2016-03-29 | Intel Corporation | Methods and systems to selectively boost an operating voltage of, and controls to an 8T bit-cell array and/or other logic blocks |
| US8670265B2 (en) * | 2012-05-01 | 2014-03-11 | Texas Instruments Incorporated | Reducing power in SRAM using supply voltage control |
| US9025394B2 (en) * | 2012-05-02 | 2015-05-05 | Mediatek Inc. | Memory devices and control methods thereof |
| US9583178B2 (en) * | 2012-08-03 | 2017-02-28 | Qualcomm Incorporated | SRAM read preferred bit cell with write assist circuit |
| US9165641B2 (en) | 2013-12-13 | 2015-10-20 | Qualcomm Incorporated | Process tolerant current leakage reduction in static random access memory (SRAM) |
| CN104851453B (zh) * | 2014-02-18 | 2018-05-18 | 辉达公司 | 用于低功率sram的写入辅助方案 |
| US9311989B2 (en) | 2014-07-15 | 2016-04-12 | Texas Instruments Incorporated | Power gate for latch-up prevention |
| US9263096B1 (en) | 2014-09-04 | 2016-02-16 | International Business Machines Corporation | Voltage comparator circuit and usage thereof |
| JP6470205B2 (ja) * | 2015-09-03 | 2019-02-13 | 株式会社東芝 | 半導体メモリ |
| US9620200B1 (en) * | 2016-03-26 | 2017-04-11 | Arm Limited | Retention voltages for integrated circuits |
| CN105915821A (zh) * | 2016-06-02 | 2016-08-31 | 北京大学 | 一种基于半行交替的焦平面阵列无隙读出方法与电路 |
| US9940999B2 (en) | 2016-06-22 | 2018-04-10 | Darryl G. Walker | Semiconductor devices, circuits and methods for read and/or write assist of an SRAM circuit portion based on voltage detection and/or temperature detection circuits |
| US10163524B2 (en) | 2016-06-22 | 2018-12-25 | Darryl G. Walker | Testing a semiconductor device including a voltage detection circuit and temperature detection circuit that can be used to generate read assist and/or write assist in an SRAM circuit portion and method therefor |
| KR102528314B1 (ko) * | 2016-10-17 | 2023-05-03 | 에스케이하이닉스 주식회사 | 반도체 메모리 장치 |
| US10008259B1 (en) * | 2016-12-07 | 2018-06-26 | Advanced Micro Devices, Inc. | Limiting bitline precharge drive fight current using multiple power domains |
| US10877908B2 (en) * | 2018-09-25 | 2020-12-29 | Micron Technology, Inc. | Isolation component |
| DE102018133392B4 (de) * | 2018-12-21 | 2025-12-11 | Infineon Technologies Ag | Speicherzelleneinrichtung und Verfahren zum Betreiben einer Speicherzelleneinrichtung |
| US10885955B2 (en) | 2019-04-03 | 2021-01-05 | Micron Technology, Inc. | Driver circuit equipped with power gating circuit |
| US11726543B2 (en) * | 2019-12-13 | 2023-08-15 | Stmicroelectronics S.R.L. | Computing system power management device, system and method |
| JP7430425B2 (ja) * | 2020-02-10 | 2024-02-13 | 国立研究開発法人科学技術振興機構 | 双安定回路および電子回路 |
| JP2021190146A (ja) * | 2020-05-29 | 2021-12-13 | ソニーセミコンダクタソリューションズ株式会社 | 半導体記憶装置 |
| US11955171B2 (en) | 2021-09-15 | 2024-04-09 | Mavagail Technology, LLC | Integrated circuit device including an SRAM portion having end power select circuits |
| TWI839669B (zh) * | 2021-12-27 | 2024-04-21 | 新唐科技股份有限公司 | 電子裝置及其電源控制的方法 |
Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN1725373A (zh) * | 2004-07-02 | 2006-01-25 | 三星电子株式会社 | 不同工艺-电压-温度变化下稳定的同步随机存取存储器 |
| US20070279966A1 (en) * | 2006-06-01 | 2007-12-06 | Texas Instruments Incorporated | 8T SRAM cell with higher voltage on the read WL |
| US20080253170A1 (en) * | 2006-10-03 | 2008-10-16 | Kabushiki Kaisha Toshiba | Semiconductor device |
Family Cites Families (14)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2874935B2 (ja) * | 1990-02-13 | 1999-03-24 | 三菱電機株式会社 | 半導体メモリ装置 |
| JP2002100190A (ja) * | 2000-09-26 | 2002-04-05 | Nippon Telegr & Teleph Corp <Ntt> | メモリ回路 |
| US6515935B1 (en) * | 2001-10-19 | 2003-02-04 | Hewlett-Packard Company | Method and apparatus for reducing average power in memory arrays by switching a diode in or out of the ground path |
| JP2004362695A (ja) * | 2003-06-05 | 2004-12-24 | Renesas Technology Corp | 半導体記憶装置 |
| US7141468B2 (en) | 2003-10-27 | 2006-11-28 | Texas Instruments Incorporated | Application of different isolation schemes for logic and embedded memory |
| US7333357B2 (en) | 2003-12-11 | 2008-02-19 | Texas Instruments Incorproated | Static random access memory device having reduced leakage current during active mode and a method of operating thereof |
| KR100662215B1 (ko) | 2005-07-28 | 2006-12-28 | 민경식 | 에스램 회로 및 그 구동방법 |
| JP4954626B2 (ja) * | 2005-07-29 | 2012-06-20 | 株式会社半導体エネルギー研究所 | 半導体装置 |
| US7385841B2 (en) | 2005-08-15 | 2008-06-10 | Texas Instruments Incorporated | Static random access memory device having a voltage-controlled word line driver for retain till accessed mode and method of operating the same |
| US7242609B2 (en) * | 2005-09-01 | 2007-07-10 | Sony Computer Entertainment Inc. | Methods and apparatus for low power SRAM |
| JP4936749B2 (ja) * | 2006-03-13 | 2012-05-23 | 株式会社東芝 | 半導体記憶装置 |
| US7376038B2 (en) | 2006-03-21 | 2008-05-20 | Texas Instruments Incorporated | Fast access memory architecture |
| US7596012B1 (en) | 2006-12-04 | 2009-09-29 | Marvell International Ltd. | Write-assist and power-down circuit for low power SRAM applications |
| JP2009076169A (ja) | 2007-09-25 | 2009-04-09 | Fujitsu Microelectronics Ltd | 半導体記憶装置 |
-
2010
- 2010-04-21 US US12/764,426 patent/US8325511B2/en active Active
-
2011
- 2011-04-21 JP JP2013506302A patent/JP5822914B2/ja active Active
- 2011-04-21 WO PCT/US2011/033417 patent/WO2011133763A2/en not_active Ceased
- 2011-04-21 CN CN201180019824.8A patent/CN102844817B/zh active Active
Patent Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN1725373A (zh) * | 2004-07-02 | 2006-01-25 | 三星电子株式会社 | 不同工艺-电压-温度变化下稳定的同步随机存取存储器 |
| US20070279966A1 (en) * | 2006-06-01 | 2007-12-06 | Texas Instruments Incorporated | 8T SRAM cell with higher voltage on the read WL |
| US20080253170A1 (en) * | 2006-10-03 | 2008-10-16 | Kabushiki Kaisha Toshiba | Semiconductor device |
Also Published As
| Publication number | Publication date |
|---|---|
| WO2011133763A3 (en) | 2012-02-09 |
| JP5822914B2 (ja) | 2015-11-25 |
| WO2011133763A2 (en) | 2011-10-27 |
| JP2013525936A (ja) | 2013-06-20 |
| US8325511B2 (en) | 2012-12-04 |
| CN102844817A (zh) | 2012-12-26 |
| US20110261609A1 (en) | 2011-10-27 |
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| C06 | Publication | ||
| PB01 | Publication | ||
| C10 | Entry into substantive examination | ||
| SE01 | Entry into force of request for substantive examination | ||
| C14 | Grant of patent or utility model | ||
| GR01 | Patent grant |