CN102480290A - 锁相环电路、其误差校正方法和包括该电路的通信设备 - Google Patents
锁相环电路、其误差校正方法和包括该电路的通信设备 Download PDFInfo
- Publication number
- CN102480290A CN102480290A CN2011103925960A CN201110392596A CN102480290A CN 102480290 A CN102480290 A CN 102480290A CN 2011103925960 A CN2011103925960 A CN 2011103925960A CN 201110392596 A CN201110392596 A CN 201110392596A CN 102480290 A CN102480290 A CN 102480290A
- Authority
- CN
- China
- Prior art keywords
- clock
- circuit
- fractional part
- digital value
- accumulated
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
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Classifications
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
- H03L7/00—Automatic control of frequency or phase; Synchronisation
- H03L7/06—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
- H03L7/16—Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
- H03L2207/00—Indexing scheme relating to automatic control of frequency or phase and to synchronisation
- H03L2207/50—All digital phase-locked loop
Landscapes
- Stabilization Of Oscillater, Synchronisation, Frequency Synthesizers (AREA)
Applications Claiming Priority (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2010-262781 | 2010-11-25 | ||
| JP2010262781A JP5609585B2 (ja) | 2010-11-25 | 2010-11-25 | Pll回路、pll回路の誤差補償方法及び通信装置 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN102480290A true CN102480290A (zh) | 2012-05-30 |
Family
ID=46092796
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN2011103925960A Pending CN102480290A (zh) | 2010-11-25 | 2011-11-18 | 锁相环电路、其误差校正方法和包括该电路的通信设备 |
Country Status (3)
| Country | Link |
|---|---|
| US (1) | US8575980B2 (enExample) |
| JP (1) | JP5609585B2 (enExample) |
| CN (1) | CN102480290A (enExample) |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN108459491A (zh) * | 2017-02-22 | 2018-08-28 | 精工爱普生株式会社 | 电路装置、物理量测量装置、电子设备和移动体 |
| US11949424B2 (en) * | 2020-12-24 | 2024-04-02 | Shenzhen Zhoncent Technologies Co., Ltd. | Device, method and storage medium for frequency calibration for voltage-controlled oscillators |
Families Citing this family (7)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP5609585B2 (ja) * | 2010-11-25 | 2014-10-22 | ソニー株式会社 | Pll回路、pll回路の誤差補償方法及び通信装置 |
| US8508266B2 (en) * | 2011-06-30 | 2013-08-13 | Broadcom Corporation | Digital phase locked loop circuits with multiple digital feedback loops |
| JP2013258622A (ja) * | 2012-06-14 | 2013-12-26 | Renesas Electronics Corp | ダウンコンバータ及びその制御方法 |
| US9225348B2 (en) * | 2014-01-10 | 2015-12-29 | International Business Machines Corporation | Prediction based digital control for fractional-N PLLs |
| US10305493B2 (en) * | 2014-10-22 | 2019-05-28 | Sony Semiconductor Solutions Corporation | Phase-locked loop and frequency synthesizer |
| JP2021027496A (ja) * | 2019-08-07 | 2021-02-22 | セイコーエプソン株式会社 | 回路装置、物理量測定装置、電子機器及び移動体 |
| CN113114237B (zh) * | 2021-03-03 | 2022-08-23 | 浙江大学 | 一种能够实现快速频率锁定的环路系统 |
Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US6429693B1 (en) * | 2000-06-30 | 2002-08-06 | Texas Instruments Incorporated | Digital fractional phase detector |
| US20080129574A1 (en) * | 2006-11-24 | 2008-06-05 | Hyoung-Chul Choi | Time-to-digital converter with high resolution and wide measurement range |
| US20090219073A1 (en) * | 2008-03-03 | 2009-09-03 | Qualcomm Incorporated | High resolution time-to-digital converter |
| US20100066421A1 (en) * | 2008-09-18 | 2010-03-18 | Qualcomm Incorporated | Adaptive calibration for digital phase-locked loops |
Family Cites Families (14)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP4883031B2 (ja) * | 2008-03-18 | 2012-02-22 | パナソニック株式会社 | 受信装置と、これを用いた電子機器 |
| JP2010028600A (ja) * | 2008-07-23 | 2010-02-04 | Sony Corp | Tdc回路、pll回路、並びに無線通信装置 |
| US8654006B2 (en) * | 2009-02-13 | 2014-02-18 | Freescale Semiconductor, Inc. | Integrated circuit comprising frequency generation circuitry for controlling a frequency source |
| US8076960B2 (en) * | 2009-04-29 | 2011-12-13 | Qualcomm Incorporated | Digital phase-locked loop with two-point modulation using an accumulator and a phase-to-digital converter |
| US8515374B2 (en) * | 2009-07-02 | 2013-08-20 | Semiconductor Components Industries, Llc | PLL circuit, and radio communication apparatus equipped with same |
| JP2011205328A (ja) * | 2010-03-25 | 2011-10-13 | Toshiba Corp | 局部発振器 |
| JP2012060395A (ja) * | 2010-09-08 | 2012-03-22 | Panasonic Corp | Pll周波数シンセサイザ |
| JP5609585B2 (ja) * | 2010-11-25 | 2014-10-22 | ソニー株式会社 | Pll回路、pll回路の誤差補償方法及び通信装置 |
| KR101695311B1 (ko) * | 2010-12-23 | 2017-01-11 | 한국전자통신연구원 | 아날로그 위상에러 보상기를 장착한 프랙셔널 디지털 위상고정루프 |
| KR101737808B1 (ko) * | 2010-12-23 | 2017-05-19 | 연세대학교 산학협력단 | 동작 환경에 둔감한 지터 특성을 가지는 디지털 위상고정루프 |
| US8207770B1 (en) * | 2010-12-23 | 2012-06-26 | Intel Corporation | Digital phase lock loop |
| US8476945B2 (en) * | 2011-03-23 | 2013-07-02 | International Business Machines Corporation | Phase profile generator |
| US8508266B2 (en) * | 2011-06-30 | 2013-08-13 | Broadcom Corporation | Digital phase locked loop circuits with multiple digital feedback loops |
| US8390349B1 (en) * | 2012-06-26 | 2013-03-05 | Intel Corporation | Sub-picosecond resolution segmented re-circulating stochastic time-to-digital converter |
-
2010
- 2010-11-25 JP JP2010262781A patent/JP5609585B2/ja not_active Expired - Fee Related
-
2011
- 2011-10-27 US US13/282,841 patent/US8575980B2/en not_active Expired - Fee Related
- 2011-11-18 CN CN2011103925960A patent/CN102480290A/zh active Pending
Patent Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US6429693B1 (en) * | 2000-06-30 | 2002-08-06 | Texas Instruments Incorporated | Digital fractional phase detector |
| US20080129574A1 (en) * | 2006-11-24 | 2008-06-05 | Hyoung-Chul Choi | Time-to-digital converter with high resolution and wide measurement range |
| US20090219073A1 (en) * | 2008-03-03 | 2009-09-03 | Qualcomm Incorporated | High resolution time-to-digital converter |
| US20100066421A1 (en) * | 2008-09-18 | 2010-03-18 | Qualcomm Incorporated | Adaptive calibration for digital phase-locked loops |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN108459491A (zh) * | 2017-02-22 | 2018-08-28 | 精工爱普生株式会社 | 电路装置、物理量测量装置、电子设备和移动体 |
| US11949424B2 (en) * | 2020-12-24 | 2024-04-02 | Shenzhen Zhoncent Technologies Co., Ltd. | Device, method and storage medium for frequency calibration for voltage-controlled oscillators |
Also Published As
| Publication number | Publication date |
|---|---|
| JP2012114736A (ja) | 2012-06-14 |
| JP5609585B2 (ja) | 2014-10-22 |
| US20120133401A1 (en) | 2012-05-31 |
| US8575980B2 (en) | 2013-11-05 |
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Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| C06 | Publication | ||
| PB01 | Publication | ||
| C10 | Entry into substantive examination | ||
| SE01 | Entry into force of request for substantive examination | ||
| C02 | Deemed withdrawal of patent application after publication (patent law 2001) | ||
| WD01 | Invention patent application deemed withdrawn after publication |
Application publication date: 20120530 |