CN102197347A - 晶片级降压转换器 - Google Patents

晶片级降压转换器 Download PDF

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CN102197347A
CN102197347A CN2009801430042A CN200980143004A CN102197347A CN 102197347 A CN102197347 A CN 102197347A CN 2009801430042 A CN2009801430042 A CN 2009801430042A CN 200980143004 A CN200980143004 A CN 200980143004A CN 102197347 A CN102197347 A CN 102197347A
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CN102197347B (zh
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刘永
王�琦
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Fairchild Semiconductor Corp
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Abstract

本发明涉及一种降压转换器模块，其包含：高侧(HS)裸片，在所述HS裸片的前侧上具有源极接合垫、漏极接合垫及栅极接合垫；低侧(LS)裸片，其具有第一区段，其中多个穿硅导通孔(TSV)从所述LS裸片的背侧延伸到前侧，所述LS裸片具有位于与所述第一区段分离的第二区段的前侧上的源极接合垫、漏极接合垫及栅极接合垫，所述漏极接合垫在所述第二区段中电连接到所述LS裸片的所述背侧。所述HS裸片与所述LS裸片接合在一起使得所述HS裸片的所述源极接合垫电连接到所述LS裸片的所述背侧，且所述漏极接合垫及栅极接合垫中的每一者电连接到所述LS裸片中的单独TSV。

Description

晶片级降压转换器
相关申请案交叉参考
本申请案主张2008年10月31日提出申请的第12/262,570号美国专利申请案的优先权，所述专利申请案的说明书特此以引用的方式并入本文中。
技术领域
本发明涉及同步降压转换器，且更特定来说涉及多裸片同步降压转换器。
背景技术
主要用于步降电源电路中的同步降压转换器通常包含两个切换场效应晶体管(FET)及用以准许对所述FET的数字而非模拟控制的串联电感器，所述FET将电流供应到所述电感器中或从所述电感器汲取回电流。与模拟电源相比，具有FET切换晶体管的同步降压转换器为小的且使用极小的额外开销电流。因此，其经常用于移动电子装置。由于在此类装置中空间是重要的考虑因素，因此同步降压转换器的大小在市场上颇为重要。
发明内容
在本发明的一种形式中，其包括一种降压转换器模块，其包含：高侧(HS)裸片，在所述HS裸片的前侧上具有源极接合垫、漏极接合垫及栅极接合垫；低侧(LS)裸片，其具有第一区段，其中多个穿硅导通孔(TSV)从所述LS裸片的背侧延伸到前侧，所述LS裸片具有位于与所述第一区段分离的第二区段的前侧上的源极接合垫、漏极接合垫及栅极接合垫，所述漏极接合垫在所述第二区段中电连接到所述LS裸片的所述背侧。所述HS裸片与所述LS裸片接合在一起使得所述HS裸片的所述源极接合垫电连接到所述LS裸片的所述背侧，且所述漏极接合垫及栅极接合垫中的每一者电连接到所述LS裸片中的单独TSV。
在又一形式中，本发明包含一种用于制作降压转换器模块的方法。所述方法包括以下步骤：形成高侧(HS)裸片，在所述HS裸片的第一区段中所述HS裸片的前侧上具有源极接合垫，且在所述HS裸片的第二区段的所述第一侧上具有漏极接合垫及栅极接合垫；形成低侧(LS)裸片，所述LS裸片的第一区段中在所述LS裸片的前侧上具有源极接合垫、漏极接合垫及栅极接合垫，所述LS裸片的所述前侧具有与所述LS裸片的所述前侧相对的背侧，其中所述第一区段中具有位于所述LS裸片的所述背侧处的漏极连接；在所述LS裸片的第二区段中形成多个穿硅导通孔(TSV)，所述TSV从所述LS裸片的所述前侧延伸到所述背侧；及将所述HS裸片的所述源极接合垫电连接到位于所述LS裸片的所述背侧处的所述漏极连接，并将所述HS裸片的所述漏极接合垫及栅极接合垫连接到所述LS裸片的所述背侧上的所述TSV的端。
附图说明
依据结合附图阅读的以下更详细说明，将更好地理解前述及其它特征、特性、优点及本发明大体内容。
图1是包含高侧MOSFET及低侧MOSFET的同步降压转换器的示意图；
图2是根据本发明一实施例的包含图1中所示的高侧MOSFET及低侧MOSFET的晶片级降压转换器模块的侧视图；
图3A、3B及3C是图2中所示的高侧MOSFET的相应俯视图、侧视图及仰视图；
图4A、4B及4C是图2中所示的低侧MOSFET的相应俯视图、侧视图及仰视图；
图5A、5B、5C、5D、5E、5F、5G及5H展示在制作图2中所示的低侧MOSFET时的选定处理阶段；
图6展示在制作图2中所示的高侧MOSFET时的处理阶段；且
图7A、7B及7C展示在组装低侧MOSFET与高侧MOSFET以形成图2中所示的晶片级降压转换器模块期间的选定处理阶段。
将了解，出于清晰的目的且在认为适当的情况下，已在图中重复参考编号以指示对应的特征。此外，在一些情况下，已使图式中各种对象的相对大小发生变形以更清楚地展示本发明。
具体实施方式
现在转到图式，图1是包含高侧MOSFET 12及低侧MOSFET 14的同步降压转换器10的示意图，高侧MOSFET 12及低侧MOSFET 14的栅极由同步控制器16驱动。负载18通过电感器19耦合到高侧MOSFET 12的源极与低侧MOSFET 14的漏极的共用节点。虽然MOSFET 12及14为N沟道装置，但本发明适用于P沟道装置且还适用于针对MOSFET 12及14的互补N及P沟道装置。
图2是根据本发明一实施例的包含图1中所示的高侧MOSFET 12及低侧MOSFET 14的晶片级降压转换器模块20的侧视图。高侧MOSFET 12的高侧(HS)裸片22与低侧MOSFET 14的低侧(LS)裸片24两者经翻转，使得有源区域在两个裸片22、24的底部侧处。图2中展示了连接到LS裸片24的漏极接合垫的两个焊料凸块26及28以及通过穿硅导通孔(TSV)46连接到HS裸片22的栅极的第三焊料凸块30。已在HS裸片22的接合垫上形成可为铜螺柱或金凸块的九个金属板。所述金属板中的两者32及34连接到HS裸片22的源极接合垫，且金属板36连接到HS裸片22的栅极接合垫。在HS裸片22与LS裸片24之间的是各向异性导电膜(ACF)38，其将所述金属板中的六者(包含金属板32及34)电连接到LS裸片24的漏极且将三个额外金属板(包含金属板36)电连接到LS裸片24中的三个TSV。
LS裸片24的右部分延伸于LS裸片24的TSV区域44中的两个电介质层40与42之间且含有图4A及4C中所示的三个TSV 46、48及50。LS裸片24的有源区域不延伸到TSV区域44中。
图3A、3B及3C是HS裸片22的相应俯视图、侧视图及仰视图，其展示九个板32、34、36、52、54、56、58、60及62，所述板中的三者展示于图2中。图3A中所示的HS裸片22的顶表面可为MOSFET 12的漏极区域、可与MOSFET 12完全隔离或者可连接到MOSFET 12的除漏极外的有源区域。图3B的侧视图包含三个板32、34及36。连接到HS裸片22的板的相应MOSFET端子由在图3C中所示的实施例中指示HS MOSFET 12的源极、漏极及栅极的字母“S”、“D”及“G”指示。
图4A、4B及4C是图2中所示的LS裸片24的相应俯视图、侧视图及仰视图，其展示三个TSV 46、48及50以及六个接合垫66、68、70、72、74及76。LS裸片24的相应接合垫由在图4C中所示的实施例中指示LS MOSFET 14的源极接合垫、漏极接合垫及栅极接合垫的字母“S”、“D”及“G”指示。图4A到4C中还展示LS裸片24的TSV区域44中的上部及下部电介质层40及42。
图5A到5H展示制作图2中所示的而仍呈晶片79的形式的LS裸片24时的选定处理阶段，且展示两个LS裸片24的各自沿着图4A中所示的线5A-H-5A-H截取的横截面。图5A到5H展示一种形成TSV 44的方法，然而还可使用替代方法，例如岛本·H.(Shimamoto，H.)的“3D芯片堆叠式MCP/SiP的技术趋势(Technical Trend of 3DChip Stacked MCP/SiP)”(2007年电子组件与技术会议(Electronic Components and Technology Conference，2007))中所示的那些方法。
现在转到图5A，已完成LS裸片24的有源区域(由虚线80指示)，且已使用第一掩模84在TSV区域44中形成沟槽82。漏极接合垫68与晶片79的在有源区80之外的部分之间的连接(如由虚线85指示)形成漏极接合垫66、68与LS裸片24的背侧之间的连接。在图5B中，用第二掩模86替换第一掩模84且蚀刻工艺在LS裸片22的上表面中邻近所述沟槽形成凹入区域88且还使沟槽82加深。使用相同第二掩模86执行沉积工艺(例如PECVD电介质膜或SACVD电介质膜的沉积)或类似工艺以沿着沟槽82的壁及底部形成电介质层90并填充凹入区域88，其形成图2中所示的电介质层42。用如图5D中所示的第三掩模92替换图5C中的掩模86，且在沟槽电介质层90的顶表面中且邻近沟槽电介质层90的内表面蚀刻比凹部88窄的另一组凹部94。使用相同掩模92在沟槽82及凹部94中沉积敷金属96，如图5E中所示。
图5F展示在以下操作之后上下倒置的晶片79：已移除第三掩模92、已将保护胶带100施加到LS裸片24的顶部且晶片79的背侧已经历背磨操作以使晶片79变薄并在晶片79的背侧上暴露敷金属96。使用第四掩模102，蚀刻工艺在LS裸片22的背侧表面中邻近敷金属96形成凹入区域104，如图5G中所示。接着，如图5H中所示，使用相同第四掩模102的氧化工艺用电介质材料106(其可为经沉积以形成电介质层90及42的相同材料)填充凹入区域104，以形成图2中所示的电介质层40。
图6展示HS晶片110的若干部分，其包含两个HS裸片22的各自沿着图3A中所示的线6、7A-7C-6、7A-7C截取的横截面，其中金属板36、56及62附接到HS裸片22的接合垫112。已将顶部上具有释放膜116的ACF膜38施加到前侧，所述侧含有晶片110的在虚线轮廓114内的有源区域及金属板36。
图7A到7C展示在以下操作之后的图5H中所示的LS晶片79及图6中所示的HS晶片110的若干部分：已自ACF 38移除释放膜116且已翻转HS晶片110并将其与LS晶片79对准。图7A展示在以下操作之后的两个晶片：已在约110℃的固化开始温度下对其进行热压缩以将两个晶片与ACF 38接合在一起。图7B展示在以下操作之后的两个晶片79、110：移除LS晶片79的前侧上的保护胶带，且已对所有接合垫66、68、70、72、74及76以及TSV 46、48及50进行焊料凸块形成。焊料凸块30及120分别通过TSV 46及48连接到高侧MOSFET 12的漏极，且焊料凸块122通过TSV50连接到高侧MOSFET 12的栅极。图7C展示在已将经接合的晶片单个化之后的两个个别晶片尺寸降压模块20。
尽管已参考特定实施例描述了本发明，但所属领域的技术人员将理解，可做出各种改变且可用等效物替代所述实施例的要素而不背离本发明的范围。另外，可做出许多修改以使特定情形或材料适于本发明的教示内容而不背离本发明的范围。
因此，本文并非打算将本发明限于作为实施本发明的最佳预期模式揭示的特定实施例，而是打算使本发明将包含归属于所附权利要求书的范围及精神内的所有实施例。

Claims (26)

1.一种降压转换器模块，其包括：
a)高侧(HS)裸片，在所述HS裸片的前侧上具有源极接合垫、漏极接合垫及栅极接合垫；
b)低侧(LS)裸片，其具有第一区段，其中多个穿硅导通孔(TSV)从所述LS裸片的背侧延伸到前侧，所述LS裸片具有位于与所述第一区段分离的第二区段的前侧上的源极接合垫、漏极接合垫及栅极接合垫，所述漏极接合垫在所述第二区段中电连接到所述LS裸片的所述背侧；且
c)所述HS裸片与所述LS裸片接合在一起使得所述HS裸片的所述源极接合垫电连接到所述LS裸片的所述背侧，且所述漏极接合垫及栅极接合垫中的每一者电连接到所述LS裸片中的单独TSV。
2.根据权利要求1所述的降压转换器模块，其进一步包含所述LS裸片的所述接合垫上及所述LS裸片的所述前侧上的所述TSV上的焊料凸块。
3.根据权利要求1所述的降压转换器模块，其进一步包含将所述LS裸片与所述HS裸片连接并接合在一起的各向异性导电膜。
4.根据权利要求1所述的降压转换器模块，其进一步包含附接到所述HS裸片的所述源极接合垫、漏极接合垫及栅极接合垫的金属板。
5.根据权利要求4所述的降压转换器模块，其中所述金属板包括铜螺柱及金凸块中的一者。
6.根据权利要求1所述的降压转换器模块，其中所述LS裸片的所述前侧上的所述TSV具有大于所述LS裸片的所述背侧上的所述TSV的表面积。
7.根据权利要求1所述的降压转换器模块，其中所述TSV的侧与所述LS裸片的其余部分绝缘。
8.根据权利要求1所述的降压转换器模块，其进一步包含所述LS裸片的所述前侧及所述背侧的表面上的位于所述TSV之间的电绝缘材料。
9.根据权利要求8所述的降压转换器模块，其中所述第一及第二区域中的所述绝缘材料层在所述第一区段中延伸到所述LS裸片的三个侧。
10.一种降压转换器模块，其包括：
a)高侧(HS)裸片，在所述HS裸片的前侧上具有源极接合垫、漏极接合垫及栅极接合垫，其中金属板附接到所述接合垫中的每一者；
b)低侧(LS)裸片，其具有第一区段，其中多个穿硅导通孔(TSV)从所述LS裸片的背侧延伸到前侧，所述LS裸片具有位于与所述第一区段分离的第二区段的前侧上的源极接合垫、漏极接合垫及栅极接合垫，所述漏极接合垫在所述第一区段中电连接到所述LS裸片的所述背侧，其中所述TSV的侧与延伸于所述TSV之间且在所述LS裸片的所述前侧及所述背侧上延伸到所述LS裸片的三个侧的绝缘体接触；
c)所述HS裸片与所述LS裸片通过各向异性导电膜接合在一起使得所述HS裸片的所述源极接合垫电连接到所述LS裸片的所述背侧，且所述漏极接合垫及栅极接合垫中的每一者电连接到所述LS裸片中的单独TSV；及
d)多个焊料凸块，其附接到所述LS裸片的所述接合垫及位于所述LS裸片的所述前侧的所述TSV上。
11.根据权利要求10所述的降压转换器模块，其进一步包含附接到所述源极接合垫、漏极接合垫及栅极接合垫的金属板。
12.根据权利要求11所述的降压转换器模块，其中所述金属板包括铜螺柱及金凸块中的一者。
13.一种制作降压转换器模块的方法，其包括以下步骤：
a)形成高侧(HS)裸片，在所述HS裸片的第一区段中所述HS裸片的前侧上具有源极接合垫，且在所述HS裸片的第二区段的所述第一侧上具有漏极接合垫及栅极接合垫；
b)形成低侧(LS)裸片，在所述LS裸片的第一区段中所述LS裸片的前侧上具有源极接合垫、漏极接合垫及栅极接合垫，所述LS裸片的所述前侧具有与所述LS裸片的所述前侧相对的背侧，其中在所述第一区段中所述LS裸片的所述背侧处具有漏极连接；
c)在所述LS裸片的第二区段中形成多个穿硅导通孔(TSV)，所述TSV从所述LS裸片的所述前侧延伸到所述背侧；及
d)将所述HS裸片的所述源极接合垫电连接到所述LS裸片的所述背侧处的所述漏极连接，并将所述HS裸片的所述漏极接合垫及栅极接合垫连接到所述LS裸片的所述背侧上的所述TSV的端。
14.根据权利要求13所述的方法，其中借助各向异性导电膜进行所述HS裸片与所述LS裸片之间的所述电连接，所述各向异性导电膜还将所述HS裸片与所述LS裸片接合在一起。
15.根据权利要求13所述的方法，其进一步包括将焊料凸块附接到所述LS裸片上的所述接合垫及所述LS裸片的所述前侧上的所述TSV的步骤。
16.根据权利要求13所述的方法，其中所述HS裸片与所述LS裸片之间的所述电连接包含附接到所述HS裸片的所述源极接合垫、漏极接合垫及栅极接合垫的金属板。
17.根据权利要求16所述的方法，其中所述金属板包括铜螺柱及金凸块中的一者。
18.根据权利要求13所述的方法，其中所述LS裸片的所述前侧上的所述TSV具有大于所述LS裸片的所述背侧上的所述TSV的表面积。
19.根据权利要求13所述的方法，其中使所述TSV的侧与所述LS裸片的其余部分电绝缘。
20.根据权利要求13所述的方法，其中在所述LS裸片的所述第二区段中所述前侧表面及背侧表面上形成电绝缘材料，所述电绝缘材料延伸于所述TSV之间且延伸到所述LS裸片的三个侧。
21.一种制作降压转换器模块的方法，其包括以下步骤：
a)形成高侧(HS)裸片晶片，所述HS裸片晶片具有至少两个间隔开的HS裸片，所述HS裸片中的每一者在所述HS裸片中的每一者的第一区段中所述HS裸片中的每一者的前侧上具有源极接合垫且在所述HS裸片中的每一者的第二区段的所述第一侧上具有漏极接合垫及栅极接合垫；
b)形成低侧(LS)裸片晶片，所述LS裸片晶片具有至少两个间隔开的LS裸片，所述LS裸片中的每一者在所述LS裸片中的每一者的第一区段中所述LS裸片中的每一者的前侧上具有源极接合垫、漏极接合垫及栅极接合垫；
c)在所述LS裸片中的每一者的第二区段中将多个沟槽形成到所述前侧中；
d)在每一晶片的所述前侧上所述多个沟槽中的每一者周围移除所述LS裸片晶片的第一部分；
e)对所述沟槽及所述沟槽周围的所述第一部分进行氧化；
f)用敷金属填充所述沟槽；
g)通过从所述LS裸片晶片的所述背侧移除半导体材料来使所述LS裸片晶片变薄，以便在所述LS裸片晶片的背侧上暴露所述填充有敷金属的沟槽，所述LS裸片中的每一者在所述第一区段中的每一者中所述LS裸片晶片的所述背侧中的每一者处具有漏极连接；
h)在每一晶片的所述背侧上所述多个沟槽中的每一者周围移除所述LS裸片晶片的第二部分并对所述第二部分中的每一者进行氧化；
i)将所述HS裸片晶片附接到所述LS裸片晶片使得所述HS裸片中的每一者的所述源极接合垫在对应LS裸片的所述背侧中电连接到所述第一区段，且所述HS裸片中的每一者的所述漏极接合垫及栅极接合垫在所述对应LS裸片的所述第二区段中电连接到所述填充有敷金属的沟槽中的一者。
22.根据权利要求21所述的方法，其中借助各向异性导电膜进行所述HS裸片与所述LS裸片之间的所述电连接，所述各向异性导电膜还将所述HS裸片晶片与所述LS裸片晶片接合在一起。
23.根据权利要求21所述的方法，其进一步包括将焊料凸块附接到所述LS裸片上的所述接合垫及所述LS裸片的所述前侧上的所述填充有敷金属的沟槽的步骤。
24.根据权利要求21所述的方法，其中所述HS裸片与所述LS裸片之间的所述电连接包含附接到所述HS裸片中的每一者的所述源极接合垫、漏极接合垫及栅极接合垫的金属板。
25.根据权利要求24所述的方法，其中所述金属板包括铜螺柱及金凸块中的一者。
26.根据权利要求21所述的方法，其中所述LS裸片中的每一者的所述第一经氧化部分及第二经氧化部分覆盖所述LS裸片中的所述第二区段的所述前侧及所述背侧。
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WO2010062467A1 (en) 2010-06-03
US8222081B2 (en) 2012-07-17
KR101138580B1 (ko) 2012-05-10
CN102197347B (zh) 2014-02-12
US20100109129A1 (en) 2010-05-06
TWI481005B (zh) 2015-04-11
KR20110119846A (ko) 2011-11-02
US20120100670A1 (en) 2012-04-26
TW201021194A (en) 2010-06-01
KR101167821B1 (ko) 2012-07-26

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