CN102157521B - 半导体集成电路 - Google Patents
半导体集成电路 Download PDFInfo
- Publication number
- CN102157521B CN102157521B CN201110068579.1A CN201110068579A CN102157521B CN 102157521 B CN102157521 B CN 102157521B CN 201110068579 A CN201110068579 A CN 201110068579A CN 102157521 B CN102157521 B CN 102157521B
- Authority
- CN
- China
- Prior art keywords
- switch
- line
- block
- semiconductor integrated
- circuit
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Active
Links
Classifications
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K17/00—Electronic switching or gating, i.e. not by contact-making and –breaking
- H03K17/51—Electronic switching or gating, i.e. not by contact-making and –breaking characterised by the components used
- H03K17/56—Electronic switching or gating, i.e. not by contact-making and –breaking characterised by the components used by the use, as active elements, of semiconductor devices
- H03K17/687—Electronic switching or gating, i.e. not by contact-making and –breaking characterised by the components used by the use, as active elements, of semiconductor devices the devices being field-effect transistors
- H03K17/6871—Electronic switching or gating, i.e. not by contact-making and –breaking characterised by the components used by the use, as active elements, of semiconductor devices the devices being field-effect transistors the output circuit comprising more than one controlled field-effect transistor
- H03K17/6872—Electronic switching or gating, i.e. not by contact-making and –breaking characterised by the components used by the use, as active elements, of semiconductor devices the devices being field-effect transistors the output circuit comprising more than one controlled field-effect transistor using complementary field-effect transistors
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K17/00—Electronic switching or gating, i.e. not by contact-making and –breaking
- H03K17/16—Modifications for eliminating interference voltages or currents
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
- H03K19/0175—Coupling arrangements; Interface arrangements
- H03K19/0185—Coupling arrangements; Interface arrangements using field effect transistors only
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K3/00—Circuits for generating electric pulses; Monostable, bistable or multistable circuits
- H03K3/01—Details
- H03K3/012—Modifications of generator to improve response time or to decrease power consumption
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
- H10D84/80—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of at least one component covered by groups H10D12/00 or H10D30/00, e.g. integration of IGFETs
- H10D84/82—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of at least one component covered by groups H10D12/00 or H10D30/00, e.g. integration of IGFETs of only field-effect components
- H10D84/83—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of at least one component covered by groups H10D12/00 or H10D30/00, e.g. integration of IGFETs of only field-effect components of only insulated-gate FETs [IGFET]
- H10D84/85—Complementary IGFETs, e.g. CMOS
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D89/00—Aspects of integrated devices not covered by groups H10D84/00 - H10D88/00
- H10D89/10—Integrated device layouts
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
- H10D84/90—Masterslice integrated circuits
- H10D84/903—Masterslice integrated circuits comprising field effect technology
- H10D84/907—CMOS gate arrays
Landscapes
- Engineering & Computer Science (AREA)
- Computer Hardware Design (AREA)
- General Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- Computing Systems (AREA)
- Mathematical Physics (AREA)
- Semiconductor Integrated Circuits (AREA)
- Design And Manufacture Of Integrated Circuits (AREA)
Applications Claiming Priority (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2007241517A JP5528662B2 (ja) | 2007-09-18 | 2007-09-18 | 半導体集積回路 |
| JP241517/07 | 2007-09-18 |
Related Parent Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN2008101494840A Division CN101393910B (zh) | 2007-09-18 | 2008-09-18 | 半导体集成电路 |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| CN102157521A CN102157521A (zh) | 2011-08-17 |
| CN102157521B true CN102157521B (zh) | 2014-08-20 |
Family
ID=40453812
Family Applications (2)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201110068579.1A Active CN102157521B (zh) | 2007-09-18 | 2008-09-18 | 半导体集成电路 |
| CN2008101494840A Expired - Fee Related CN101393910B (zh) | 2007-09-18 | 2008-09-18 | 半导体集成电路 |
Family Applications After (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN2008101494840A Expired - Fee Related CN101393910B (zh) | 2007-09-18 | 2008-09-18 | 半导体集成电路 |
Country Status (4)
| Country | Link |
|---|---|
| US (7) | US7940080B2 (enExample) |
| JP (1) | JP5528662B2 (enExample) |
| CN (2) | CN102157521B (enExample) |
| TW (1) | TWI430398B (enExample) |
Families Citing this family (21)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP5528662B2 (ja) * | 2007-09-18 | 2014-06-25 | ソニー株式会社 | 半導体集積回路 |
| US8495547B2 (en) * | 2009-11-11 | 2013-07-23 | International Business Machines Corporation | Providing secondary power pins in integrated circuit design |
| JP5404678B2 (ja) * | 2011-03-10 | 2014-02-05 | 株式会社東芝 | 電源制御装置 |
| US8451026B2 (en) * | 2011-05-13 | 2013-05-28 | Arm Limited | Integrated circuit, method of generating a layout of an integrated circuit using standard cells, and a standard cell library providing such standard cells |
| US8902625B2 (en) * | 2011-11-22 | 2014-12-02 | Marvell World Trade Ltd. | Layouts for memory and logic circuits in a system-on-chip |
| US8823399B1 (en) | 2013-10-07 | 2014-09-02 | Cypress Semiconductor Corporation | Detect and differentiate touches from different size conductive objects on a capacitive button |
| JP6264860B2 (ja) | 2013-11-27 | 2018-01-24 | セイコーエプソン株式会社 | 記録装置 |
| US9305898B2 (en) | 2014-01-23 | 2016-04-05 | Freescale Semiconductor, Inc. | Semiconductor device with combined power and ground ring structure |
| US9177834B2 (en) | 2014-02-19 | 2015-11-03 | Freescale Semiconductor, Inc. | Power bar design for lead frame-based packages |
| CN109155284B (zh) * | 2016-06-01 | 2022-09-23 | 株式会社索思未来 | 半导体集成电路装置 |
| KR102630392B1 (ko) | 2016-12-06 | 2024-01-29 | 삼성전자주식회사 | 반도체 장치, 반도체 장치의 레이아웃 설계 방법, 및 반도체 장치의 제조 방법 |
| US10417371B2 (en) * | 2017-01-27 | 2019-09-17 | Arm Limited | Power grid healing techniques |
| US10452803B2 (en) * | 2017-01-27 | 2019-10-22 | Arm Limited | Power grid insertion technique |
| JP7041368B2 (ja) * | 2017-03-29 | 2022-03-24 | 株式会社ソシオネクスト | 半導体集積回路装置 |
| US10346574B2 (en) * | 2017-06-16 | 2019-07-09 | Qualcomm Incorporated | Effective substitution of global distributed head switch cells with cluster head switch cells |
| JP7077816B2 (ja) | 2018-06-25 | 2022-05-31 | 株式会社ソシオネクスト | 半導体装置 |
| WO2020217400A1 (ja) | 2019-04-25 | 2020-10-29 | 株式会社ソシオネクスト | 半導体装置 |
| WO2020217396A1 (ja) | 2019-04-25 | 2020-10-29 | 株式会社ソシオネクスト | 半導体装置 |
| CN112864127B (zh) * | 2019-11-28 | 2024-03-08 | 扬智科技股份有限公司 | 集成电路的导线互连结构 |
| CN116472605B (zh) * | 2020-11-27 | 2025-06-24 | 株式会社索思未来 | 半导体集成电路装置的设计方法、半导体集成电路装置以及计算机可读记录介质 |
| CN113515826B (zh) * | 2021-04-09 | 2022-11-25 | 云南电网有限责任公司昆明供电局 | 配电网合环线路拓扑搜索方法及系统 |
Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2888898B2 (ja) * | 1990-02-23 | 1999-05-10 | 株式会社日立製作所 | 半導体集積回路 |
| CN1423420A (zh) * | 2001-11-22 | 2003-06-11 | 富士通株式会社 | 多阈值mis集成电路器件及其电路设计方法 |
| CN1697180A (zh) * | 2004-05-13 | 2005-11-16 | 株式会社东芝 | 半导体集成电路及半导体集成电路的设计方法 |
Family Cites Families (24)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| TW382164B (en) | 1996-04-08 | 2000-02-11 | Hitachi Ltd | Semiconductor IC device with tunnel current free MOS transistors for power supply intercept of main logic |
| JP4056107B2 (ja) | 1997-06-20 | 2008-03-05 | エルピーダメモリ株式会社 | 半導体集積回路 |
| JP3786608B2 (ja) * | 2002-01-28 | 2006-06-14 | 株式会社ルネサステクノロジ | 半導体集積回路装置 |
| JP3951773B2 (ja) | 2002-03-28 | 2007-08-01 | 富士通株式会社 | リーク電流遮断回路を有する半導体集積回路 |
| US7078932B2 (en) * | 2003-04-25 | 2006-07-18 | Stmicroelectronics Pvt. Ltd. | Programmable logic device with reduced power consumption |
| US6861753B1 (en) * | 2003-10-09 | 2005-03-01 | International Business Machines Corporation | Method and apparatus for performing power routing on a voltage island within an integrated circuit chip |
| JP4435553B2 (ja) * | 2003-12-12 | 2010-03-17 | パナソニック株式会社 | 半導体装置 |
| JP4200926B2 (ja) * | 2004-03-10 | 2008-12-24 | ソニー株式会社 | 半導体集積回路 |
| JP4428514B2 (ja) * | 2004-03-30 | 2010-03-10 | 株式会社ルネサステクノロジ | 半導体集積回路装置 |
| WO2005104233A1 (en) | 2004-04-27 | 2005-11-03 | Koninklijke Philips Electronics N.V. | Integrated circuit layout for virtual power supply |
| US7279926B2 (en) * | 2004-05-27 | 2007-10-09 | Qualcomm Incoporated | Headswitch and footswitch circuitry for power management |
| EP1638145A1 (en) * | 2004-09-20 | 2006-03-22 | Infineon Technologies AG | Embedded switchable power ring |
| US20090079465A1 (en) * | 2005-04-21 | 2009-03-26 | Toshio Sasaki | Semiconductor integrated circuit |
| JP2007158035A (ja) * | 2005-12-06 | 2007-06-21 | Seiko Epson Corp | 半導体集積回路 |
| US7712066B2 (en) * | 2005-12-29 | 2010-05-04 | Agere Systems, Inc. | Area-efficient power switching cell |
| US7509613B2 (en) * | 2006-01-13 | 2009-03-24 | Sequence Design, Inc. | Design method and architecture for power gate switch placement and interconnection using tapless libraries |
| JP4188974B2 (ja) | 2006-02-06 | 2008-12-03 | 株式会社ルネサステクノロジ | 半導体集積回路 |
| JP2007243077A (ja) * | 2006-03-13 | 2007-09-20 | Renesas Technology Corp | 半導体集積回路装置 |
| KR100780750B1 (ko) * | 2006-05-11 | 2007-11-30 | 한국과학기술원 | 표준 셀과 파워 게이팅 셀을 이용한 파워 네트워크 및 이를가지는 반도체 장치 |
| US7723867B2 (en) * | 2007-05-31 | 2010-05-25 | Arm Limited | Power gating of circuits |
| JP5528662B2 (ja) * | 2007-09-18 | 2014-06-25 | ソニー株式会社 | 半導体集積回路 |
| JP4636077B2 (ja) * | 2007-11-07 | 2011-02-23 | ソニー株式会社 | 半導体集積回路 |
| JP4535134B2 (ja) * | 2008-01-16 | 2010-09-01 | ソニー株式会社 | 半導体集積回路およびその電源制御方法 |
| JP4535136B2 (ja) * | 2008-01-17 | 2010-09-01 | ソニー株式会社 | 半導体集積回路、および、スイッチの配置配線方法 |
-
2007
- 2007-09-18 JP JP2007241517A patent/JP5528662B2/ja active Active
-
2008
- 2008-08-22 US US12/230,098 patent/US7940080B2/en active Active
- 2008-09-09 TW TW097134560A patent/TWI430398B/zh active
- 2008-09-18 CN CN201110068579.1A patent/CN102157521B/zh active Active
- 2008-09-18 CN CN2008101494840A patent/CN101393910B/zh not_active Expired - Fee Related
-
2011
- 2011-01-06 US US12/929,180 patent/US8143914B2/en not_active Expired - Fee Related
-
2012
- 2012-02-13 US US13/371,994 patent/US8890568B2/en active Active
-
2014
- 2014-04-28 US US14/263,598 patent/US9058979B2/en active Active
-
2015
- 2015-03-23 US US14/665,662 patent/US9252763B2/en active Active
- 2015-12-01 US US14/956,250 patent/US9735775B2/en active Active
-
2017
- 2017-07-31 US US15/664,393 patent/US10263617B2/en active Active
Patent Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2888898B2 (ja) * | 1990-02-23 | 1999-05-10 | 株式会社日立製作所 | 半導体集積回路 |
| CN1423420A (zh) * | 2001-11-22 | 2003-06-11 | 富士通株式会社 | 多阈值mis集成电路器件及其电路设计方法 |
| CN1697180A (zh) * | 2004-05-13 | 2005-11-16 | 株式会社东芝 | 半导体集成电路及半导体集成电路的设计方法 |
Also Published As
| Publication number | Publication date |
|---|---|
| CN102157521A (zh) | 2011-08-17 |
| US20120256683A1 (en) | 2012-10-11 |
| US10263617B2 (en) | 2019-04-16 |
| JP5528662B2 (ja) | 2014-06-25 |
| CN101393910B (zh) | 2011-05-18 |
| US8890568B2 (en) | 2014-11-18 |
| US9058979B2 (en) | 2015-06-16 |
| US20150194955A1 (en) | 2015-07-09 |
| JP2009076501A (ja) | 2009-04-09 |
| US7940080B2 (en) | 2011-05-10 |
| US20170331472A1 (en) | 2017-11-16 |
| CN101393910A (zh) | 2009-03-25 |
| TW200935559A (en) | 2009-08-16 |
| US9252763B2 (en) | 2016-02-02 |
| US20160156349A1 (en) | 2016-06-02 |
| US8143914B2 (en) | 2012-03-27 |
| US9735775B2 (en) | 2017-08-15 |
| US20140232448A1 (en) | 2014-08-21 |
| US20110102076A1 (en) | 2011-05-05 |
| US20090072888A1 (en) | 2009-03-19 |
| TWI430398B (zh) | 2014-03-11 |
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Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| C06 | Publication | ||
| PB01 | Publication | ||
| C10 | Entry into substantive examination | ||
| SE01 | Entry into force of request for substantive examination | ||
| C14 | Grant of patent or utility model | ||
| GR01 | Patent grant |