CN102097343B - 铜线与载板焊垫的打线方法及其结构 - Google Patents

铜线与载板焊垫的打线方法及其结构 Download PDF

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CN102097343B
CN102097343B CN200910201113.7A CN200910201113A CN102097343B CN 102097343 B CN102097343 B CN 102097343B CN 200910201113 A CN200910201113 A CN 200910201113A CN 102097343 B CN102097343 B CN 102097343B
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copper cash
support plate
tin layer
weld pad
tail end
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CN102097343A (zh
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周若愚
史海涛
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Ase Assembly & Test (shanghai) Ltd
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Ase Assembly & Test (shanghai) Ltd
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Abstract

本发明公开一种铜线与载板焊垫的打线方法及其结构,其是在载板焊垫表面设有熔点较低的锡层,并在铜线打在锡层后进一步加热锡层来形成润湿结合部,以增加铜线尾端与载板焊垫的结合强度,因而有利于提高铜线打线接合的可靠度及良品率。再者,锡层的材料成本相对低于现有助焊层的材料成本,因而也有利于降低载板焊垫表面处理的材料成本。

Description

铜线与载板焊垫的打线方法及其结构
【技术领域】
本发明是有关于一种铜线与载板焊垫的打线方法及其结构,特别是有关于一种在载板焊垫表面设有熔点较低的锡层以便与铜线进行打线结合及润湿结合的打线方法及其结构。
【背景技术】
现有集成电路(IC)封装制造过程中,大多是以金线(gold wire)连接芯片与载板,但相较于金线,铜线(copper wire)具有低成本的优势且具有较佳的导电性、导热性及机械强度,故铜制焊线的线径可设计得更细且可提供较佳的散热效率,因而目前有一研发趋势是以铜线逐渐取代传统金线将其应用于半导体芯片的打线(wire bonding)工艺中。
请参照图1所示,现有铜线的打线(wire bonding)工艺包含的步骤为:首先,提供一芯片11及一载板12,所述芯片11具有数个接垫111,所述载板12具有数个焊垫121,所述载板12承载所述芯片11,所述焊垫121的表面可能预先设有一助焊层122,例如镍金(Ni/Au)复合层、镍钯金(Ni/Pd/Au)复合层、银层或有机可焊性保护层(organic solderability preservative,OSP)等;接着,通过一焊针13将一铜线14以电子点火方式处理以形成一结球端141(即第一端),并利用所述焊针13将所述结球端141热压结合在所述芯片11的接垫111上;之后,移动所述焊针13以引导所述铜线14至所述载板12的对应焊垫121上方;最后,利用所述焊针13将所述铜线14热压合扯断于所述焊垫121上而形成一尾端142(即第二端)。在上述打线期间,当所述铜线14形成所述结球端141时,所述焊针13是以一垂直向的压合力撞击所述接垫111,再以横向的拉力引导所述铜线14,而使所述铜线14呈弧形,最后再扯断所述铜线14形成所述尾端142。
在完成打线后,上述打线后的半成品必需进一步放入一封胶模具的模穴(未绘示)中以进行封胶(molding)作业,因此所述铜线14必需具备有相当的抗拉强度(tensile strength),以避免在封胶时受到模穴内流动的胶体的推动(即模流动作)而造成所述铜线14的偏移而接触相邻的其他铜线14,也就是造成所谓的冲线及短路等缺陷。因此,所述结球端141必需稳固的结合在所述接垫111以及所述尾端142必需稳固的结合在所述焊垫121,如此才能使所述铜线14具备足够的抗拉强度。然而,当对上述打线后的半成品进行拉线测试分析时,通常可发现大多数拉断位置发生在所述尾端142与焊垫121的结合处。因此,可推知虽然所述焊垫121的表面设置所述助焊层122可提高可焊接性,但对于所述尾端142与焊垫121的结合强度没有明显助益,而且所述助焊层122的材料成本偏高。为了改善此问题,当利用所述焊针13将所述铜线14热压合扯断于所述焊垫121上形成所述尾端142时,业者通常增加所述焊针13与所述铜线14的热压合时间或于压合时利用超音波震荡反复摩擦所述铜线14与所述助焊层122,使所述尾端142能以较大热压合面积来稳固结合于所述焊垫121上,以提供较高的结合强度。然而,上述第二端打线动作的改良却也增加整体打线时间,因而不利于提高每小时产出量(unit per hour,UPH)。此外,由于封胶作业时的胶体含有具腐蚀性的成份(如氯化物的氯离子),因此所述铜线14的尾端142因热压合而破坏的较薄表面结构容易受上述腐蚀成份侵蚀而氧化或氯化锈蚀,其将会影响打线接合的质量(quality)与讯号传输的杂讯比。
故,有必要提供一种铜线与载板焊垫的打线方法及其结构,以解决现有技术所存在的问题。
【发明内容】
本发明的主要目的在于提供一种铜线与载板焊垫的打线方法及其结构,其是在载板焊垫表面设有熔点较低的锡层,并在铜线打在锡层后进一步加热锡层来形成润湿结合部,以增加铜线尾端与载板焊垫的结合强度,因而有利于提高铜线打线接合的可靠度及良品率(yield)。
本发明的次要目的在于提供一种铜线与载板焊垫的打线方法及其结构,其是在载板焊垫表面设有熔点较低的锡层,锡的材料成本相对低于现有镍金复合层、镍钯金复合层、银层或有机可焊性保护层等助焊层的材料成本,因而有利于降低载板焊垫表面处理的材料成本。
本发明的另一目的在于提供一种铜线与载板焊垫的打线方法及其结构,其利用锡层本身及其形成的润湿结合部来包覆保护铜线热压合形成的尾端,以避免铜线的尾端受到封胶作业时的胶体侵蚀,因而有利于提高铜线打线接合的抗蚀性、结合稳定性及打线接合质量。
为达成本发明的前述目的,本发明提供一种铜线与载板焊垫的打线方法,其特征在于:所述打线方法包含:将一铜线热压合接合至一载板的一焊垫,以形成一接合界面,所述焊垫包含一锡层位于所述焊垫的最外层;将所述铜线扯断,而使所述铜线在所述锡层位置留下一尾端;以及,加热所述锡层,使所述锡层的表面延伸形成一润湿结合部来包覆所述铜线的尾端。
再者,本发明提供另一种铜线与载板焊垫的打线结构,其特征在于:所述打线结构包含:一载板,具有至少一焊垫,所述焊垫的最外层各具有一锡层;以及,至少一铜线,各具有一尾端,所述尾端热压合接合于所述锡层,以形成一接合界面;其中所述锡层的表面在与所述铜线的尾端的接触位置延伸形成一润湿结合部。
在本发明的一实施例中,所述锡层的厚度大于10微米(um)。
在本发明的一实施例中,所述接合界面形成于所述尾端与所述锡层之间,如所述铜线的尾端结合在所述锡层的内部。
在本发明的一实施例中,所述锡层的厚度小于10微米。
在本发明的一实施例中,所述焊垫包含一金属底层,所述金属底层至少部分被所述锡层覆盖,所述接合界面形成于所述尾端与所述金属底层之间,即所述铜线的尾端通过所述锡层并结合在所述金属底层的表面。
在本发明的一实施例中,在将所述铜线热压合接合至所述锡层之前,另包含:将一芯片固定到所述载板上;将所述铜线以电子点火方式处理以形成一结球端,并将所述结球端热压接合在所述芯片的一接垫上;以及,将所述铜线移动至所述载板的焊垫的锡层位置上方。
在本发明的一实施例中,所述芯片固定到所述载板时的环境温度为25℃。
在本发明的一实施例中,所述铜线进行热压合接合或扯断时的环境温度为介于150至200℃之间。
在本发明的一实施例中,加热所述锡层的温度大于230℃。
在本发明的一实施例中,所述金属底层的材料选自铜、金、银或其合金。
在本发明的一实施例中,在形成所述润湿结合部之后,另包含:利用一胶体封装包覆所述铜线、所述润湿结合部、所述锡层以及所述载板的部分表面。
在本发明的一实施例中,所述胶体另封装包覆所述结球端、所述接垫及所述芯片。
在本发明的一实施例中,利用所述胶体进行封装包覆的温度为介于150至200℃之间。
在本发明的一实施例中,所述锡层的材质是纯锡或锡合金。
在本发明的一实施例中,所述载板是封装基板或导线架。
【附图说明】
图1是一现有铜线的打线工艺的示意图。
图2是本发明第一实施例铜线与载板焊垫的打线方法及其结构的示意图。
图2A是本发明图2的局部放大示意图。
图3是本发明第二实施例铜线与载板焊垫的打线方法及其结构的示意图。
图3A是本发明图3的局部放大示意图。
【具体实施方式】
为让本发明上述目的、特征及优点更明显易懂,下文特举本发明较佳实施例,并配合附图,作详细说明如下:
请参照图2及2A所示,本发明第一实施例的铜线与载板焊垫的打线方法及其结构主要可应用于各种需要使用打线接合(wire bonding)工艺的集成电路(IC)封装制造过程中,且本发明特别使用铜线(copper wire),以提供低成本的优势、较佳的导电性、导热性及机械强度,且铜线的线径也可设计得更细且可提供较佳的散热效率。本发明第一实施例的铜线与载板焊垫的打线方法主要包含的步骤为:将一铜线2热压合接合至一载板3的一焊垫31,以形成一接合界面32,所述焊垫31包含一锡层312位于所述焊垫31的最外层;将所述铜线2扯断,而使所述铜线2在所述锡层312位置留下一尾端22;以及,加热所述锡层312,使所述锡层312的表面因润湿作用而延伸形成一润湿结合部33来包覆所述铜线2的尾端22。
请参照图2所示,本发明第一实施例的铜线与载板焊垫的打线方法首先将一铜线2热压合接合至一载板3的一焊垫31,以形成一接合界面32,所述焊垫31包含一锡层312位于所述焊垫31的最外层。在本步骤中,本发明可利用现有打线接合工艺使用的焊针(未绘示,如图1所示)来供应所述铜线2,所述焊针能以电子点火方式处理所述铜线2,使所述铜线2受热软化熔化,并同时将所述铜线2热压合接合至所述载板3表面的焊垫31的锡层312内部,使所述接合界面32形成于所述尾端22与所述锡层312之间,其中所述铜线2进行热压合接合时的环境温度为介于150至200℃之间。在本实施例中,所述载板3是一封装基板(substrate),例如单层或多层的印刷电路板。所述载板3的表面具有数个焊垫31,每一所述焊垫31各在一一金属底层311上预先利用电镀、无电电镀(electroless plating)或印刷(printing)等方式形成所述锡层312,必要时,所述载板3的表面可设计成具有一微小凹陷容置空间,以供依序形成所述金属底层311及锡层312,并使所述锡层312的表面与所述载板3的表面齐平。所述锡层312的厚度是设计成大于10微米(um),例如15微米、20微米、25微米、50微米或100微米等。所述焊垫31的金属底层311的材料通常为铜、金、银或其合金。所述锡层312的材料为纯锡(Sn)或其合金,例如锡银合金或锡银铜合金等。所述锡层312的硬度低于所述焊垫31的金属底层311的材料的硬度,因此所述铜线2能轻易结合至所述锡层312内部。在本实施例中,所述锡层312具有足够厚度,且所述铜线2仅需结合至所述锡层312的某一内部位置,而不需进一步向下接触所述焊垫31的金属底层311的表面。
此外,在某些实施方式中,所述载板3亦可能选自导线架(leadframe,未绘示),此时所述载板3表面的焊垫31的金属底层311是指数个内引脚的上表面,每一所述焊垫31的金属底层311上皆预先利用电镀、无电电镀(electroless plating)或印刷(printing)等方式形成所述锡层312。必要时,所述内引脚的上表面可设计成具有一微小凹陷容置空间,以供形成所述锡层312,并使所述锡层312的表面与所述载板3的表面齐平。
另外,在将所述铜线2热压合接合至所述锡层312之前,本发明另可预先进行下述步骤:将一芯片4固定到所述载板3上;将所述铜线2以电子点火方式处理以形成一结球端21,并将所述结球端21热压接合在所述芯片4的一接垫41上;以及,将所述铜线2移动至所述载板3的焊垫31的锡层312位置上方。上述将所述芯片4固定到所述载板3时的环境温度约为室温(25℃)。所述芯片4的一有源表面(active surface)朝上,所述有源表面设有数个所述接垫41。所述芯片4的一背面(active surface)朝下,并利用液态胶(adhesive)或粘贴胶片(film)固定到所述载板3上。所述结球端21的制作方式则可参考上文对图1现有铜线打线工艺的相关说明。
请参照图2及2A所示,本发明第一实施例的铜线与载板焊垫的打线方法接着将所述铜线2扯断,而使所述铜线2在所述锡层312位置留下一尾端22。在本实施例中,由于所述锡层312的硬度低于所述焊垫31的金属底层311的材料(例如铜)的硬度,因此所述铜线2能轻易插伸到所述锡层312内部。再者,由于所述锡层312具有足够厚度(大于10微米),因此所述铜线2仅需结合至所述锡层312的某一内部位置,使所述接合界面32形成于所述尾端22与所述锡层312之间,而不需进一步向下接触所述焊垫31的金属底层311的表面。因此,所述铜线2的尾端22是在所述锡层312的某一内部位置处被热压合扯断,而使所述尾端22位于且结合在所述锡层312的内部,其中所述铜线2进行热压合扯断时的环境温度为介于150至200℃之间。所述尾端22的制作方式则可参考上文对图1现有铜线打线工艺的相关说明。在利用所述焊针(未绘示)扯断所述铜线2而形成所述尾端22期间,所述焊针的尖端可能同时在所述尾端22的上方造成所述锡层312形成一微小凹陷(未绘示),此微小凹陷将利用下述步骤加以修补及强化。
请参照图2及2A所示,本发明第一实施例的铜线与载板焊垫的打线方法接着加热所述锡层312,使所述锡层312的表面延伸形成一润湿结合部33来包覆所述铜线2的尾端22。在本步骤中,本发明可以先将上述铜线2打线作业后的半成品移至另一高温烘烤炉中,再利用大于230℃的温度来加热所述锡层312。或者,亦可能在同一打线机台位置上直接进一步提高上述铜线2打线作业时的环境温度使其大于230℃,以加热所述锡层312。由于纯锡的熔点约为232℃,因此上述加热温度足以使所述锡层312的表面软化熔化,并使锡材流动填补所述焊针尖端所造成的微小凹陷。接着,由于所述尾端22上方的铜线2在原微小凹陷的位置处接触所述锡层312的熔融表面,因此锡材将因润湿作用而沿着所述铜线2的表面向上攀附一小段距离。同时,由于表面张力而使所述铜线2周遭的锡材也跟着向上突起,并至少高于所述锡层312原先表面的水平高度。攀附所述铜线2以及向上突起的锡材部份是呈不规则状,此不规则状的突起部分则称为一润湿结合部33。
本发明形成所述润湿结合部33的优点在于:所述润湿结合部33不但能填补所述焊针尖端所造成的微小凹陷,而且更能增加所述锡层312与所述铜线2的接触面积。因此,所述铜线2在形成所述尾端22时,并不需要增加所述焊针热压合扯断所述铜线的时间或连续动作次数,而是直接利用所述锡层312的润湿结合部33来使所述尾端22能以较大接触面积来稳固结合于所述焊垫31上方,以提供较高的结合强度。连带的,本发明将可简化所述铜线2的第二端(即所述尾端22)的打线作业,进而增加打线期间的时间效率。再者,由于所述锡层312的材料成本相对低于现有镍金复合层、镍钯金复合层、银层或有机可焊性保护层等助焊层的材料成本,因而本发明亦有利于降低对所述载板3的焊垫31进行表面处理的材料成本。并且,由于铜与锡很容易通过离子交换形成中介金属层(Intermetallic Compound,IMC),可进一步增加所述接合界面32的接合强度。
此外,本发明第一实施例在形成所述润湿结合部33之后,另可进一步进行下列步骤:利用一胶体(未绘示)封装包覆所述铜线2、所述结球端21、所述接垫41、所述芯片4、所述润湿结合部33、所述锡层312以及所述载板3的部分表面,因而构成一半导体封装构造的成品。上述利用所述胶体进行封装包覆的温度优选为介于150至200℃之间,例如175℃等。在利用所述胶体进行封装期间,本发明可利用所述锡层312本身及其形成的润湿结合部33来包覆保护所述铜线2热压合形成的尾端22,以避免所述铜线2的尾端22受到封胶作业时的胶体所含的腐蚀成份侵蚀,因而有利于提高所述铜线2打线接合的抗蚀性、结合稳定性及打线接合质量。惟,对某些封装产品而言,其可能采用其他外壳进行封装而不需利用胶体进行封装包覆所述铜线2、所述结球端21、所述接垫41、所述芯片4、所述润湿结合部33及所述锡层312等部位,此类封装产品例如为气密式(hermetic)封装构造或光学芯片封装构造等。
请参照图3及3A所示,本发明第二实施例的铜线与载板焊垫的打线方法及其结构相似于本发明第一实施例,但第二实施例的差异特征在于:所述第二实施例的所述焊垫31的锡层312的厚度小于10微米(um),例如3微米、5微米或8微米等。所述焊垫31包含一金属底层311,所述金属底层311至少部分被所述锡层312覆盖。由于所述锡层312的厚度较小,因此所述接合界面32形成于所述铜线2的尾端22与所述金属底层311之间,即所述铜线2的尾端22整个通过所述锡层312,并结合在所述焊垫31的表面上。如图2A及3A所示,在本发明中,不论所述锡层312的厚度大于或小于10微米,所述铜线2的尾端22的水平高度皆低于所述锡层312的表面高度,且所述尾端22及其上方一小段铜线2皆会受到所述润湿结合部33的包覆保护,并同时增加接触面积及结合强度。
如上所述,相较于图1现有铜线打线工艺通常增加所述焊针13扯断所述铜线14的热压合时间或连续动作次数,使所述尾端142能以较大热压合面积来稳固结合于所述焊垫121上,却也造成增加整体打线时间而不利于提高每小时产出量等缺点,图2及3A的本发明是在所述载板3的焊垫31表面设有熔点较低的所述锡层312,并在所述铜线2打在所述锡层312后进一步加热所述锡层312来形成所述润湿结合部33,以增加所述铜线2的尾端22与所述载板3的焊垫31之间的结合强度,因而有利于提高所述铜线2打线接合的可靠度及良品率(yield)。再者,由于所述锡层312的材料成本相对低于现有助焊层的材料成本,因而本发明亦有利于降低对所述载板3的焊垫31进行表面处理的材料成本。另外,在利用胶体进行封装期间,本发明可利用所述锡层312本身及其形成的润湿结合部33来包覆保护所述铜线2热压合形成的尾端22,以避免所述铜线2的尾端22受到胶体所含的腐蚀成份侵蚀,因而有利于提高所述铜线2打线接合的抗蚀性、结合稳定性及打线接合质量。
本发明已由上述相关实施例加以描述,然而上述实施例仅为实施本发明的范例。必需指出的是,已公开的实施例并未限制本发明的范围。相反地,包含于权利要求书的精神及范围的修改及均等设置均包括于本发明的范围内。

Claims (10)

1.一种铜线与载板焊垫的打线方法,其特征在于:所述铜线与载板焊垫的打线方法包含:
将一铜线热压合接合至一载板的一焊垫,以形成一接合界面,所述焊垫包含一锡层位于所述焊垫的最外层;
将所述铜线扯断,而使所述铜线在所述锡层位置留下一尾端,且所述铜线的尾端的一水平高度低于所述锡层的一表面高度;以及
加热所述锡层,使所述锡层的表面延伸形成一润湿结合部来包覆所述铜线的尾端。
2.如权利要求1所述的铜线与载板焊垫的打线方法,其特征在于:所述锡层的厚度大于10微米,所述接合界面形成于所述尾端与所述锡层之间。
3.如权利要求1所述的铜线与载板焊垫的打线方法,其特征在于:所述锡层的厚度小于10微米,且所述焊垫包含一金属底层,所述金属底层至少部分被所述锡层覆盖,所述接合界面形成于所述尾端与所述金属底层之间。
4.如权利要求3所述的铜线与载板焊垫的打线方法,其特征在于:所述金属底层的材料选白铜、金、银或其合金。
5.如权利要求1所述的铜线与载板焊垫的打线方法,其特征在于:加热所述锡层的温度大于230℃。
6.如权利要求1所述的铜线与载板焊垫的打线方法,其特征在于:在将所述铜线热压合接合至所述锡层之前,另包含:将一芯片固定到所述载板上;将所述铜线以电子点火方式处理以形成一结球端,并将所述结球端热压接合在所述芯片的一接垫上;将所述铜线移动至所述载板的焊垫的锡层位置上方;以及,在形成所述润湿结合部之后,利用一胶体封装包覆所述铜线、所述润湿结合部、所述锡层以及所述载板的部分表面。
7.一种铜线与载板焊垫的打线结构,其特征在于:所述铜线与载板焊垫的打线结构包含:
一载板,具有至少一焊垫,所述焊垫的最外层各具有一锡层;以及
至少一铜线,各具有一尾端,所述尾端热压合接合于所述锡层,以形成一接合界面,且所述铜线的尾端的一水平高度低于所述锡层的一表面高度;其中所述锡层的表面在与所述铜线的尾端的接触位置延伸形成一润湿结合部。
8.如权利要求7所述的铜线与载板焊垫的打线结构,其特征在于:所述锡层的厚度大于10微米,所述接合界面形成于所述尾端与所述锡层之间。
9.如权利要求7所述的铜线与载板焊垫的打线结构,其特征在于:所述锡层的厚度小于10微米,且所述焊垫包含一金属底层,所述金属底层至少部
分被所述锡层覆盖,所述接合界面形成于所述尾端与所述金属底层之间。
10.如权利要求9所述的铜线与载板焊垫的打线结构,其特征在于:所述金属底层的材料选自铜、金、银或其合金。
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Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5942794A (en) * 1996-10-22 1999-08-24 Matsushita Electronics Corporation Plastic encapsulated semiconductor device and method of manufacturing the same
US6329722B1 (en) * 1999-07-01 2001-12-11 Texas Instruments Incorporated Bonding pads for integrated circuits having copper interconnect metallization
CN101325190A (zh) * 2007-06-13 2008-12-17 南茂科技股份有限公司 导线架上具有图案的四方扁平无引脚封装结构
CN101527287A (zh) * 2008-09-19 2009-09-09 杰群电子科技股份有限公司 打线结构及其制作方法

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5942794A (en) * 1996-10-22 1999-08-24 Matsushita Electronics Corporation Plastic encapsulated semiconductor device and method of manufacturing the same
US6329722B1 (en) * 1999-07-01 2001-12-11 Texas Instruments Incorporated Bonding pads for integrated circuits having copper interconnect metallization
CN101325190A (zh) * 2007-06-13 2008-12-17 南茂科技股份有限公司 导线架上具有图案的四方扁平无引脚封装结构
CN101527287A (zh) * 2008-09-19 2009-09-09 杰群电子科技股份有限公司 打线结构及其制作方法

Non-Patent Citations (1)

* Cited by examiner, † Cited by third party
Title
JP特开2004-55783A 2004.02.19

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