CN102097410B - 具有增进焊接强度的镀层的导线结构 - Google Patents

具有增进焊接强度的镀层的导线结构 Download PDF

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CN102097410B
CN102097410B CN200910200358.8A CN200910200358A CN102097410B CN 102097410 B CN102097410 B CN 102097410B CN 200910200358 A CN200910200358 A CN 200910200358A CN 102097410 B CN102097410 B CN 102097410B
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coating
conductor structure
composition surface
wire core
routing
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CN102097410A (zh
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王德峻
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Ase Assembly & Test (shanghai) Ltd
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Ase Assembly & Test (shanghai) Ltd
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Abstract

本发明公开一种具有增进焊接强度的镀层的导线结构，所述导线结构用于半导体封装工艺，所述导线结构包含一导线芯材及包覆于其外表面的一镀层，所述导线结构通过一打线接合方法，使其一端焊接于一打线接合表面。所述镀层的材质熔点低于所述导线芯材的材质熔点；以及所述镀层的材质与所述打线接合表面的材质相同。因此，所述镀层能提供一均匀的接触层于所述导线芯材及所述接合表面之间，以增进焊点强度。并且，所述导线结构的镀层具有足够厚度，因此所述镀层在打线后仍可提供完整的同质介面。

Description

具有增进焊接强度的镀层的导线结构
【技术领域】
本发明涉及一种具有增进焊接强度的镀层的导线结构，特别是涉及一种用于半导体封装工艺中且其镀层材质与接合表面相同及熔点低于导线芯材的具有增进焊接强度的镀层的导线结构。
【背景技术】
现有半导体封装构造制造过程中，打线接合(wire bonding)技术已广泛地应用于半导体芯片与封装基板或导线架之间的电性连接上。其目的是利用极细的导线(18～50微米)将芯片上的接点连接到导线架上之内引脚上，进而将芯片之电路讯号传输到外界。当导线架被移送至打线位置后，应用电子影像处理技术来确定芯片上各个接点以及每一接点所相对应之内引脚上之接点的位置，然后做打线接合的动作。
进行打线接合时，以芯片上之接点为第一焊接点，以内引脚上之接点为第二焊接点。首先，提供一焊针(capillary)用以输出一导线，以及提供一电子火焰点火杆(electronic flame off wand)用以在导线的端部形成焊球，而后将焊球压焊在第一焊接点上(此称为第一接合，first bond)。接着，焊针依照设计好之路径移动焊针，最后焊针将导线压焊在第二焊接点上(此称为第二接合，second bond)，同时并拉断焊针在第二焊点处的导线，从而完成一条导线的打线接合动作。接着，焊针又再一次重新熔结形成焊球，以开始下一条导线之打线接合动作。
一般打线接合制造过程是以金线(gold wire)为主，但相较于金线，铜线(copper wire)具有低成本的优势且具有较佳的导电性、导热性及机械强度，因而铜制焊线的线径可设计得更细且散热效率较佳。然而，铜线最大的缺点在于铜金属本身容易与氧起氧化反应。特别是，当铜线处于高温打线环境下时，铜线表面极易发生严重的氧化问题，因而影响了铜线与半导体芯片或基板的焊垫之间的结合可靠度。再者，因为芯片上接点的材质多为铝，而铜线的铜材质与接点的铝材质之间的介面金属层(IMC)成长率又是低于传统金线的金材质与接点的铝材质之间的介面金属层成长率，从而降低了以铜线进行打线接合的可焊接性(bondability)及可信赖度(reliability)。
为了解决上述技术问题，在使用铜线打线接合时，可于该铜线外层镀上一惰性金属层，例如钯(palladium)，以解决铜线表面发生氧化的问题。然而，此一薄层的钯材质仍不同于芯片上之接点的铝材质，而且此一薄层在打线接合期间也容易产生破损，因此又产生了一些下述问题，例如：在进行第一接合时，因为惰性金属薄层的厚度不足产生破损，使得烧球时未熔化的惰性金属层产生不规则的分布，形成不了同质接合介面。结果，同样又因为氧化问题或铜与铝的介面金属层(IMC)成长率过低的问题，从而降低了以铜线进行打线接合的可焊接性及可信赖度。
因此，有必要提供一种具有增进焊接强度的镀层的导线结构，以解决现有技术所存在的问题。
【发明内容】
本发明的主要目的是提供一种具有增进焊接强度的镀层的导线结构，其用于半导体封装工艺，其中导线结构包含一导线芯材及包覆于其外表面的一镀层，所述导线结构的镀层的材质熔点低于所述导线芯材的材质熔点；以及所述镀层的材质与所述打线接合表面的材质相同，因此所述镀层能提供一均匀的接触层于所述导线芯材及所述接合表面之间，以增进焊点的焊接强度。
本发明的次要目的是提供一种具有增进焊接强度的镀层的导线结构，其中导线结构的镀层具有足够的厚度，因此镀层在打线后并不会产生破裂，有利于维持接触层的均匀度、避免导线芯材氧化，及防止发生异材质介面金属层(IMC)成长率过低的问题。
为达上述目的，本发明提供一种具有增进焊接强度的镀层的导线结构，所述导线结构用于半导体封装工艺，其特征在于：所述导线结构包含一导线芯材及包覆于其外表面的一镀层，所述导线结构的一端焊接结合于一打线接合表面，所述镀层提供一均匀的接触层于所述导线芯材及所述接合表面之间，且所述镀层的材质熔点低于所述导线芯材的材质熔点；以及所述镀层的材质与所述打线接合表面的材质相同。
为达上述的另一目的，本发明提供一种具有增进焊接强度的镀层的导线结构，其特征在于：所述导线结构包含一导线芯材及包覆于其外表面的一镀层，所述镀层的材质熔点低于所述导线芯材的材质熔点，且所述镀层的厚度大于或等于2.5微米。
在本发明的一实施例中，所述导线芯材的材质是铜。
在本发明的一实施例中，所述镀层与所述打线接合表面的材质选自铝、银或金。
在本发明的一实施例中，所述镀层的厚度大于或等于2.5微米(μm)。
在本发明的一实施例中，所述镀层的厚度介于2.5微米至5微米之间。
在本发明的一实施例中，所述导线结构的一端的导线芯材形成一焊球，所述接触层位于所述焊球的底部，以焊接结合于所述打线接合表面。
【附图说明】
图1A：本发明第一实施例的具有增进焊接强度的镀层的导线结构的第一接合(first bond)方法提供焊针输出导线结构的示意图。
图1B：本发明第一实施例的具有增进焊接强度的镀层的导线结构的第一接合方法形成焊球的示意图。
图1C：本发明第一实施例的具有增进焊接强度的镀层的导线结构的第一接合方法进行焊接的示意图。
图2A：本发明第二实施例的具有增进焊接强度的镀层的导线结构的第二接合(second bond)方法移动焊针及导线结构至第二接合表面的示意图。
图2B：本发明第二实施例的具有增进焊接强度的镀层的导线结构的第二接合方法焊接导线结构至第二接合表面的示意图。
图2C：本发明第二实施例的具有增进焊接强度的镀层的导线结构的第二接合方法拉断导线结构完成焊接的示意图。
【具体实施方式】
为让本发明上述目的、特征及优点更明显易懂，下文特举本发明较佳实施例，并配合附图，作详细说明如下：
请参照图1A、1B及1C所示，其揭示本发明第一实施例的一种具有增进焊接强度的镀层的导线结构应用于一种半导体封装工艺中的打线接合(第一接合，first bond)方法的流程示意图，其中本发明的一导线结构10包含一导线芯材11及一镀层12，所述镀层12包覆于所述导线芯材11的外表面。在本发明中，所述导线结构10的厚度约介于18至50微米(μm)之间，而所述镀层的厚度是大于或等于2.5微米，优选是介于2.5微米至5微米之间。再者，本发明的导线芯材11外的镀层12可选择利用各种沉积技术(如电镀或无电电镀)或涂覆的方式来制作形成，但本发明并不限于此。另外，所述导线芯材11及镀层12的材质之间的粘着结合力可以通过高温退火(annealing)来增加。
如图1A所示，在本实施例中，所述第一接合动作的打线接合方法首先是：提供一焊针30及一邻接于所述焊针30的电子点火杆(未绘示)，所述焊针30具有一供线孔31，以输出所述导线结构10。接着，本发明通过上述焊针30及电子点火杆使所述导线结构10的一端焊接于一第一接合表面20。通过所述焊针30的供线孔31输出所述导线结构10，所述导线结构10凸出所述焊针30的供线孔31一长度。其中，所述导线结构10的特征在于：所述导线结构10的镀层12的材质熔点低于所述导线芯材11的材质熔点；以及所述导线结构10的镀层12的材质与所述第一接合表面20的材质相同。其中，本发明的所述导线结构10的导线芯材11材质优选是一铜线(copper wire)，但并不限于此，例如亦可能是除了金线(gold wire)以外的其他低成本线材。虽然一般打线接合制造过程是以金线为主，但相较于金线，铜线具有低成本的优势且具有较佳的导电性、导热性及机械强度，因而铜制焊线的线径可设计得更细且散热效率较佳。所述镀层12及所述第一接合表面20的材质例如为铝(Al)、银(Ag)或金(Au)，但并不限于此，所述镀层12的材质可依所述第一接合表面20的材质来做改变。再者，所述第一接合表面20例如是一芯片的焊垫，但亦可能为导线架(leadframe)的内引脚或基板(substrate)电路的接点。在本实施例中，所述第一接合表面20是一芯片的焊垫，焊垫的表面材质为铝，所述导线结构10的导线芯材11材质为铜线，所述镀层12的材质为铝。
接着，如图1B所示，本发明通过所述电子点火杆(未绘示)的点火加热，使所述焊针30输出的导线结构10的端部的导线芯材11及镀层12熔结形成一焊球B，其中所述焊球B的直径至少大于所述导线结构10的最大外径。此时，由于所述导线结构10的镀层12的材质熔点低于所述导线芯材11的材质熔点。因此，位于所述焊球B部份的所述镀层12会较早先行熔解，且受重力作用而汇聚集中至所述焊球B的底部。
最后，如图1C所示，本发明通过将所述焊针30下压，使所述导线结构10的一端，即所述焊球B焊接于所述第一接合表面20。由于所述导线结构10的镀层12的材质与所述第一接合表面20的材质相同。因此，所述镀层12能提供一同质的接触层于所述导线结构10的导线芯材11与所述第一接合表面20之间。上述第一接合表面20的材质指的是第一接合表面20本身的表面材质或其表面镀层(例如镍钯金复合镀层)的最顶层材质，因此所述第一接合表面20的材质可能是铝(Al)、银(Ag)或金(Au)。
综上所述，由于本发明的所述导线结构10的镀层12的材质熔点低于所述导线芯材11的材质熔点；以及所述导线结构10的镀层12的材质与所述第一接合表面20的材质相同。因此，在打线接合制造过程中的第一接合时，能提供一均匀的接触层于所述导线结构10的导线芯材11与所述第一接合表面20之间，故能相对提高所述导线结构10与所述第一接合表面20(半导体芯片或基板的焊垫)之间的焊点的焊接强度，亦即增进了结合可靠度。
请再参照图2A、2B及2C所示，其揭示本发明第二实施例的一种具有增进焊接强度的镀层的导线结构10的打线接合(第二接合，second bond)方法的流程示意图，在完成第一实施例的打线接合制造过程的第一接合动作后，依照设计好之移动路径，所述焊针30牵引所述导线结构10至第二接合的位置，通过另一打线接合方法使所述导线结构10的另一端焊接于一第二接合表面40，所述第二接合表面40例如可以是导线架(leadframe)的内引脚或基板(substrate)电路的接点，但亦可能是芯片的焊垫。
所述打线接合制造过程的第二接合的详细说明如下：首先，如图2A所示，本发明通过所述焊针30的供线孔31继续输出所述导线结构10，并从第一接合的第一接合表面20牵引所述导线结构10，直到所述导线结构10到达所述第二接合表面40上方为止。其中，本发明的所述导线结构10的导线芯材11材质优选是一铜线，但并不限于此，例如亦可能是除了金线(gold wire)以外的其他低成本线材。所述镀层12及所述第二接合表面20的材质例如为铝(Al)、银(Ag)或金(Au)，但并不限于此。另外，本发明所述导线结构10的厚度约介于18至50微米之间，而所述镀层的厚度大于2.5微米，优选是介于2.5微米至5微米之间。在本实施例中，所述第二接合表面40是导线架的内引脚或基板电路的接点，内引脚或接点的表面材质为镀有镍金复合层的铜，所述导线结构10的导线芯材11材质为铜线，所述镀层12的材质为金。或者，内引脚或接点的表面材质为镀有银层的铜，所述导线结构10的导线芯材11材质为铜线，所述镀层12的材质为银。
接着，如图2B所示，本发明通过将所述焊针30下压，并利用所述电子点火杆(未绘示)的点火加热，而使所述焊针30的供线孔31的所述导线结构10一小段焊接于所述第二接合表面40。此时，由于所述导线结构10的镀层12具有足够厚度(例如大于或等于2.5微米)，因此所述镀层12在打线后并不会产生破裂，故能使所述导线结构10的导线芯材11通过所述镀层12接触结合到所述的第二接合表面40。也就是，所述镀层12能提供一均匀的接触层于所述导线结构10的导线芯材11与所述第二接合表面40之间。
最后，如图2C所示，本发明通过将所述焊针30上升，使所述导线结构10被拉断，同时保留所述导线结构10的接点于所述第二接合表面40上，以完成打线接合制造过程的第二接合动作。由于，所述导线结构10具有一足够厚度的镀层12，因此该镀层12在打线后并不会产生破裂；再者，所述导线结构10的镀层12的材质与所述第二接合表面40的材质相同，因此，能提供一均匀的接触层于所述导线结构10的导线芯材11与所述第二接合表面40之间，进而提高了所述导线结构10与导线架的内引脚或基板的焊垫之间的焊点的焊接强度，亦即增进了结合可靠度。
综上所述，相较于现有的铜线打线接合在铜线外包含一惰性金属层(例如钯层)却仍因惰性金属薄层的厚度不足产生破损，而发生氧化问题或异材质介面金属层(IMC)成长率过低的问题，从而降低了以铜线进行打线接合的可焊接性及可信赖度。图1A至2C的本发明的导线结构10包含一导线芯材11及包覆于其外表面的一镀层12，所述导线结构10的镀层12的材质熔点低于所述导线芯材11的材质熔点；以及所述镀层12的材质与所述打线接合表面(第一接合表面20或第二接合表面40)的材质相同，因此所述镀层12能提供一均匀的接触层于所述导线芯材11及所述接合表面(第一接合表面20或第二接合表面40)之间，以增进焊点的焊接强度。另外，所述导线结构10的镀层12具有足够的厚度(大于或等于2.5微米)，因此所述镀层12在打线后并不会产生破裂，不佰有利于维持接触层的均匀度，并可避免所述导线芯材11的氧化，以及防止发生异材质介面金属层(IMC)成长率过低的问题。
本发明已由上述相关实施例加以描述，然而上述实施例仅为实施本发明的范例。必需指出的是，已公开的实施例并未限制本发明的范围。相反地，包含于权利要求书的精神及范围的修改及均等设置均包括于本发明的范围内。

Claims (2)

1.一种具有增进焊接强度的镀层的导线结构，其用于半导体封装工艺，其特征在于：所述导线结构包含一导线芯材及包覆于其外表面的一镀层，所述导线结构的一端的导线芯材形成一焊球，所述镀层提供一均匀的接触层于所述导线芯材及一接合表面之间，所述接触层与位于所述焊球的底部以焊接结合于所述接合表面，所述镀层与所述接触层不连接，且所述导线芯材的材质是铜，所述镀层的材质是铝，所述镀层的材质熔点低于所述导线芯材的材质熔点；所述镀层的厚度大于或等于2.5微米；以及所述镀层的材质与所述接合表面的材质相同。
2.如权利要求1所述的具有增进焊接强度的镀层的导线结构，其特征在于：所述镀层的厚度介于2.5微米至5微米之间。
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