CN102027590B - 高频收纳盒及高频模块 - Google Patents

高频收纳盒及高频模块 Download PDF

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CN102027590B
CN102027590B CN2009801183562A CN200980118356A CN102027590B CN 102027590 B CN102027590 B CN 102027590B CN 2009801183562 A CN2009801183562 A CN 2009801183562A CN 200980118356 A CN200980118356 A CN 200980118356A CN 102027590 B CN102027590 B CN 102027590B
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frequency
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inner chamber
earthing conductor
waveguide
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铃木拓也
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Mitsubishi Electric Corp
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Abstract

包括:内腔(5),该内腔(5)通过电连接形成在多层电介体基板(2)形成并搭载多个高频电路(10、11、12)的接地导体(4)和屏蔽盖件(3)而构成;波导管开口(30),该波导管开口(30)在搭载有高频电路(10、11、12)的接地导体(4)上形成,与内腔(5)电耦合;电介体波导管(40)该电介体波导管(40)朝着多层电介体基板(2)的层叠方向形成,并且与波导管开口(30)连接且前端短路,具有信号波的基板内有效波长的大约1/4的长度,能够通过使用单一内腔的便宜而且简单的结构,确保多个高频电路之间的空间隔离。

Description

高频收纳盒及高频模块
技术领域
本发明涉及构成由搭载多个高频电路的多层电介体基板和覆盖该多层电介体基板的屏蔽盖件电磁屏蔽的空间即内腔的高频收纳盒及高频模块。 
背景技术
对于搭载在微波段、毫米波段等高频段动作的高频电路的高频封装,考虑到其动作稳定性、EMI(放射性寄生)标准等,往往将其搭载到被金属架等电屏蔽的内腔内。 
在专利文献1中,为了避免功能不同的半导体芯片之间的空间干扰,利用密封环或个别盖件将封装组件分割成多个分区(内腔),按照功能的不同,在分割的各分区中搭载半导体芯片,利用馈通将分区之间的半导体芯片电连接。 
专利文献1:日本特开平10-41421号公报 
可是,现有技术的这种封装结构在成本、可靠性方面存在着诸多问题,例如使密封环、盖等构件数量增加、或对封装的软钎焊、盖的焊接等制造工序趋于复杂等。另外,因为在毫米波段等高频段中,芯片尺寸成为波长级(~1mm左右),所以实质上不能够用成为截止的内腔物理尺寸进行遮蔽、分区,从而不得不使用电阻体/磁性体等昂贵的吸收材料。这样,人们迫切需要结构简单的即使在微波段、毫米波段等高频段中也能够确保隔离的封装结构、模块结构。 
发明内容
本发明鉴于上述情况而构思,其目的在于提供通过使用单一内腔 的便宜而且简单的结构能够确保多个高频电路之间的空间隔离的高频收纳盒及高频模块。 
为了解决上述课题、达到上述目的,本发明的一种高频收纳盒,收纳有被搭载于多层电介体基板上的多个高频电路,其特征在于,包括:内腔,该内腔至少由通过电连接接地导体和屏蔽盖件而构成的电磁屏蔽部形成,该接地导体形成在多层电介体基板,朝着信号传播方向排列搭载所述多个高频电路,该屏蔽盖件在空间上覆盖所述多个高频电路,而且所述内腔在与所述多个高频电路的配置方向垂直的方向上的长度,具有比所述高频电路产生的第1信号波的基板内有效波长的1/2短的尺寸;波导管开口,该波导管开口在搭载高频电路的所述接地导体上形成,与所述内腔电耦合;以及电介体波导管,该电介体波导管与所述波导管开口连接,并且在多层电介体基板的层叠方向形成且前端短路,具有第2信号波的基板内有效波长的大约1/4的长度,该第2信号波是所述高频电路产生的所述第1信号波的频率的N倍(N≥2)。 
依据本发明,因为具备波导管开口及前端短路的电介体波导管,对于在内腔中传播的信号而言,使该波导管开口及前端短路的电介体波导管作为反射电路动作,所以能够通过使用单一内腔的便宜而且简单的结构确保多个高频电路之间的空间隔离。 
附图说明
图1是表示本发明的实施方式涉及的高频模块的立体图。 
图2是表示本发明的实施方式涉及的高频模块的剖面图。 
图3是表示本发明的实施方式涉及的高频模块的俯视图。 
图4是表示实施方式的高频模块的内腔内的传播特性的图。 
图5是表示实施方式的高频模块的表层信号线路的传播特性的图。 
附图标记说明 
1高频模块 
2多层电介体基板 
3屏蔽盖件 
4接地导体 
5内腔 
6IC搭载凹部 
7表层接地导体 
8贯通孔 
10振荡电路 
11放大电路 
12倍增/放大电路 
20金属线 
21表层信号线路 
22导体焊盘 
30波导管开口 
40前端短路电介体波导管 
41内层接地导体 
42贯通孔 
具体实施方式
下面,参照附图,详细讲述本发明涉及的高频收纳盒(或高频封装)及高频模块的实施方式。此外,本发明并不局限于该实施方式。 
图1~图3是表示本发明涉及的高频收纳盒的实施方式的结构的图。在高频模块1中,搭载多个高频电路,这些高频电路在微波段、毫米波段等高频段中动作。该高频模块1例如宜于在FM-CW雷达中使用。此外,还可以被通信用机器或微波雷达等利用。 
在该实施方式中,作为高频电路,搭载产生频率f0的高频信号的振荡电路10、放大振荡电路10的输出的放大电路11、和将放大电 路11的输出N倍增(N≥2)并放大频率N·f0的倍增信号后输出的倍增/放大电路12。高频电路由场效应晶体管或高电子迁移率晶体管等半导体元件或由半导体元件及陶瓷基板等外部基板构成的MIS(微波集成电路)或MMIS(单片微波集成电路)组成。 
这些高频电路被安装在内腔5内,该内腔5是被用由屏蔽盖件3(图中只绘出盖件的内壁)、多层电介体基板2等形成的气密而且电磁屏蔽的空间。屏蔽盖件3是空间上覆盖高频电路的构件,既可以用金属构成,也可以在内壁面上形成金属层。在多层电介体基板2上,形成用于搭载多个高频电路的多个凹部(以下称作“IC搭载凹部”)6。在多层电介体基板2的上位层(在图示的例子中为第1层)2a形成掏空部而形成IC搭载凹部6。在IC搭载凹部6的底面的表面,形成接地导体4。在该实施方式中,如图2所示,接地导体4是在多层电介体基板2中的上位层的电介体层2a和其下层的电介体层2b之间形成的实体接地,在该接地导体4上搭载振荡电路10、放大电路11、倍增/放大电路12等高频电路。 
在该实施方式中,因为在IC搭载凹部6的底面形成的接地导体4上搭载振荡电路10、放大电路11、倍增/放大电路12等高频电路,所以为了将屏蔽盖件3和接地导体4电连接,至少在屏蔽盖件3与多层电介体基板2的表面抵接的部位形成表层接地导体7,利用多个贯通孔8连接该表层接地导体7和接地导体4。就是说,在该实施方式中,作为屏蔽空间,由屏蔽盖件3、表层接地导体7、多个贯通孔8、接地导体4形成内腔5。 
高频电路之间被用金等构成的金属线20引线接合连接。也可以取代金属线,使用金带或焊球等其它的导电性连接构件。放大电路11和倍增/放大电路12之间不馈通,如图3所示,金属线20进而通过表层的电介体层2a上形成的微波传输带线路或共面线路等信号线路21,进行电性输入输出连接。向多层电介体基板2的表层供给DC偏置电压,或者形成在高频电路之间输入/输出控制信号的导体焊盘 22。此外,导体焊盘22和各高频电路之间被金属线连接,但是在图1中没有绘出。 
在这里,在频率f0动作的放大电路11和在频率N·f0动作的倍增/放大电路12之间,形成作为搭载高频电路的接地导体4的抽取图案的波导管开口30。而且,在波导管开口30的前面,形成电介体波导管40,该电介体波导管40的前端短路,朝着多层电介体基板2的层叠方向延伸,具有信号波的基板内有效波长λg的大约1/4(的奇数倍)的长度。电介体波导管40包括:内层接地导体41,该内层接地导体41在距波导管开口30大约λg/4(的奇数倍)的深度位置形成;贯通孔(接地通路孔)42,该贯通孔42连接搭载有高频电路的接地导体4和内层接地导体41;以及电介体,该电介体配置在由这些内层接地导体41及多个贯通孔42围住的部分。该电介体波导管40作为前端具有短接面的电介体波导发挥作用。 
这样,在本实施方式中,在利用多层电介体基板2和屏蔽盖件3形成单一的内腔5的高频收纳盒内,隔着波导管开口30及电介体波导管40,朝着信号传输方向(纵列一维地)配置振荡电路10、放大电路11、倍增/放大电路12等在多个动作频带中动作的多个高频电路,形成高频模块。另外,还隔着波导管开口30及电介体波导管40,分离配置在倍增前的频率f0动作的振荡电路10、放大电路11和在倍增后的频率N·f0动作的倍增/放大电路12。此外,还可以在纵列排列的高频电路的周围(横向)配置其它的高频电路,虽然是纵长,但是也可以二维地配置高频电路。 
这样,在内腔5内朝着信号传输方向配置高频电路时,如果使内腔宽度L远远小于与高频电路的动作频率对应的波长的大约1/2(截止尺寸),信号就被空间传播,在反馈·耦合的作用下,引起高频电路的误动作(不必要的振荡、频率变动)。特别是要处理的高频信号的频率越高,上述截止尺寸就越接近于收纳的高频电路的物理尺寸,所以容易引起空间反馈、耦合。此外,所谓“内腔宽度L”,是内腔5的 沿着垂直于多个高频电路的配置方向的方向的长度。 
因此,在本实施方式中,将内腔宽度L选定为比对于在倍增前的频率f0动作的振荡电路10、放大电路11等而言成为截止的尺寸小的尺寸、即小于频率f0的信号波的基板内有效波长λ的大约1/2的尺寸(例如波长λ的1/2的70~80%)。这种尺寸选定,与选择对于在倍增后的N·f0的频率动作的倍增/放大电路12而言成为截止的尺寸时相比,因为频率成为1/N以下,所以能够很容易地物理性地实现截止尺寸。 
经过这种内腔宽度L的选定,频率f0及低于频率f0的频带的信号就不能够在内腔5中传播,从而能够在空间上确保倍增前的振荡电路10、放大电路11的隔离,能够防止频率f0及低于频率f0的频带的信号的反馈/耦合导致的误动作。 
接着,将波导管开口30的开口尺寸选定为对于倍增/放大电路12输出的倍增后的频率N·f0的高频信号而言与内腔5电耦合的尺寸。另外,还对于倍增/放大电路12输出的倍增后的频率N·f0的高频信号而言,作为反射电抗电路发挥作用地设定电介体波导管40的长度λg/4。就是说,λg是与频率N·f0的高频信号对应的波长。 
经过这种波导管开口30及电介体波导管40的尺寸选择,对于在内腔中传播的信号而言,波导管开口30及电介体波导管40就作为电介体的反射短截线(stub)发挥作用,从内腔5内的倍增/放大电路12反馈空间,能够抑制与倍增前的振荡电路10、放大电路11耦合的N倍波信号,能够防止振荡器、放大器的误动作。 
此外,波导管开口30的尺寸及前端短路的电介体波导管40的长度(图3所示的尺寸W),最好选择在电介体波导管40内不产生N倍波信号的高阶模谐振的尺寸(例如小于N倍波信号的管内有效波长的λ/4)。另外,最好将波导管开口30配置在不会和内腔壁之间在对象(倍增)信号频带产生谐振的位置。 
图4是表示图1~图3所示的高频模块的内腔5内的传播特性的 图,×表示反射特性,○表示通过特性。使N=2。由图4可知:因为将内腔宽度L设定为对于倍增前的频率f0而言成为截止的尺寸,所以频率f0及低于频率f0的频带的信号就不能够在内腔5中传播,另外因为对于倍增后的频率2·f0的高频信号而言,作为反射电抗电路发挥作用地设定波导管开口30及电介体波导管40,所以对频率2·f0的高频信号而言是全反射,通过特性衰减25dB以上。 
图5是表示图1~图3所示的高频模块中的表层信号线路21的传播特性的图,×表示反射特性,○表示通过特性。因为倍增/放大电路12是通过表层信号线路21而输入放大电路11输出的频率f0的信号,将它N倍增后放大的电路,所以表层信号线路21需要至少对于频率f0的信号而言,具有良好的通过特性。如图5所示,作为表层信号线路21的传播特性,可以遍及各频段地获得良好的通过特性。 
这样,依据本实施方式涉及的高频收纳盒,因为具备波导管开口30及前端短路的电介体波导管40,对于在内腔中传播的信号而言,该波导管开口30及前端短路的电介体波导管40作为反射电路动作,所以能够不使用昂贵的密封环、盖件及馈通,通过使用单一内腔的便宜而且简单的结构,确保多个高频电路之间的空间隔离。 
另外,依据本实施方式涉及的高频模块,因为隔着由波导管开口30及前端短路的电介体波导管40构成的反射电路,分割布局基准芯片和倍增芯片,从而能够确保各芯片之间的隔离,所以能够抑制发送波(倍增波)对于基准芯片的空间反馈。就是说,由于振荡器等本身的基波被截止,倍增波被反射电路截断,所以能够期待不受空间负载的影响的稳定动作。 
此外,在上述实施方式中,作为单一的内腔5内收纳的多个高频电路,采用振荡电路和倍增电路。但是各高频电路之间的动作频率并不局限于自然数倍,可以构成为隔着由波导管开口30及前端短路的电介体波导管40构成的反射电路,分离配置动作频带不同的第1、第2高频电路。 
另外,在上述实施方式中,在多层电介体基板2内形成的IC搭载凹部6内收容高频电路的结构的高频模块中采用本发明。但是,本发明还可以在不具备IC搭载凹部6的平坦的多层电介体基板2的表层搭载高频电路这样的结构的高频模块中采用。具有这种平坦的表层的多层电介体基板2的高频模块时,可以利用在多层电介体基板2的表层形成而搭载高频电路的接地导体和屏蔽盖件3,形成内腔5。 
另外,本实施方式的高频收纳盒在采用级联连接的方式确保空间反馈成为问题的多级放大器芯片的级间的隔离时,较为有效。就是说,这时在单一内腔5内,分别隔着由波导管开口30及前端短路的电介体波导管40构成的反射电路,分离配置在相同的频带动作的两个以上的放大电路,从而能够采用级联连接的方式,轻易地确保空间反馈成为问题的各放大电路之间的隔离,能够期待防止振荡。 
产业上的可利用性 
综上所述,本发明涉及的高频收纳盒及高频模块,在搭载在不同的频带动作的多个高频电路时有用。 

Claims (4)

1.一种高频收纳盒,收纳有被搭载于多层电介体基板上的多个高频电路,其特征在于,包括:
内腔,该内腔至少由通过电连接接地导体和屏蔽盖件而构成的电磁屏蔽部形成,该接地导体形成在多层电介体基板,朝着信号传播方向排列搭载所述多个高频电路,该屏蔽盖件在空间上覆盖所述多个高频电路,而且所述内腔在与所述多个高频电路的配置方向垂直的方向上的长度,具有比所述高频电路产生的第1信号波的基板内有效波长的1/2短的尺寸;
波导管开口,该波导管开口位于所述内腔之内并且在搭载高频电路的所述接地导体上形成,与所述内腔电耦合;以及
前端短路的电介体波导管,该电介体波导管与所述波导管开口连接,并且在多层电介体基板的层叠方向形成,并且该电介体波导管由内层接地导体、和与所述接地导体及内层接地导体连接的多个贯通孔而构成,所述电介体波导管具有第2信号波的基板内有效波长的1/4的长度,该第2信号波具有所述高频电路产生的所述第1信号波的频率的N倍的频率,其中,N≥2。
2.如权利要求1所述的高频收纳盒,其中将所述接地导体、所述屏蔽盖件、在所述多层电介体基板的表面的所述屏蔽盖件的抵接面形成的表层接地导体、连接表层接地导体和搭载所述多个高频电路的接地导体的贯通孔电连接,从而构成所述内腔。
3.一种高频模块,其特征在于,包括:
权利要求1或2所述的高频收纳盒;
振荡电路,其作为产生所述第1信号波的所述高频电路;以及
倍增电路,其作为将所述振荡电路产生的第1信号波N倍增、产生所述第2信号波的所述高频电路,
隔着所述波导管开口,在所述内腔内分离配置所述振荡电路和倍增电路。
4.一种高频模块,其特征在于,包括:
权利要求1或2所述的高频收纳盒;以及
作为所述高频电路的两个以上的放大电路,其放大所述波导管开口及前端短路的电介体波导管作为反射电路工作的信号频带,
隔着所述波导管开口,在所述内腔内分离配置所述各放大电路。
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EP2284881B1 (en) 2021-02-17
WO2009139210A1 (ja) 2009-11-19
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CN102027590A (zh) 2011-04-20
JPWO2009139210A1 (ja) 2011-09-15

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