CN102024816B - 半导体存储器件 - Google Patents

半导体存储器件 Download PDF

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Publication number
CN102024816B
CN102024816B CN201010284307.0A CN201010284307A CN102024816B CN 102024816 B CN102024816 B CN 102024816B CN 201010284307 A CN201010284307 A CN 201010284307A CN 102024816 B CN102024816 B CN 102024816B
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CN
China
Prior art keywords
memory cell
cell array
memory
cells
transistor
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
CN201010284307.0A
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English (en)
Chinese (zh)
Other versions
CN102024816A (zh
Inventor
武田晃一
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Renesas Electronics Corp
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Renesas Electronics Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
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Publication date
Application filed by Renesas Electronics Corp filed Critical Renesas Electronics Corp
Publication of CN102024816A publication Critical patent/CN102024816A/zh
Application granted granted Critical
Publication of CN102024816B publication Critical patent/CN102024816B/zh
Expired - Fee Related legal-status Critical Current
Anticipated expiration legal-status Critical

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    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C5/00—Details of stores covered by group G11C11/00
    • G11C5/02—Disposition of storage elements, e.g. in the form of a matrix array
    • G11C5/025—Geometric lay-out considerations of storage- and peripheral-blocks in a semiconductor storage device

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Static Random-Access Memory (AREA)
  • Semiconductor Memories (AREA)
CN201010284307.0A 2009-09-14 2010-09-14 半导体存储器件 Expired - Fee Related CN102024816B (zh)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP2009-211544 2009-09-14
JP2009211544A JP5306125B2 (ja) 2009-09-14 2009-09-14 半導体記憶装置

Publications (2)

Publication Number Publication Date
CN102024816A CN102024816A (zh) 2011-04-20
CN102024816B true CN102024816B (zh) 2015-02-11

Family

ID=43730406

Family Applications (1)

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CN201010284307.0A Expired - Fee Related CN102024816B (zh) 2009-09-14 2010-09-14 半导体存储器件

Country Status (3)

Country Link
US (1) US8134863B2 (enExample)
JP (1) JP5306125B2 (enExample)
CN (1) CN102024816B (enExample)

Families Citing this family (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2010001449A1 (ja) 2008-06-30 2010-01-07 東洋ガラス株式会社 Ｇｒｉｎレンズの製造方法
JP5398599B2 (ja) * 2010-03-10 2014-01-29 ルネサスエレクトロニクス株式会社 半導体記憶装置及びそのセル活性化方法
US10431576B1 (en) 2018-04-20 2019-10-01 Taiwan Semiconductor Manufacturing Company, Ltd. Memory cell array and method of manufacturing same
JP7149198B2 (ja) * 2019-02-07 2022-10-06 ルネサスエレクトロニクス株式会社 半導体装置

Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0769743A2 (en) * 1995-10-18 1997-04-23 Nec Corporation Semiconductor memory device having small chip size and shortened redundancy access time
EP1376597A2 (en) * 2002-06-21 2004-01-02 Broadcom Corporation Distributed, highly configurable modular address predecoder
CN1516196A (zh) * 2002-12-20 2004-07-28 ���µ�����ҵ��ʽ���� 半导体存储器
CN1542847A (zh) * 2003-03-31 2004-11-03 ��ʽ���������Ƽ� 半导体存储器件
JP3938808B2 (ja) * 1997-12-26 2007-06-27 株式会社ルネサステクノロジ 半導体記憶装置

Family Cites Families (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6055919B2 (ja) * 1980-03-18 1985-12-07 日本電気株式会社 半導体記憶装置
JPH0775116B2 (ja) * 1988-12-20 1995-08-09 三菱電機株式会社 半導体記憶装置
US6738894B1 (en) * 1995-02-07 2004-05-18 Hitachi, Ltd. Data processor
JPH10303387A (ja) * 1997-04-28 1998-11-13 Mitsubishi Electric Corp 半導体記憶装置
JP2002184188A (ja) * 2000-12-18 2002-06-28 Mitsubishi Electric Corp 半導体記憶装置
JP4661401B2 (ja) * 2005-06-30 2011-03-30 セイコーエプソン株式会社 集積回路装置及び電子機器
JP2007058979A (ja) 2005-08-24 2007-03-08 Matsushita Electric Ind Co Ltd 半導体記憶装置
JP2008159669A (ja) 2006-12-21 2008-07-10 Matsushita Electric Ind Co Ltd 半導体記憶装置
JP2009070474A (ja) * 2007-09-13 2009-04-02 Panasonic Corp 半導体集積回路
JP5194302B2 (ja) * 2008-02-20 2013-05-08 ルネサスエレクトロニクス株式会社 半導体信号処理装置

Patent Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0769743A2 (en) * 1995-10-18 1997-04-23 Nec Corporation Semiconductor memory device having small chip size and shortened redundancy access time
JP3938808B2 (ja) * 1997-12-26 2007-06-27 株式会社ルネサステクノロジ 半導体記憶装置
EP1376597A2 (en) * 2002-06-21 2004-01-02 Broadcom Corporation Distributed, highly configurable modular address predecoder
CN1516196A (zh) * 2002-12-20 2004-07-28 ���µ�����ҵ��ʽ���� 半导体存储器
CN1542847A (zh) * 2003-03-31 2004-11-03 ��ʽ���������Ƽ� 半导体存储器件

Non-Patent Citations (1)

* Cited by examiner, † Cited by third party
Title
A low-power SRAM using hierarchical bit line and local sense amplifiers;Byung-Do Yang et al.;《IEEE JOURNAL OF SOLID-STATE CIRCUITS》;20050630;第40卷(第6期);第1366-1376页，附图1，3a，3b，4，6 *

Also Published As

Publication number Publication date
US20110063896A1 (en) 2011-03-17
CN102024816A (zh) 2011-04-20
US8134863B2 (en) 2012-03-13
JP2011060402A (ja) 2011-03-24
JP5306125B2 (ja) 2013-10-02

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GR01 Patent grant
CP02 Change in the address of a patent holder

Address after: Tokyo, Japan

Patentee after: Renesas Electronics Corporation

Address before: Kanagawa

Patentee before: Renesas Electronics Corporation

CP02 Change in the address of a patent holder
CF01 Termination of patent right due to non-payment of annual fee

Granted publication date: 20150211

Termination date: 20190914

CF01 Termination of patent right due to non-payment of annual fee