CN101925978A - 用于键合两个基板的工艺 - Google Patents

用于键合两个基板的工艺 Download PDF

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Publication number
CN101925978A
CN101925978A CN2009801028815A CN200980102881A CN101925978A CN 101925978 A CN101925978 A CN 101925978A CN 2009801028815 A CN2009801028815 A CN 2009801028815A CN 200980102881 A CN200980102881 A CN 200980102881A CN 101925978 A CN101925978 A CN 101925978A
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CN
China
Prior art keywords
gas flow
substrates
bonding
providing
gas
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
CN2009801028815A
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English (en)
Chinese (zh)
Inventor
格维塔兹·戈丹
法布里斯·拉勒门特
西里尔·科纳特
帕斯卡尔·吉尔德
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Soitec SA
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Soitec SA
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Soitec SA filed Critical Soitec SA
Publication of CN101925978A publication Critical patent/CN101925978A/zh
Pending legal-status Critical Current

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    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P10/00—Bonding of wafers, substrates or parts of devices
    • H10P10/12—Bonding of semiconductor wafers or semiconductor substrates to semiconductor wafers or semiconductor substrates
    • H10P10/128—Bonding of semiconductor wafers or semiconductor substrates to semiconductor wafers or semiconductor substrates by direct semiconductor to semiconductor bonding
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P72/00—Handling or holding of wafers, substrates or devices during manufacture or treatment thereof
    • H10P72/04—Apparatus for manufacture or treatment
    • H10P72/0428—Apparatus for mechanical treatment or grinding or cutting
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P90/00—Preparation of wafers not covered by a single main group of this subclass, e.g. wafer reinforcement
    • H10P90/19—Preparing inhomogeneous wafers
    • H10P90/1904—Preparing vertically inhomogeneous wafers
    • H10P90/1906—Preparing SOI wafers
    • H10P90/1914—Preparing SOI wafers using bonding
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W10/00—Isolation regions in semiconductor bodies between components of integrated devices
    • H10W10/10—Isolation regions comprising dielectric materials
    • H10W10/181—Semiconductor-on-insulator [SOI] isolation regions, e.g. buried oxide regions of SOI wafers
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10T—TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
    • Y10T156/00—Adhesive bonding and miscellaneous chemical manufacture
    • Y10T156/10—Methods of surface bonding and/or assembly therefor

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  • Pressure Welding/Diffusion-Bonding (AREA)
CN2009801028815A 2008-02-15 2009-01-23 用于键合两个基板的工艺 Pending CN101925978A (zh)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
EP08290150.5 2008-02-15
EP08290150A EP2091071B1 (en) 2008-02-15 2008-02-15 Process for bonding two substrates
PCT/IB2009/000142 WO2009101495A1 (en) 2008-02-15 2009-01-23 Processing for bonding two substrates

Publications (1)

Publication Number Publication Date
CN101925978A true CN101925978A (zh) 2010-12-22

Family

ID=39577753

Family Applications (1)

Application Number Title Priority Date Filing Date
CN2009801028815A Pending CN101925978A (zh) 2008-02-15 2009-01-23 用于键合两个基板的工艺

Country Status (6)

Country Link
US (2) US20110000612A1 (https=)
EP (1) EP2091071B1 (https=)
JP (1) JP2011514669A (https=)
KR (1) KR20100119780A (https=)
CN (1) CN101925978A (https=)
WO (1) WO2009101495A1 (https=)

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN105197880A (zh) * 2014-06-24 2015-12-30 中芯国际集成电路制造(上海)有限公司 一种带空腔晶片的键合方法
CN113707564A (zh) * 2021-08-31 2021-11-26 浙江同芯祺科技有限公司 一种超薄半导体基板加工工艺
CN118560040A (zh) * 2024-07-31 2024-08-30 浙江方氏眼镜制造有限公司 一种塑料眼镜架板材贴合加工设备及贴合加工方法
US12550682B2 (en) 2020-03-06 2026-02-10 SCREEN Holdings Co., Ltd. Control device, control method, and program

Families Citing this family (12)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
FR2963157B1 (fr) * 2010-07-22 2013-04-26 Soitec Silicon On Insulator Procede et appareil de collage par adhesion moleculaire de deux plaques
FR2963982B1 (fr) * 2010-08-20 2012-09-28 Soitec Silicon On Insulator Procede de collage a basse temperature
JP2013008921A (ja) * 2011-06-27 2013-01-10 Toshiba Corp 半導体製造装置及び製造方法
JP2014188536A (ja) * 2013-03-26 2014-10-06 National Institute For Materials Science 金属材の拡散接合方法および金属材の拡散接合装置
US9922851B2 (en) 2014-05-05 2018-03-20 International Business Machines Corporation Gas-controlled bonding platform for edge defect reduction during wafer bonding
FR3029352B1 (fr) 2014-11-27 2017-01-06 Soitec Silicon On Insulator Procede d'assemblage de deux substrats
SG11201706844QA (en) 2015-04-10 2017-10-30 Ev Group E Thallner Gmbh Substrate holder and method for bonding two substrates
US11056356B1 (en) * 2017-09-01 2021-07-06 Intel Corporation Fluid viscosity control during wafer bonding
CN109887860B (zh) * 2018-12-28 2020-12-25 上海集成电路研发中心有限公司 一种键合腔体结构及键合方法
KR102808554B1 (ko) 2019-11-07 2025-05-16 삼성전자주식회사 기판 본딩 장치
JP7014850B2 (ja) * 2020-04-28 2022-02-01 エーファウ・グループ・エー・タルナー・ゲーエムベーハー ２つの基板をボンディングするための基板ホルダおよび方法
US12001193B2 (en) * 2022-03-11 2024-06-04 Applied Materials, Inc. Apparatus for environmental control of dies and substrates for hybrid bonding

Citations (2)

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US20050064680A1 (en) * 2003-09-24 2005-03-24 Erich Thallner Device and method for bonding wafers
US20070119812A1 (en) * 2005-11-28 2007-05-31 Sebastien Kerdiles Process and equipment for bonding by molecular adhesion

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JP3321882B2 (ja) * 1993-02-28 2002-09-09 ソニー株式会社 基板はり合わせ方法
JPH0745801A (ja) * 1993-08-03 1995-02-14 Matsushita Electric Ind Co Ltd 基板の接合方法
SE507152C2 (sv) 1996-08-22 1998-04-06 Volvo Lastvagnar Ab Anordning och förfarande för reglering av luftkompressor
DE19737051B4 (de) 1997-08-26 2007-02-15 Knorr-Bremse Systeme für Nutzfahrzeuge GmbH Verfahren und Vorrichtung zur Steuerung wenigstens einer Komponente einer pneumatischen Bremsanlage eines Fahrzeugs
DE10048374B4 (de) * 1999-10-01 2009-06-10 MAX-PLANCK-Gesellschaft zur Förderung der Wissenschaften e.V. Verfahren zum großflächigen Verbinden von Verbindungshalbleitermaterialien
JP4316157B2 (ja) * 2001-05-10 2009-08-19 株式会社東芝 化合物半導体素子の製造方法及びウェハ接着装置
US6372561B1 (en) * 2001-06-01 2002-04-16 Advanced Micro Devices, Inc. Fabrication of fully depleted field effect transistor formed in SOI technology with a single implantation step
KR100442310B1 (ko) 2001-11-28 2004-07-30 최우범 플라즈마 전처리를 구비한 기판접합장치 및 그 제어방법
DE10240600A1 (de) * 2002-09-03 2004-03-18 Knorr-Bremse Systeme für Nutzfahrzeuge GmbH Verfahren zur Erzeugung von Druckluft und Kompressoranordnung zur Durchführung des Verfahrens
JP2006134900A (ja) * 2002-11-28 2006-05-25 Toray Eng Co Ltd 接合方法および装置
WO2005055293A1 (ja) * 2003-12-02 2005-06-16 Bondtech Inc. 接合方法及びこの方法により作成されるデバイス並びに表面活性化装置及びこの装置を備えた接合装置
WO2005054147A1 (ja) * 2003-12-02 2005-06-16 Bondtech Inc. 接合方法及びこの方法により作成されるデバイス並びに接合装置
DE102006000687B4 (de) * 2006-01-03 2010-09-09 Thallner, Erich, Dipl.-Ing. Kombination aus einem Träger und einem Wafer, Vorrichtung zum Trennen der Kombination und Verfahren zur Handhabung eines Trägers und eines Wafers
US7554103B2 (en) * 2006-06-26 2009-06-30 Applied Materials, Inc. Increased tool utilization/reduction in MWBC for UV curing chamber

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20050064680A1 (en) * 2003-09-24 2005-03-24 Erich Thallner Device and method for bonding wafers
US20070119812A1 (en) * 2005-11-28 2007-05-31 Sebastien Kerdiles Process and equipment for bonding by molecular adhesion

Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN105197880A (zh) * 2014-06-24 2015-12-30 中芯国际集成电路制造(上海)有限公司 一种带空腔晶片的键合方法
US12550682B2 (en) 2020-03-06 2026-02-10 SCREEN Holdings Co., Ltd. Control device, control method, and program
CN113707564A (zh) * 2021-08-31 2021-11-26 浙江同芯祺科技有限公司 一种超薄半导体基板加工工艺
CN113707564B (zh) * 2021-08-31 2024-06-21 浙江同芯祺科技有限公司 一种超薄半导体基板加工工艺
CN118560040A (zh) * 2024-07-31 2024-08-30 浙江方氏眼镜制造有限公司 一种塑料眼镜架板材贴合加工设备及贴合加工方法

Also Published As

Publication number Publication date
US20110000612A1 (en) 2011-01-06
US8999090B2 (en) 2015-04-07
US20130139946A1 (en) 2013-06-06
EP2091071B1 (en) 2012-12-12
JP2011514669A (ja) 2011-05-06
WO2009101495A1 (en) 2009-08-20
KR20100119780A (ko) 2010-11-10
EP2091071A1 (en) 2009-08-19

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Application publication date: 20101222