FR2963157B1 - Procede et appareil de collage par adhesion moleculaire de deux plaques - Google Patents
Procede et appareil de collage par adhesion moleculaire de deux plaquesInfo
- Publication number
- FR2963157B1 FR2963157B1 FR1056010A FR1056010A FR2963157B1 FR 2963157 B1 FR2963157 B1 FR 2963157B1 FR 1056010 A FR1056010 A FR 1056010A FR 1056010 A FR1056010 A FR 1056010A FR 2963157 B1 FR2963157 B1 FR 2963157B1
- Authority
- FR
- France
- Prior art keywords
- bonding
- plates
- molecular adhesion
- adhesion
- molecular
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Active
Links
- 230000010070 molecular adhesion Effects 0.000 title 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/20—Deposition of semiconductor materials on a substrate, e.g. epitaxial growth solid phase epitaxy
-
- B—PERFORMING OPERATIONS; TRANSPORTING
- B32—LAYERED PRODUCTS
- B32B—LAYERED PRODUCTS, i.e. PRODUCTS BUILT-UP OF STRATA OF FLAT OR NON-FLAT, e.g. CELLULAR OR HONEYCOMB, FORM
- B32B37/00—Methods or apparatus for laminating, e.g. by curing or by ultrasonic bonding
- B32B37/0076—Methods or apparatus for laminating, e.g. by curing or by ultrasonic bonding characterised in that the layers are not bonded on the totality of their surfaces
- B32B37/0084—Point bonding
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
- H01L21/67005—Apparatus not specifically provided for elsewhere
- H01L21/67011—Apparatus for manufacture or treatment
- H01L21/67092—Apparatus for mechanical treatment
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/76—Making of isolation regions between components
- H01L21/762—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers
- H01L21/7624—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology
- H01L21/76251—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology using bonding techniques
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10T—TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
- Y10T156/00—Adhesive bonding and miscellaneous chemical manufacture
- Y10T156/10—Methods of surface bonding and/or assembly therefor
Landscapes
- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Manufacturing & Machinery (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Pressure Welding/Diffusion-Bonding (AREA)
- Container, Conveyance, Adherence, Positioning, Of Wafer (AREA)
- Pressure Sensors (AREA)
- Adhesives Or Adhesive Processes (AREA)
Priority Applications (8)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
FR1056010A FR2963157B1 (fr) | 2010-07-22 | 2010-07-22 | Procede et appareil de collage par adhesion moleculaire de deux plaques |
JP2013520080A JP5966215B2 (ja) | 2010-07-22 | 2011-07-15 | 分子接着によって2枚のウェーハを互いにボンディングするための方法及び装置 |
US13/808,473 US9004135B2 (en) | 2010-07-22 | 2011-07-15 | Method and apparatus for bonding together two wafers by molecular adhesion |
PCT/EP2011/062153 WO2012010517A1 (fr) | 2010-07-22 | 2011-07-15 | Procédé et appareil permettant de coller ensemble deux tranches par adhérence moléculaire |
DE112011102435.5T DE112011102435B4 (de) | 2010-07-22 | 2011-07-15 | Verfahren und Vorrichtung zum Zusammenbonden von zwei Wafern durch Molekularadhäsion |
CN2011800351394A CN103003933A (zh) | 2010-07-22 | 2011-07-15 | 用于通过分子间附着将两个晶片键合在一起的方法和装置 |
SG2012091476A SG186711A1 (en) | 2010-07-22 | 2011-07-15 | A method and apparatus for bonding together two wafers by molecular adhesion |
KR1020137000338A KR101792683B1 (ko) | 2010-07-22 | 2011-07-15 | 분자 접착에 의해 2개의 웨이퍼들을 함께 접합하기 위한 방법 및 장치 |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
FR1056010A FR2963157B1 (fr) | 2010-07-22 | 2010-07-22 | Procede et appareil de collage par adhesion moleculaire de deux plaques |
Publications (2)
Publication Number | Publication Date |
---|---|
FR2963157A1 FR2963157A1 (fr) | 2012-01-27 |
FR2963157B1 true FR2963157B1 (fr) | 2013-04-26 |
Family
ID=43608650
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
FR1056010A Active FR2963157B1 (fr) | 2010-07-22 | 2010-07-22 | Procede et appareil de collage par adhesion moleculaire de deux plaques |
Country Status (8)
Country | Link |
---|---|
US (1) | US9004135B2 (fr) |
JP (1) | JP5966215B2 (fr) |
KR (1) | KR101792683B1 (fr) |
CN (1) | CN103003933A (fr) |
DE (1) | DE112011102435B4 (fr) |
FR (1) | FR2963157B1 (fr) |
SG (1) | SG186711A1 (fr) |
WO (1) | WO2012010517A1 (fr) |
Families Citing this family (16)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2013008921A (ja) * | 2011-06-27 | 2013-01-10 | Toshiba Corp | 半導体製造装置及び製造方法 |
FR2990054B1 (fr) | 2012-04-27 | 2014-05-02 | Commissariat Energie Atomique | Procede de collage dans une atmosphere de gaz presentant un coefficient de joule-thomson negatif. |
FR2997224B1 (fr) * | 2012-10-18 | 2015-12-04 | Soitec Silicon On Insulator | Procede de collage par adhesion moleculaire |
CN104364882B (zh) | 2013-05-29 | 2018-11-16 | Ev 集团 E·索尔纳有限责任公司 | 用以接合衬底的装置及方法 |
EP3690926B1 (fr) | 2016-09-29 | 2022-08-17 | EV Group E. Thallner GmbH | Appareil et méthode pour la liaison de deux substrats |
DE102016122486A1 (de) * | 2016-11-22 | 2018-05-24 | Snaptrack, Inc. | Vorrichtung und Verfahren zur Verbindung zweier Substrate für ein elektrisches Bauelement |
US10497667B2 (en) * | 2017-09-26 | 2019-12-03 | Taiwan Semiconductor Manufacturing Co., Ltd. | Apparatus for bond wave propagation control |
JP6552570B2 (ja) * | 2017-09-26 | 2019-07-31 | エーファウ・グループ・エー・タルナー・ゲーエムベーハー | 基板をボンディングする装置および方法 |
CN108054087B (zh) * | 2017-12-07 | 2020-05-29 | 德淮半导体有限公司 | 晶圆键合中的退火装置及退火方法 |
KR102089670B1 (ko) | 2018-03-27 | 2020-04-23 | 주식회사 금용 | 멀티형 영농 살포기 |
KR102141171B1 (ko) | 2018-10-19 | 2020-08-04 | 주식회사 금용 | 탑재형 광범위 약제살포기용 분사기 |
KR102244899B1 (ko) * | 2018-11-21 | 2021-04-27 | 한국전자기술연구원 | 소자실장방법 |
CN109887860B (zh) * | 2018-12-28 | 2020-12-25 | 上海集成电路研发中心有限公司 | 一种键合腔体结构及键合方法 |
FR3094563A1 (fr) * | 2019-03-29 | 2020-10-02 | Soitec | Procede de fabrication d’un substrat de type semi-conducteur sur isolant |
KR20210055451A (ko) | 2019-11-07 | 2021-05-17 | 삼성전자주식회사 | 기판 본딩 장치 |
CN115244650A (zh) * | 2020-03-06 | 2022-10-25 | 株式会社尼康 | 控制装置、控制方法以及程序 |
Family Cites Families (8)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP3321882B2 (ja) * | 1993-02-28 | 2002-09-09 | ソニー株式会社 | 基板はり合わせ方法 |
JPH0794675A (ja) * | 1993-09-24 | 1995-04-07 | Hitachi Ltd | 半導体製造装置 |
FR2752332B1 (fr) * | 1996-08-12 | 1998-09-11 | Commissariat Energie Atomique | Dispositif de decollement de plaquettes et procede de mise en oeuvre de ce dispositif |
DE10048374B4 (de) * | 1999-10-01 | 2009-06-10 | MAX-PLANCK-Gesellschaft zur Förderung der Wissenschaften e.V. | Verfahren zum großflächigen Verbinden von Verbindungshalbleitermaterialien |
JP2006134900A (ja) | 2002-11-28 | 2006-05-25 | Toray Eng Co Ltd | 接合方法および装置 |
DE10344113A1 (de) * | 2003-09-24 | 2005-05-04 | Erich Thallner | Vorrichtung und Verfahren zum Verbinden von Wafern |
US20070110917A1 (en) | 2003-12-02 | 2007-05-17 | Bondtech, Inc | Bonding method, device formed by such method, surface activating unit and bonding apparatus comprising such unit |
EP2091071B1 (fr) * | 2008-02-15 | 2012-12-12 | Soitec | Procédé pour la liaison de deux substrats |
-
2010
- 2010-07-22 FR FR1056010A patent/FR2963157B1/fr active Active
-
2011
- 2011-07-15 US US13/808,473 patent/US9004135B2/en active Active
- 2011-07-15 JP JP2013520080A patent/JP5966215B2/ja active Active
- 2011-07-15 DE DE112011102435.5T patent/DE112011102435B4/de active Active
- 2011-07-15 KR KR1020137000338A patent/KR101792683B1/ko active IP Right Grant
- 2011-07-15 CN CN2011800351394A patent/CN103003933A/zh active Pending
- 2011-07-15 WO PCT/EP2011/062153 patent/WO2012010517A1/fr active Application Filing
- 2011-07-15 SG SG2012091476A patent/SG186711A1/en unknown
Also Published As
Publication number | Publication date |
---|---|
KR101792683B1 (ko) | 2017-11-20 |
JP5966215B2 (ja) | 2016-08-10 |
CN103003933A (zh) | 2013-03-27 |
JP2013531395A (ja) | 2013-08-01 |
US20130105061A1 (en) | 2013-05-02 |
FR2963157A1 (fr) | 2012-01-27 |
US9004135B2 (en) | 2015-04-14 |
SG186711A1 (en) | 2013-02-28 |
WO2012010517A1 (fr) | 2012-01-26 |
DE112011102435B4 (de) | 2020-11-26 |
DE112011102435T5 (de) | 2013-06-13 |
KR20130098271A (ko) | 2013-09-04 |
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Legal Events
Date | Code | Title | Description |
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CD | Change of name or company name |
Owner name: SOITEC, FR Effective date: 20120907 |
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PLFP | Fee payment |
Year of fee payment: 6 |
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PLFP | Fee payment |
Year of fee payment: 7 |
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PLFP | Fee payment |
Year of fee payment: 15 |