CN101692443B - Chip on film type semiconductor package and display device - Google Patents
Chip on film type semiconductor package and display device Download PDFInfo
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- CN101692443B CN101692443B CN 200910130468 CN200910130468A CN101692443B CN 101692443 B CN101692443 B CN 101692443B CN 200910130468 CN200910130468 CN 200910130468 CN 200910130468 A CN200910130468 A CN 200910130468A CN 101692443 B CN101692443 B CN 101692443B
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- binding agent
- thermal component
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
- H01L2224/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
- H01L2224/161—Disposition
- H01L2224/16151—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/16221—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/16225—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
- H01L2224/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
- H01L2224/321—Disposition
- H01L2224/32151—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/32221—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/32225—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
- H01L2224/732—Location after the connecting process
- H01L2224/73201—Location after the connecting process on the same surface
- H01L2224/73203—Bump and layer connectors
- H01L2224/73204—Bump and layer connectors the bump connector being embedded into the layer connector
Abstract
To provide a COF type semiconductor package including a heat dissipating member by which a heat dissipation effect improves, and the heat dissipation member can be stably fixed and maintained to an electronic device for a long period. The COF type semiconductor package may include an insulation substrate with flexibility, a semiconductor device disposed on the top surface of the insulation substrate, a heat dissipating component disposed on the bottom surface of the insulation substrate, and an adhesive component for adhering between the bottom surface of the insulation substrate and the heat dissipating component, and a pressure absorption area capable of absorbing external pressure is formed between the bottom surface of the insulation substrate and the heat dissipating component.
Description
The application require on September 29th, 2008 be submitted to Koran Office the 10-2008-0095518 korean patent application, be submitted to the 10-2008-0035821 korean patent application of Koran Office and be submitted to the rights and interests of the 10-2008-0088469 korean patent application of Koran Office on September 8th, 2008 on April 17th, 2008, the disclosure of above-mentioned application all is incorporated into this by reference.
Technical field
Design of the present invention relates to a kind of semiconductor packages, more particularly, relates to a kind of wherein semiconductor packages and is attached to membrane of flip chip (COF) type semiconductor packages on the fexible film.In addition, design of the present invention relates to a kind of band for thermal component, and this band can transmit thermal component.In addition, design of the present invention relates to a kind of electronic equipment of the COF of comprising type semiconductor packages.
Background technology
In order to further expand liquid crystal display (LCD) market, need that price is lower, display screen is larger and efficient is higher, be necessary thereby more pixel is set in less zone.Like this, the lead spacing (lead pitch) of driving chip that is used for each pixel of control LCD equipment becomes more and more less, after deliberation relative various method for packing.The example of normally used method for packing comprises that band carries encapsulation (TCP) method, glass chip on board (COG) method, membrane of flip chip (COF) method etc. in the LCD field.The TCP method at first was introduced in the later stage eighties, was used for the batch production of high resolution monitor, after, become method most popular in the LCD field.But the COF method is because cost and the output brought owing to lead spacing is little increase (yieldimprovement) from the market share increase of the later stage nineties.
Along with the trend that makes the communication equipment miniaturization, the COF method be with LCD equipment in utilize method for packing newly developed corresponding to the trend of drive integrated circult (IC).According to the COF method, the driving load of drive IC is along with the increase of the driving frequency of TV and monitor is increased to 120Hz from 60Hz, to realize high-resolution display device.Therefore, the heat that is produced by IC becomes serious problems.In order to solve thermogenetic problem, as thermogenetic solution of problem scheme, the 4th, 014, disclose a kind of basal surface in dielectric base in No. 591 Japan Patents and formed radiation panel with the method for dissipation by the heat of the generation of the semiconductor device on the top surface that is formed on dielectric base.
Example as the application of COF type semiconductor packages, the COF semiconductor packages utilizes binding agent to be attached to the edge surface of the substrate in the electronic equipment (for example LCD panel), with the curving towards described substrate, and by the base of electronic equipment extruding and fixing.
But, COF type semiconductor packages by the base of electronic equipment extruding and fixing prior art in, when electronic equipment was used for a long time, base was subject to external force from all directions (comprise top, below, left and right-hand etc.).Like this, often separate with dielectric base at the position radiation panel that base and radiation panel contact with each other.This separation reduces by half radiating efficiency by disconnecting the heat that is produced by semiconductor device by the heat dissipation channel that dielectric base, radiation panel and base dissipate.In addition, COF type semiconductor packages also can be separated with electronic equipment.
Summary of the invention
The present invention's design is to provide a kind of membrane of flip chip (COF) type semiconductor packages with radiating efficiency of improvement.
The present invention's design also provides a kind of like this chip on film type (COF) semiconductor packages, this chip on film type semiconductor package to show the radiating efficiency that improves, and can stably be fixed on the electronic equipment, and can use for a long time.
The present invention's design also provides a kind of thermal component band for the manufacture of the COF type semiconductor packages of design according to the present invention.
The present invention design also provides the electronic equipment of the COF type semiconductor packages that a kind of application conceives according to the present invention.
The present invention's design also provides a kind of band with radiating efficiency of improvement to encapsulate and comprise the display device of this band encapsulation.
The one side of design provides a kind of chip on film type (COF) semiconductor packages according to the present invention, and this chip on film type semiconductor package comprises: the flexible insulation substrate; Semiconductor device is arranged on the top surface of dielectric base; Thermal component is arranged on the basal surface of dielectric base; The space is formed between the basal surface and thermal component of dielectric base.
Design provides a kind of COF type semiconductor packages on the other hand according to the present invention, and this COF type semiconductor packages comprises: the flexible insulation substrate; Semiconductor device is arranged on the top surface of dielectric base; Thermal component is arranged on the basal surface of dielectric base; The binding agent parts are used for adhering to basal surface and the thermal component of dielectric base; The pressure absorption region can alleviate outside applied pressure.
The pressure absorption region can be empty space.Perhaps, the pressure absorption region can comprise and compares the material that can more effectively alleviate outside applied pressure with the binding agent parts.
The pressure absorption region can be formed on one or more position corresponding with a thermal component in the thermal component.
The pressure absorption region can be by dielectric base, thermal component and the sealing of binding agent parts.Perhaps, the pressure absorption region is not sealed, thereby the pressure absorption region is connected with outside.
The top surface of binding agent parts and at least one in the basal surface can comprise at least one step part, and described at least one pressure absorption region is corresponding with described at least one step part.
The top surface of thermal component can comprise at least one step part, and described at least one pressure absorption region is corresponding with described at least one step part.
The pressure absorption region can be to remove the basal surface of dielectric base and the space that the binding agent parts between the thermal component form by the part.In this case, the part of the basal surface of the binding agent parts of the part of the top surface of the binding agent parts of the basal surface of contact dielectric base, contact thermal component or the mid portion of binding agent parts can be removed.
Perhaps, described pressure absorption region can be physically to separate the basal surface of dielectric base and the binding agent parts between the thermal component and locally remove the space that the binding agent parts form by the basal surface from dielectric base, perhaps can be the space between binding agent parts and the thermal component.
Perhaps, the pressure absorption region can be to remove the thermal component of contact binding agent parts and do not remove the space that the part of binding agent parts forms by the part, perhaps removes thermal component and the two space that forms of binding agent parts by the part.
The shape of the horizontal direction of binding agent parts and thermal component can be identical.The shape of the horizontal direction of binding agent parts and thermal component can be rectangle, and the turning of this rectangle is inclined-plane or circle.The shape of the horizontal direction of binding agent parts and thermal component can change over namely, circle and/or polygon.The shape of the horizontal direction of binding agent parts and thermal component can be not identical.
The height of described pressure absorption region can be at 50nm between the 300nm.
Design provides a kind of thermal component band on the other hand according to the present invention, and this thermal component band comprises: belt carrier; Thermal component is attached on the belt carrier; The binding agent parts are used for adhering to belt carrier and thermal component, and wherein, the pressure absorption region is formed between the top surface and thermal component of belt carrier.
Design provides a kind of electronic equipment on the other hand according to the present invention, and this electronic equipment comprises: substrate; The COF semiconductor packages is attached on the surface of substrate; Base is used for extruding and fixedly is attached to suprabasil COF semiconductor packages.The COF semiconductor packages comprises: the flexible insulation substrate; Semiconductor device is arranged on the top surface of dielectric base; Thermal component is arranged on the basal surface of dielectric base; The binding agent parts are used for adhering to basal surface and the thermal component of dielectric base, and wherein, the pressure absorption region that can alleviate outside applied pressure is formed between the basal surface and thermal component of dielectric base.
Base can contact with thermal component, and the pressure absorption region is formed on the position that base and thermal component contact with each other.
Design provides a kind of band encapsulation on the other hand according to the present invention, and this band encapsulation comprises: basal film; Circuit pattern is arranged on the first surface of basal film; Protective film is arranged on basal film and the circuit pattern, so that the part of circuit pattern is exposed.Semiconductor chip is attached on the part that is exposed of circuit pattern.Adhesion layer is arranged on corresponding to semiconductor chip on the second surface of basal film, and this second surface is opposite with the first surface that is provided with semiconductor chip.
Adhesion layer can comprise the material that can be hardened the material that hardened by heat or can be hardened by ultraviolet ray in room temperature, and adhesion layer can be hardened according to two step hardening processes.In the first cure step, adhesion layer can be by sclerosis from 20% to 40%.In the second cure step, can be by sclerosis from 90% to 100%.After cure step, change in 0.1% the scope of the volume that the volume of adhesion layer can be before cure operations, and adhesion layer can have the thermal conductivity from 0.5W/mK to 10W/mK.In addition, adhesion layer can have the vitrification point (Tg) from 0 ℃ to 200 ℃, and can have the thermal coefficient of expansion (CTE) from 5ppm/ ℃ to 30ppm/ ℃.
Thin film component also can be arranged on the adhesion layer.With respect to basal film, thin film component can comprise the material with heterogeneity, so that thin film component can easily separate with basal film.Underfill material can be filled up the space between semiconductor chip and the basal film, thereby the part that is exposed of raised pad and circuit pattern is capped.
Raised pad can be arranged on the surface in the face of the first surface of basal film of semiconductor chip corresponding to the part that is exposed of circuit pattern.The raised pad of be exposed part and the semiconductor chip of circuit pattern can be automatically adhering to each other in conjunction with (TAB) technology by utilizing belt.
Design provides a kind of display device on the other hand according to the present invention, and this display device comprises display floater, band encapsulation and the base that is arranged in the display unit.The band encapsulation provides the signal of telecommunication of the display unit that is used for the driving display device.The band encapsulation comprises basal film.Circuit pattern is arranged on the first surface of basal film.Protective film is formed on circuit pattern and the basal film, with the part of exposed circuits pattern.Semiconductor chip is attached on the first surface of basal film and with the part that is exposed of circuit pattern and contacts.Adhesion layer is arranged on the second surface opposite with first surface with basal film corresponding to semiconductor chip.Adhesion layer adheres on the side surface of base and will be with encapsulation to be fixed on the base.
Adhesion layer can be on being applied to the second surface of basal film after by sclerosis from 20% to 40%.When adhesion layer is adhered on the side surface of base, can be by sclerosis from 90% to 100%.
Description of drawings
By the detailed description of carrying out below in conjunction with accompanying drawing, the exemplary embodiment of the present invention design will be expressly understood, wherein:
Figure 1A is the sectional view of the membrane of flip chip with thermal component (COF) the type semiconductor packages of the embodiment of design according to the present invention;
Figure 1B is the upward view of the COF type semiconductor packages of Figure 1A;
Fig. 1 C is the upward view of the COF type semiconductor packages of another embodiment of design according to the present invention;
Fig. 2 A is the sectional view of the COF type semiconductor packages that comprises thermal component of another embodiment of design according to the present invention;
Fig. 2 B is the upward view of the COF type semiconductor packages of Fig. 2 A;
Fig. 3 is the sectional view of the COF type semiconductor packages with thermal component of another embodiment of design according to the present invention;
Fig. 4 is the sectional view of the COF type semiconductor packages with thermal component of another embodiment of design according to the present invention;
Fig. 5 is the sectional view of the COF type semiconductor packages with thermal component of another embodiment of design according to the present invention;
Fig. 6 is the sectional view of the COF type semiconductor packages with thermal component of another embodiment of design according to the present invention;
Fig. 7 A to Fig. 9 B is that display application is in the perspective view of the various shapes of the binder parts of the embodiment of the present invention's design;
Figure 10 shows the conceptual view that COF type semiconductor packages is applied to the example on the electronic equipment;
Figure 11 A is the diagram of the thermal component band of design according to the present invention;
Figure 11 B cuts the sectional view that obtains with the thermal component band level among Figure 11 A;
Figure 12 is the sectional view of the band encapsulation of another embodiment of design according to the present invention;
Figure 13 is the sectional view on the side surface of the partial display band encapsulation base that is adhered to display device.
Embodiment
Now, describe more all sidedly with reference to the accompanying drawings design of the present invention, the exemplary embodiment of the present invention's design is illustrated in the accompanying drawings.But, the present invention's design can be implemented according to a lot of different forms, and should not be understood to be confined to embodiment set forth herein, on the contrary, provide these embodiment so that the disclosure will be thoroughly also complete, and the concept of the present invention's design is intactly conveyed to those of ordinary skills.In the accompanying drawings, the thickness in layer and zone is for the sake of clarity exaggerated.Identical label represents identical element in the accompanying drawings, therefore, will omit description of them.
Figure 1A is the sectional view of the membrane of flip chip with thermal component 17 (COF) the type semiconductor device (for example, COF type semiconductor packages) of the embodiment of design according to the present invention.Figure 1B is the upward view of the COF type semiconductor device of Figure 1A.
With reference to Figure 1A and Figure 1B, COF type semiconductor packages comprises: dielectric base 13 is the form of fexible film; Semiconductor device 11 has semiconductor integrated circuit and is arranged on the dielectric base 13.Dielectric base 13 is formed by fexible film (for example, polyimides and polyester).A plurality of conductive lead wires 14 with constant pattern are formed on the dielectric base 13, and described lead-in wire 14 is formed by (for example) copper.Surface insulation layer 15 is formed on the lead-in wire 14, and surface insulation layer 15 is formed by for example solder resist (SR) layer.When watching from the top, a plurality of lead-in wires 14 are arranged on the dielectric base 13, so that it is 14 separated from one another to go between, and 14 the inner concentrated setting of going between.Inner and the covering lead-in wire 14 of surface insulation layer 15 local exposed leads 14.
By raised pad 12 being inserted semiconductor device 11 and going between between 14, semiconductor device 11 is arranged on the part that is exposed of lead-in wire 14 top surface, seal 16 forms around semiconductor device 11, so that semiconductor device 11 stably is fixed on the dielectric base 13.
Raised pad 12 and lead-in wire 14 can be electrically connected by utilizing alloy knot (for example, Au-Sn or Au-Au).Seal 16 can be formed by for example molding resin (molding resin).
Simultaneously, thermal component 17 is by utilizing binding agent parts 18 to be attached to the basal surface of dielectric base 13.Thermal component 17 is for the parts of the heat that will be produced by the operation of semiconductor device 11 by the going down such as seal 16, lead-in wire 14 and the heat that outwards effectively dissipates, and can be formed greater than the various materials of the thermal conductivity of dielectric base 13 (for example, metal such as aluminium etc.) by thermal conductivity.Simultaneously, thermal component 17 can acryl family binding agent parts (acryl-family adhesive component) 18 be attached on the dielectric base 13 by for example utilizing.
The pressure absorption region 19 that can absorb outside applied pressure is formed between the top surface of the basal surface of dielectric base 13 of the formation that is fexible film and thermal component 17.Pressure absorption region 19 is spaces that form by removal binding agent parts 18, and can be the space that is filled with air or can alleviates the pressure absorbing material of outside applied pressure.In current embodiment, pressure absorption region 19 is the spaces by dielectric base 13, thermal component 17 and 18 sealings of binding agent parts.In order effectively to dispel the heat and absorption pressure, the height of pressure absorption region 19 can be for example approximately between the extremely about 300nm of 50nm.Height in pressure absorption region 19 is less than or equal in the situation of 50nm, and the efficient that pressure absorbs can reduce.Simultaneously, the height in pressure absorption region 19 is equal to, or greater than in the situation of 300nm, and radiating efficiency can reduce.
Fig. 1 C is the upward view of the COF type semiconductor packages of another embodiment of design according to the present invention.Except thermal component 17 comprised the projection 17a of the basal surface edge that extends to dielectric base 13, the COF type semiconductor packages of Fig. 1 C was equal to the COF type semiconductor packages of Figure 1B.Projection 17a can improve radiating efficiency by being connected to the external radiating device (not shown).
Fig. 2 A is the sectional view of the COF type semiconductor packages that comprises thermal component 17 of another embodiment of design according to the present invention, and Fig. 2 B is the upward view of the COF type semiconductor packages of Fig. 2 A.In Fig. 2 A and Fig. 2 B, identical parts are represented by identical reference number, will omit detailed description here.
With reference to Fig. 2 A and Fig. 2 B, Existential Space between the top surface of the basal surface of dielectric base 13 and binding agent parts 18, this space consists of the pressure absorption region 19 that can absorb outside applied pressure.In current embodiment, binding agent parts 18 have constant thickness, also are not removed part.
More particularly, the pressure absorption region 19 in current embodiment can be the space that forms when binding agent parts 18 physically separate with the basal surface of dielectric base 13.For effectively heat radiation and absorption pressure, the height of pressure absorption region 19 can be at 50nm for example between the 300nm.
Fig. 3 is the sectional view of the COF type semiconductor packages with thermal component 17 of another embodiment of design according to the present invention.The parts identical with parts among Figure 1A and Figure 1B are denoted by like references, and will omit detailed description here.
With reference to Fig. 3, the top surface of the binding agent parts 18 that contact with the basal surface of dielectric base 13 is removed by the part, thus between the basal surface of dielectric base 13 and binding agent parts 18 Existential Space.This space consists of the pressure absorption region 19 that can absorb outside applied pressure.
Fig. 4 is the sectional view of the COF type semiconductor packages with thermal component 17 of another embodiment of design according to the present invention.With reference to Fig. 4, the basal surface of the binding agent parts 18 that contact with the top surface of thermal component 17 is removed by the part, thus between the basal surface of binding agent parts 18 and thermal component 17 Existential Space.This space consists of the pressure absorption region 19 that can absorb outside applied pressure.
Fig. 5 is the sectional view of the COF type semiconductor packages with thermal component 17 of another embodiment of design according to the present invention.At the middle Existential Space of binding agent parts 18, this space consists of the pressure absorption region 19 that can absorb outside applied pressure.
Fig. 6 is the sectional view of the COF type semiconductor packages with thermal component 17 of another embodiment of design according to the present invention.Binding agent parts 18 are not removed by the part, and the top surface of the thermal component 17 of contact binding agent 18 is removed by the part.Therefore, Existential Space between the basal surface of binding agent parts 18 and thermal component 17, this space consists of the pressure absorption region 19 that can absorb outside applied pressure.Although do not show that the surface of the binding agent parts 18 that contact with each other and the surface of thermal component 17 can be removed by the part, to be formed for the space of pressure absorption region.
Fig. 7 A to Fig. 9 B is the perspective view of various shapes that shows the binder parts 18 of the embodiment can be applicable to the present invention's design;
Fig. 7 A to Fig. 7 F has shown wherein binding agent parts 18 by the local example of removing and penetrating, and these examples are corresponding with embodiment among Figure 1A.
With reference to Fig. 7 A, the center of binding agent parts 18 is removed and is penetrated by the part.Thereby the space of formation consists of pressure absorption region 19.Applying according to current embodiment in the situation of binding agent parts 18, forming the pressure absorption region by dielectric base 13, thermal component 17 and 18 sealings of binding agent parts.The shape in the space that forms although remove the part of binding agent parts 18 is rectangle, and the present invention's design is not limited to this, and this space can have various shapes, for example circular, oval, polygon.
With reference to Fig. 7 B, a plurality of pressure absorption regions 19 that penetrate are formed in the binding agent parts 18.The quantity of the pressure absorption region 19 that penetrates can change, and their position can be arranged regularly or brokenly.
With reference to Fig. 7 C, a plurality of pressure absorption regions 19 that penetrate with sealing of strip are formed in the binding agent parts 18.
With reference to Fig. 7 D, compare with Fig. 7 A, shown the embodiment of the single untight pressure absorption region 19 corresponding with single binding agent parts 18.
With reference to Fig. 7 E, extend the pressure absorption region 19 with strip of Fig. 7 C, so that binding agent parts 18 are divided into a plurality of parts, thereby, form a plurality of pressure absorption regions 19 that penetrate.In the situation of using the current embodiment as shown in Fig. 7 D and Fig. 7 E, pressure absorption region 19 is not sealed, thereby pressure absorption region 19 is connected with outside.
With reference to Fig. 7 F, the turning of binding agent parts 18 is that very large stress can be applied to the turning in the situation of Fig. 7 A at right angle therein, thereby binding agent parts 18 can be by separately.Therefore, the turning can be rounded, to reduce the separating machine meeting of binding agent parts 18.In addition, the turning can be the inclined-plane that is applied to the stress on it be used to alleviating.
Fig. 8 A to Fig. 8 C has shown the example that binding agent parts 18 are not wherein penetrated by local the removal, and these examples are corresponding to the embodiment among Fig. 3.Although binding agent parts 18 are not penetrated,, the shape of pressure absorption region 19 can correspondingly change according to Fig. 7 A to Fig. 7 F.
Fig. 9 A and Fig. 9 B have shown that binding agent parts 18 are not wherein removed and be included in the example of outstanding or recessed pressure absorption region 19, precalculated position by the part, and these examples are corresponding with embodiment among Fig. 2 A.In Fig. 9 A, form single pressure absorption region 19 corresponding to single binding agent parts 18.In Fig. 9 B, form a plurality of pressure absorption region 19 corresponding to single binding agent parts 18.
Figure 10 shows the conceptual view that COF type semiconductor packages is applied to the example on the electronic equipment (for example liquid crystal display (LCD) panel).
With reference to Figure 10, for example, the end of the COF type semiconductor packages of Fig. 2 A is by utilizing binding agent 22 to be attached to the edge of top surface of the substrate 20 of electronic equipment, and by utilizing base 21 to be fixed.
With reference to Figure 10, COF type semiconductor packages is attached, so that the part of surface insulation layer 15 contacts with the substrate 20 of electronic equipment, base 21 contacts with thermal component 17, extrudes and fixes thermal component 17.At this moment, pressure absorption region 19 is near the thermal component 17 of contact base 21.Therefore, even base 21 along various directions (for example, upwards, downwards,, wait) substrate 20 is applied power or vibration left to the right, pressure absorption region 19 also can alleviate described power or vibration, thereby can prevent that thermal component 17 from separating with dielectric base 13.
Figure 11 A is the diagram of the thermal component band that is used for transmission thermal component 17 of design according to the present invention, and Figure 11 B cuts the sectional view that obtains with the thermal component band level among Figure 11 A.
With reference to Figure 11 A and Figure 11 B, by with binding agent parts 18 between thermal component 17 and belt carrier 25, thermal component 17 is attached on the belt carrier 25, belt carrier 25 is the bands (for example, polyimides) that can reel.Boundary belt 26 (for example polyimides) also can be formed on the thermal component 17.Binding agent parts 18 can be a kind of among the various embodiment of above-mentioned the present invention design.
In the COF type semiconductor packages of making the embodiment of design according to the present invention, belt carrier 25 is last removed parts.Boundary belt 26 can be removed or not be removed at last.
In order to describe simply the method for the COF type semiconductor packages of making Figure 1A, chip-shaped semiconductor device 11 is attached on the dielectric base by getting involved raised pad 12 and seal 16, and surface insulation layer 15 and lead-in wire 14 with predetermined pattern are pre-formed on this dielectric base.Then, belt carrier 25 is removed from the thermal component band of Figure 11 A, and thermal component 17 is attached, so that the binding agent parts 18 that expose are attached to the basal surface of dielectric base 13.Therefore, the semiconductor packages of design is manufactured according to the present invention goes out.
Figure 12 is the sectional view of the band encapsulation 200 of another embodiment of design according to the present invention.With reference to Figure 12, band encapsulation 200 can be the encapsulation of COF type.Band encapsulation 200 comprises strip substrate 210 and semiconductor chip 250.Strip substrate 210 can be flexible printed circuit board (FPCB).
Strip substrate 210 comprises basal film 220, be arranged on the first surface of basal film 220 circuit pattern 230 and for the protection of the protective film 240 of circuit pattern 230.Basal film 220 can be insulation film (for example polyimides or polyester).Circuit pattern 230 can comprise copper pattern.In addition, circuit pattern 230 can comprise the copper pattern that is coated with tin, gold or nickel.Protective film 240 can comprise solder resist (solder resist).Protective film 240 can be arranged on basal film 220 and the circuit pattern 230, so that the part of circuit pattern 230 is exposed.
In addition, band encapsulation 200 also comprises adhesion layer 280, and this adhesion layer 280 is arranged on basal film 220 and the second surface surface opposite that is provided with semiconductor chip 250.Adhesion layer 280 dissipates from the heat of semiconductor chip 250 radiation.
Band encapsulation 200 thin film components 290 that also can comprise on the second surface that is arranged on basal film 220.Thin film component 290 can be arranged on the top surface of adhesion layer 280.With respect to basal film 220, thin film component 290 can comprise the material with heterogeneity, thereby thin film component 290 can separate easily with adhesion layer 280 and basal film 220 when strip substrate 210 is coiled (reel-to-reel) processing.
Figure 13 is the sectional view on the side surface of partial display band encapsulation 200 base that is adhered to display device 100.With reference to Figure 13, the adhesion layer 280 of band encapsulation 200 is adhered on the side surface of base 110, thereby band encapsulation 200 is fixed on the base 110.Be dissipated by adhesion layer 280 along the direction vertical with the top surface of semiconductor chip from the heat of semiconductor chip 250 radiation.
In display unit shown in Figure 13 100, reference number 121 expression display floaters, reference number 125 expression printed circuit board (PCB)s.Display floater 100 can comprise lower substrate 122 and upper substrate 123.The liquid crystal (not shown) can be arranged between lower substrate 122 and the upper substrate 123.
Although specifically show with reference to exemplary embodiment and described design of the present invention, should be appreciated that, in the situation of the spirit and scope that do not break away from claim, can carry out change on various forms and the details to it.
Claims (18)
1. chip on film type semiconductor package comprises:
Dielectric base comprises top surface and basal surface;
Semiconductor device is on the top surface of described dielectric base;
Thermal component, on the basal surface of described dielectric base, wherein, thermal component and dielectric base are arranged to form at least one space between the top surface of the basal surface of dielectric base and thermal component,
The binding agent parts are constructed to thermal component is attached on the basal surface of described dielectric base,
Wherein, described at least one space is at least one the pressure absorption region that is constructed to absorb external pressure.
2. chip on film type semiconductor package as claimed in claim 1, wherein, described at least one pressure absorption region is positioned at the position corresponding with thermal component.
3. chip on film type semiconductor package as claimed in claim 1, wherein, described at least one pressure absorption region is by described dielectric base, thermal component and the sealing of binding agent parts.
4. chip on film type semiconductor package as claimed in claim 1, wherein, described at least one pressure absorption region is not sealed, thus the pressure absorption region is connected with outside.
5. chip on film type semiconductor package as claimed in claim 1, wherein, the top surface of binding agent parts and at least one in the basal surface comprise at least one step part, and described at least one pressure absorption region is corresponding with described at least one step part.
6. chip on film type semiconductor package as claimed in claim 5, wherein, described at least one step part is adjacent with described dielectric base.
7. chip on film type semiconductor package as claimed in claim 5, wherein, described at least one step part is adjacent with described thermal component.
8. chip on film type semiconductor package as claimed in claim 1, wherein, the top surface of thermal component comprises at least one step part, described at least one pressure absorption region is corresponding with described at least one step part.
9. chip on film type semiconductor package as claimed in claim 1, wherein, described at least one pressure absorption region is between the basal surface of the top surface of binding agent parts and binding agent parts.
10. chip on film type semiconductor package as claimed in claim 1, wherein, described at least one pressure absorption region is between the basal surface of the top surface of binding agent parts and dielectric base.
11. chip on film type semiconductor package as claimed in claim 10, wherein, the binding agent parts have constant thickness.
12. chip on film type semiconductor package as claimed in claim 11, wherein, except the part of the binding agent parts that interrelate with described pressure absorption region, the binding agent parts directly contact with the basal surface of dielectric base.
13. chip on film type semiconductor package as claimed in claim 1, wherein, the horizontal shape of thermal component and binding agent parts is identical.
14. chip on film type semiconductor package as claimed in claim 1, wherein, the height of described at least one pressure absorption region at 50nm between the 300nm.
15. chip on film type semiconductor package as claimed in claim 1, wherein, described dielectric base is the flexible insulation substrate.
16. chip on film type semiconductor package as claimed in claim 1, wherein, the thermal conductivity of described thermal component is greater than the thermal conductivity of dielectric base.
17. chip on film type semiconductor package as claimed in claim 1, wherein, described thermal component comprises the projection that is constructed to be connected to heat abstractor.
18. a display unit comprises:
Chip on film type semiconductor package in the claim 1.
Applications Claiming Priority (6)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| KR10-2008-0035821 | 2008-04-17 | ||
| KR20080035821 | 2008-04-17 | ||
| KR1020080088469A KR20100029629A (en) | 2008-09-08 | 2008-09-08 | Tape package having adhesive layer for heat sink and display device with the same |
| KR10-2008-0088469 | 2008-09-08 | ||
| KR10-2008-0095518 | 2008-09-29 | ||
| KR20080095518A KR101493869B1 (en) | 2008-04-17 | 2008-09-29 | Tape for heat dissipating member, COF type semiconductor package having heat dissipating member and electronic apparatus thereof |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| CN101692443A CN101692443A (en) | 2010-04-07 |
| CN101692443B true CN101692443B (en) | 2013-03-27 |
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| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN 200910130468 Active CN101692443B (en) | 2008-04-17 | 2009-04-17 | Chip on film type semiconductor package and display device |
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| Country | Link |
|---|---|
| JP (1) | JP5207477B2 (en) |
| CN (1) | CN101692443B (en) |
| TW (1) | TWI501360B (en) |
Families Citing this family (10)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| TWI424388B (en) * | 2010-04-30 | 2014-01-21 | Au Optronics Corp | Flexible display and fabricating method thereof |
| CN102201390B (en) * | 2011-05-09 | 2012-11-07 | 厦门英诺尔电子科技股份有限公司 | Chip on film (COF) packaging substrate for high-pixel camera module and manufacturing method thereof |
| CN105990276A (en) * | 2015-03-06 | 2016-10-05 | 奕力科技股份有限公司 | Flexible substrate semiconductor packaging device with heat radiating structure |
| KR102532627B1 (en) * | 2016-06-10 | 2023-05-15 | 삼성디스플레이 주식회사 | Cof package and display device comprising the same |
| TWI596729B (en) * | 2016-12-15 | 2017-08-21 | 南茂科技股份有限公司 | Chip package structure |
| CN109300879B (en) * | 2018-09-18 | 2020-12-29 | 惠科股份有限公司 | Drive chip packaging structure, separation method and separation equipment thereof |
| CN108933111B (en) * | 2018-09-28 | 2020-03-31 | 上海天马有机发光显示技术有限公司 | Crystal coated film heat radiation structure and display device |
| CN111755434A (en) * | 2019-03-27 | 2020-10-09 | 力晶积成电子制造股份有限公司 | Semiconductor package |
| TWI710288B (en) * | 2020-01-22 | 2020-11-11 | 頎邦科技股份有限公司 | Method and device for adhering heat sinks to a circuit board tape |
| KR102514310B1 (en) * | 2020-09-17 | 2023-03-28 | 스테코 주식회사 | Cof package |
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| CN1219768A (en) * | 1997-11-14 | 1999-06-16 | 国际商业机器公司 | Method and apparatus for heat transfer enhancing attachment |
| CN101156241A (en) * | 2005-04-06 | 2008-04-02 | 株式会社丰田自动织机 | Heat sink device |
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| JPH10242333A (en) * | 1997-03-01 | 1998-09-11 | Nitto Denko Corp | Semiconductor device and its manufacture |
| JP3491576B2 (en) * | 1999-10-20 | 2004-01-26 | 松下電器産業株式会社 | Semiconductor device and mounting structure of semiconductor device |
| JP2005049662A (en) * | 2003-07-30 | 2005-02-24 | Hitachi Displays Ltd | Liquid crystal display |
| JP5489394B2 (en) * | 2006-07-20 | 2014-05-14 | 三星電子株式会社 | COF type semiconductor package |
| KR100785950B1 (en) * | 2006-11-09 | 2007-12-14 | 스테코 주식회사 | Cof package and method for manufacturing the same |
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2009
- 2009-04-15 TW TW098112534A patent/TWI501360B/en active
- 2009-04-17 CN CN 200910130468 patent/CN101692443B/en active Active
- 2009-04-17 JP JP2009101131A patent/JP5207477B2/en active Active
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| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN1219768A (en) * | 1997-11-14 | 1999-06-16 | 国际商业机器公司 | Method and apparatus for heat transfer enhancing attachment |
| CN101156241A (en) * | 2005-04-06 | 2008-04-02 | 株式会社丰田自动织机 | Heat sink device |
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| JP特开2007-19203A 2007.01.25 |
Also Published As
| Publication number | Publication date |
|---|---|
| TW200945517A (en) | 2009-11-01 |
| CN101692443A (en) | 2010-04-07 |
| JP2009260359A (en) | 2009-11-05 |
| JP5207477B2 (en) | 2013-06-12 |
| TWI501360B (en) | 2015-09-21 |
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