CN101681900B - 接触垫和形成用于集成电路的接触垫的方法 - Google Patents

接触垫和形成用于集成电路的接触垫的方法 Download PDF

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CN101681900B
CN101681900B CN2008800187222A CN200880018722A CN101681900B CN 101681900 B CN101681900 B CN 101681900B CN 2008800187222 A CN2008800187222 A CN 2008800187222A CN 200880018722 A CN200880018722 A CN 200880018722A CN 101681900 B CN101681900 B CN 101681900B
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protrusions
protrusion
platform
contact pad
contact mat
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CN101681900A (zh
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张蕾蕾
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Xilinx Inc
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Xilinx Inc
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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/10—Bump connectors ; Manufacturing methods related thereto
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/02—Bonding areas ; Manufacturing methods related thereto
    • H01L24/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L24/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/10—Bump connectors ; Manufacturing methods related thereto
    • H01L24/12—Structure, shape, material or disposition of the bump connectors prior to the connecting process
    • H01L24/13—Structure, shape, material or disposition of the bump connectors prior to the connecting process of an individual bump connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/02—Bonding areas; Manufacturing methods related thereto
    • H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L2224/0401—Bonding areas specifically adapted for bump connectors, e.g. under bump metallisation [UBM]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/02—Bonding areas; Manufacturing methods related thereto
    • H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L2224/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
    • H01L2224/0554—External layer
    • H01L2224/0555—Shape
    • H01L2224/05556—Shape in side view
    • H01L2224/05557—Shape in side view comprising protrusions or indentations
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10—Bump connectors; Manufacturing methods related thereto
    • H01L2224/12—Structure, shape, material or disposition of the bump connectors prior to the connecting process
    • H01L2224/13—Structure, shape, material or disposition of the bump connectors prior to the connecting process of an individual bump connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10—Bump connectors; Manufacturing methods related thereto
    • H01L2224/12—Structure, shape, material or disposition of the bump connectors prior to the connecting process
    • H01L2224/13—Structure, shape, material or disposition of the bump connectors prior to the connecting process of an individual bump connector
    • H01L2224/13001—Core members of the bump connector
    • H01L2224/13099—Material
    • H—ELECTRICITY
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    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
    • H01L2224/732—Location after the connecting process
    • H01L2224/73251—Location after the connecting process on different surfaces
    • H01L2224/73253—Bump and layer connectors
    • H—ELECTRICITY
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    • H01L2924/01013—Aluminum [Al]
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    • H01L2924/01—Chemical elements
    • H01L2924/01022—Titanium [Ti]
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    • H01L2924/01—Chemical elements
    • H01L2924/01029—Copper [Cu]
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    • H01L2924/01033—Arsenic [As]
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    • H01L2924/01—Chemical elements
    • H01L2924/01082—Lead [Pb]
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    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/013—Alloys
    • H01L2924/014—Solder alloys
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    • H01—ELECTRIC ELEMENTS
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    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10—Details of semiconductor or other solid state devices to be connected
    • H01L2924/11—Device type
    • H01L2924/14—Integrated circuits
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    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/151—Die mounting substrate
    • H01L2924/153—Connection portion
    • H01L2924/1531—Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface
    • H01L2924/15311—Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface being a ball array, e.g. BGA
    • H—ELECTRICITY
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    • H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/161—Cap
    • H01L2924/1615—Shape
    • H01L2924/16152—Cap comprising a cavity for hosting the device, e.g. U-shaped cap
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
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    • H01L2924/30—Technical effects
    • H01L2924/301—Electrical effects
    • H01L2924/30107—Inductance

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  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Wire Bonding (AREA)
  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
  • Lead Frames For Integrated Circuits (AREA)
CN2008800187222A 2007-06-05 2008-06-05 接触垫和形成用于集成电路的接触垫的方法 Active CN101681900B (zh)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
US11/810,616 US7821132B2 (en) 2007-06-05 2007-06-05 Contact pad and method of forming a contact pad for an integrated circuit
US11/810,616 2007-06-05
PCT/US2008/065984 WO2008151301A1 (en) 2007-06-05 2008-06-05 A contact pad and method of forming a contact pad for an integrated circuit

Publications (2)

Publication Number Publication Date
CN101681900A CN101681900A (zh) 2010-03-24
CN101681900B true CN101681900B (zh) 2011-12-07

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CN2008800187222A Active CN101681900B (zh) 2007-06-05 2008-06-05 接触垫和形成用于集成电路的接触垫的方法

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US (1) US7821132B2 (enExample)
EP (1) EP2150975B1 (enExample)
JP (1) JP5181261B2 (enExample)
CN (1) CN101681900B (enExample)
CA (1) CA2687424C (enExample)
WO (1) WO2008151301A1 (enExample)

Families Citing this family (11)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20110278054A1 (en) * 2010-05-14 2011-11-17 I-Tseng Lee Circuit board with notched conductor pads
US8766457B2 (en) 2010-12-01 2014-07-01 SK Hynix Inc. Bonding structure of semiconductor package, method for fabricating the same, and stack-type semiconductor package
US9087830B2 (en) * 2012-03-22 2015-07-21 Nvidia Corporation System, method, and computer program product for affixing a post to a substrate pad
JP2015532790A (ja) 2012-09-05 2015-11-12 リサーチ トライアングル インスティテュート 突起を有する接点パッドを利用した電子デバイス及び組み立て方法
EP2932526A4 (en) * 2012-12-13 2016-10-19 California Inst Of Techn PREPARATION OF ELECTRODES WITH THREE-DIMENSIONAL LARGE SURFACE
US10376146B2 (en) 2013-02-06 2019-08-13 California Institute Of Technology Miniaturized implantable electrochemical sensor devices
US9536850B2 (en) * 2013-03-08 2017-01-03 Taiwan Semiconductor Manufacturing Company, Ltd. Package having substrate with embedded metal trace overlapped by landing pad
US10368788B2 (en) 2015-07-23 2019-08-06 California Institute Of Technology System and methods for wireless drug delivery on command
DE102016115848B4 (de) * 2016-08-25 2024-02-01 Infineon Technologies Ag Halbleiterbauelemente und Verfahren zum Bilden eines Halbleiterbauelements
US20200006273A1 (en) * 2018-06-28 2020-01-02 Intel Corporation Microelectronic device interconnect structure
US12057429B1 (en) * 2021-06-23 2024-08-06 Hrl Laboratories, Llc Temporary bonding structures for die-to-die and wafer-to-wafer bonding

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6384343B1 (en) * 1999-12-03 2002-05-07 Nec Corporation Semiconductor device

Family Cites Families (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5592736A (en) * 1993-09-03 1997-01-14 Micron Technology, Inc. Fabricating an interconnect for testing unpackaged semiconductor dice having raised bond pads
US5686762A (en) * 1995-12-21 1997-11-11 Micron Technology, Inc. Semiconductor device with improved bond pads
US5929521A (en) * 1997-03-26 1999-07-27 Micron Technology, Inc. Projected contact structure for bumped semiconductor device and resulting articles and assemblies
US6313541B1 (en) * 1999-06-08 2001-11-06 Winbond Electronics Corp. Bone-pad with pad edge strengthening structure
DE10252556B3 (de) * 2002-11-08 2004-05-19 Infineon Technologies Ag Elektronisches Bauteil mit Außenkontaktelementen und Verfahren zur Herstellung einer Mehrzahl dieses Bauteils
US6959856B2 (en) * 2003-01-10 2005-11-01 Samsung Electronics Co., Ltd. Solder bump structure and method for forming a solder bump
KR100541396B1 (ko) * 2003-10-22 2006-01-11 삼성전자주식회사 3차원 ｕｂｍ을 포함하는 솔더 범프 구조의 형성 방법
US7170187B2 (en) * 2004-08-31 2007-01-30 International Business Machines Corporation Low stress conductive polymer bump
US7394159B2 (en) * 2005-02-23 2008-07-01 Intel Corporation Delamination reduction between vias and conductive pads

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6384343B1 (en) * 1999-12-03 2002-05-07 Nec Corporation Semiconductor device

Also Published As

Publication number Publication date
EP2150975B1 (en) 2016-10-26
WO2008151301A1 (en) 2008-12-11
JP2010529681A (ja) 2010-08-26
CA2687424C (en) 2013-09-24
US20080303152A1 (en) 2008-12-11
JP5181261B2 (ja) 2013-04-10
EP2150975A1 (en) 2010-02-10
CN101681900A (zh) 2010-03-24
CA2687424A1 (en) 2008-12-11
US7821132B2 (en) 2010-10-26

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