CN101540299B - 元件搭载用基板、半导体组件及其制造方法及便携式设备 - Google Patents

元件搭载用基板、半导体组件及其制造方法及便携式设备 Download PDF

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Publication number
CN101540299B
CN101540299B CN2009101346932A CN200910134693A CN101540299B CN 101540299 B CN101540299 B CN 101540299B CN 2009101346932 A CN2009101346932 A CN 2009101346932A CN 200910134693 A CN200910134693 A CN 200910134693A CN 101540299 B CN101540299 B CN 101540299B
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CN
China
Prior art keywords
projected electrode
wiring layer
electrode
insulating resin
mounting substrate
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CN2009101346932A
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English (en)
Chinese (zh)
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CN101540299A (zh
Inventor
小林初
柳瀬康行
山本哲也
冈山芳央
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Sanyo Electric Co Ltd
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Sanyo Electric Co Ltd
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Publication date
Priority claimed from JP2008050473A external-priority patent/JP2009212114A/ja
Priority claimed from JP2008080994A external-priority patent/JP5022963B2/ja
Application filed by Sanyo Electric Co Ltd filed Critical Sanyo Electric Co Ltd
Publication of CN101540299A publication Critical patent/CN101540299A/zh
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Publication of CN101540299B publication Critical patent/CN101540299B/zh
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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/02—Bonding areas; Manufacturing methods related thereto
    • H01L2224/023—Redistribution layers [RDL] for bonding areas
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10—Bump connectors; Manufacturing methods related thereto
    • H01L2224/12—Structure, shape, material or disposition of the bump connectors prior to the connecting process
    • H01L2224/13—Structure, shape, material or disposition of the bump connectors prior to the connecting process of an individual bump connector

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  • Wire Bonding (AREA)
CN2009101346932A 2008-01-31 2009-02-01 元件搭载用基板、半导体组件及其制造方法及便携式设备 Active CN101540299B (zh)

Applications Claiming Priority (6)

Application Number Priority Date Filing Date Title
JP2008022013A JP5028291B2 (ja) 2008-01-31 2008-01-31 素子搭載用基板、素子搭載用基板の製造方法、半導体モジュールおよび半導体モジュールの製造方法
JP022013/08 2008-01-31
JP050473/08 2008-02-29
JP2008050473A JP2009212114A (ja) 2008-02-29 2008-02-29 突起電極の構造、素子搭載用基板およびその製造方法、半導体モジュール、ならびに携帯機器
JP080994/08 2008-03-26
JP2008080994A JP5022963B2 (ja) 2008-03-26 2008-03-26 突起電極の構造、素子搭載用基板およびその製造方法、半導体モジュール、ならびに携帯機器

Publications (2)

Publication Number Publication Date
CN101540299A CN101540299A (zh) 2009-09-23
CN101540299B true CN101540299B (zh) 2013-04-24

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CN2009101346932A Active CN101540299B (zh) 2008-01-31 2009-02-01 元件搭载用基板、半导体组件及其制造方法及便携式设备

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JP (1) JP5028291B2 (enrdf_load_stackoverflow)
CN (1) CN101540299B (enrdf_load_stackoverflow)

Families Citing this family (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR101669534B1 (ko) * 2009-12-07 2016-10-26 해성디에스 주식회사 범프를 구비한 회로기판 및 그 제조 방법
WO2011136363A1 (ja) * 2010-04-28 2011-11-03 三洋電機株式会社 回路装置の製造方法
US9398389B2 (en) * 2013-05-13 2016-07-19 Knowles Electronics, Llc Apparatus for securing components in an electret condenser microphone (ECM)
JP7226472B2 (ja) * 2020-05-26 2023-02-21 株式会社村田製作所 部品相互接続要素を備えた電子部品

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6010769A (en) * 1995-11-17 2000-01-04 Kabushiki Kaisha Toshiba Multilayer wiring board and method for forming the same
US6452280B1 (en) * 1996-03-06 2002-09-17 Matsushita Electric Industrial Co., Ltd. Flip chip semiconductor apparatus with projecting electrodes and method for producing same
US6831234B1 (en) * 1996-06-19 2004-12-14 Ibiden Co., Ltd. Multilayer printed circuit board

Family Cites Families (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5823943B2 (ja) * 1975-07-16 1983-05-18 松下電器産業株式会社 絶縁体の貫通電極形成方法
JP3769587B2 (ja) * 2000-11-01 2006-04-26 株式会社ノース 配線回路用部材とその製造方法と多層配線回路基板と半導体集積回路装置
JP2004095913A (ja) * 2002-08-30 2004-03-25 Dainippon Printing Co Ltd プリント配線基板及びその製造方法
JP2006310530A (ja) * 2005-04-28 2006-11-09 Sanyo Electric Co Ltd 回路装置およびその製造方法
JP4568215B2 (ja) * 2005-11-30 2010-10-27 三洋電機株式会社 回路装置および回路装置の製造方法

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6010769A (en) * 1995-11-17 2000-01-04 Kabushiki Kaisha Toshiba Multilayer wiring board and method for forming the same
US6452280B1 (en) * 1996-03-06 2002-09-17 Matsushita Electric Industrial Co., Ltd. Flip chip semiconductor apparatus with projecting electrodes and method for producing same
US6831234B1 (en) * 1996-06-19 2004-12-14 Ibiden Co., Ltd. Multilayer printed circuit board

Also Published As

Publication number Publication date
JP2009182274A (ja) 2009-08-13
CN101540299A (zh) 2009-09-23
JP5028291B2 (ja) 2012-09-19

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