CN101527294B - 驱动集成电路基板的散热层的制造方法与结构 - Google Patents

驱动集成电路基板的散热层的制造方法与结构 Download PDF

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CN101527294B
CN101527294B CN2008102159939A CN200810215993A CN101527294B CN 101527294 B CN101527294 B CN 101527294B CN 2008102159939 A CN2008102159939 A CN 2008102159939A CN 200810215993 A CN200810215993 A CN 200810215993A CN 101527294 B CN101527294 B CN 101527294B
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伍家辉
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Abstract

一种驱动集成电路基板的散热层的制造方法与结构，该结构包含有可挠性电路板与芯片，该可挠性电路板具有可挠性基膜与导电层，该可挠性基膜具有聚酰亚胺层与各向异性导电层，且该导电层与该各向异性导电层被该聚酰亚胺层分开。该导电层设置于该可挠性基膜上，且该芯片经由连接物连接于该导电层之上。

Description

驱动集成电路基板的散热层的制造方法与结构
技术领域
本发明关于膜上芯片结构，尤指一种驱动集成电路基板的散热层的制造方法与其相关结构。
背景技术
近年来，液晶显示器(liquid crystal display，LCD)被广泛运应于各种电子装置中，例如：手机、个人数字助理(personal digital assistant，PDA)以及笔记型电脑。随着显示器的尺寸增加，液晶显示器由于其轻薄短小的特性，已经渐渐取代传统的阴极射线管(CRT)荧幕，成为现今显示荧幕市场上的主流。
随着液晶显示尺寸增加，其驱动集成电路(integration circuit，IC)的通道数目与操作频率亦随的大幅地增加，然而，通道数目及操作频率的增加极可能造成显示器的驱动IC过热而降低显示器的性能及缩短显示器的生命周期。因此，目前亟需提供一种新的方法及装置来改善液晶显示器的散热效率以避免驱动IC产生过热的问题。
发明内容
因此本发明的目的在于提供一种驱动集成电路基板的散热层的制造方法与其相关结构来改善散热效率，以解决上述问题。
依据本发明的实施例，揭露一种膜上芯片结构。该膜上芯片结构包含有一可挠性电路板与一芯片，该可挠性电路板具有一可挠性基膜与一导电层，该可挠性基膜具有一聚酰亚胺层与一各向异性导电层，且该导电层与该各向异性导电层被该聚酰亚胺层分开。该导电层设置于该可挠性基膜上，且该芯片经由连接物连接于该导电层之上。
依据本发明的实施例，亦揭露一种驱动集成电路基板的散热层的制造方法。该方法包含有:提供具有一可挠性基膜与一导电层的一可挠性电路板，其中该可挠性基膜具有一聚酰亚胺层与一各向异性导电层，该导电层与该各向异性导电层被该聚酰亚胺层分开；以及经由连接物将一芯片连接于该导电层之上。
附图说明
图1为本发明膜上芯片薄膜结构的一实施例的剖面示意图。
图2为本发明驱动集成电路基板的散热层的制造方法的第一实施例流程图。
图3为本发明驱动集成电路基板的散热层的制造方法的第二实施例流程图。
主要元件符号说明
100              膜上芯片薄膜结构
110              芯片
111              连接物
120              可挠性电路板
130              导电层
140              可挠性基膜
142              聚酰亚胺层
具体实施方式
请同时参阅图1，图1为本发明膜上芯片薄膜结构100的一实施例的剖面示意图。如图1所示，膜上芯片薄膜结构100包含有一芯片110以及一可挠性电路板120(亦即：基板)，可挠性电路板120具有一导电层130以及一可挠性基膜140，可挠性基膜140具有一聚酰亚胺(polyimide)层142以及一各向异性导电层(anisotropic conductive layer，ACL)144，且导电层130与各向异性导电层144被聚酰亚胺层142分开。导电层130形成于聚酰亚胺层142之上，且芯片110藉由结合连接物111(interconnector)与导电层130而设置于可挠性电路板120之上，其中连接物111可为凸块(bump)。以下将对膜上芯片薄膜结构100作进一步说明，然而，此仅是作为范例说明之用，并非为本发明的限制。
在膜上芯片薄膜结构100中，各向异性导电层144由聚酰亚胺与各向异性导电粒子(anisotropic conductive particles，ACP)所组成，且各向异性导电层144沿大致上垂直于聚酰亚胺层142与各向异性导电层144间的一平面的一方向导电，举例来说，各向异性导电层144沿图1中的Z方向导电。
请参阅图2，图2为本发明驱动集成电路基板的散热层的制造方法的第一实施例流程图，此方法可被整合至习知膜上芯片薄膜的铜电镀(Cu plating)的工艺中。该方法的步骤如下：
Step S200：提供一聚酰亚胺层。
Step S210：藉由一热压接合工艺(thermal-compressing process)压合(laminating)各向异性导电粒子于该聚酰亚胺层的一表面上以形成一各向异性导电层，以使该各向异性导电层沿大致上垂直于该聚酰亚胺层与该各向异性导电层间的一平面的一方向导电。
Step S220：于该聚酰亚胺层的另一表面上形成一导电层。
Step S230：于该导电层上形成一走线图样(pattern)并经由连接物将一芯片连接于该导电层之上。
请参阅图3，图3为本发明驱动集成电路基板的散热层的制造方法的第二实施例流程图，此方法可被整合至习知膜上芯片薄膜的聚酰亚胺压铸(PIcasting)的工艺中。该方法的步骤如下：
Step S300：提供一导电层。
Step S310：藉由一涂布工艺(coating process)于该导电层上形成一聚酰亚胺层。
Step S320：藉由一固化工艺(curing process)于该聚酰亚胺层的一表面上混合各向异性导电粒子以形成一原始可挠性基膜。
Step S330：施加一磁场于该原始可挠性基膜以形成一各向异性导电层。
Step S340：于该导电层上形成一走线图样并经由连接物将一芯片连接于该导电层之上。
由于所属领域中具有通常知识者应可轻易地了解图2与图3中所述的驱动集成电路基板的散热层的制造方法，因此为求说明书内容简洁起见，详细说明便在此省略。此外请注意，只要可大致上得到相同结果，则图2与图3所示的流程中的步骤并不一定依照图示的顺序来依序执行。
在本发明的膜上芯片薄膜结构100中，可挠性基膜140除了具有聚酰亚胺层142外，还具有各向异性导电层144，各向异性导电层144为热的良导体，因此有助于芯片110散热而改善散热效率。此外，由于只需更换习知工艺中可挠性基膜的原材便可制造出本发明的膜上芯片薄膜结构，因此本发明的膜上芯片薄膜结构的制造方法(亦即：驱动集成电路基板的散热层的制造方法)为非常有效率的制造方法。再者，各向异性导电层(亦即：散热层)的厚度可依据所需的可靠度与散热需求来设计，使得驱动集成电路基板的散热层的设计非常具有弹性。
以上所述仅为本发明的较佳实施例，凡依本发明权利要求所做的均等变化与修饰，皆应属本发明的涵盖范围。

Claims (7)

1.一种膜上芯片(chip on film，COF)结构，包含有：
可挠性电路板，具有：
可挠性基膜，具有聚酰亚胺层与各向异性导电层；以及
一导电层，设置于该可挠性基膜上，其中该导电层与该各向异性导电层被该聚酰亚胺层分开且分别位于所述聚酰亚胺层的两个表面上；以及
芯片，经由连接物连接于该导电层之上。
2.如权利要求1所述的该膜上芯片结构，其中该各向异性导电层沿垂直于该聚酰亚胺层与该各向异性导电层间的一平面的一方向导电。
3.如权利要求1所述的该膜上芯片结构，其中该各向异性导电层由聚酰亚胺与各向异性导电粒子所组成。
4.如权利要求1所述的该膜上芯片结构，其中该连接物为凸块。
5.一种驱动集成电路基板的散热层的制造方法，包含有：
提供具有可挠性基膜与导电层的可挠性电路板，其中该可挠性基膜具有聚酰亚胺层与各向异性导电层，该导电层与该各向异性导电层被该聚酰亚胺层分开且分别位于所述聚酰亚胺层的两个表面上；以及
经由连接物将一芯片连接于该导电层之上。
6.如权利要求5所述的制造方法，其中提供该可挠性电路板的步骤包含有：
提供该聚酰亚胺层；
藉由一热压接合工艺(thermal-compressing process)于该聚酰亚胺层的一表面上压合(laminating)各向异性导电粒子以形成该各向异性导电层，以使该各向异性导电层沿垂直于该聚酰亚胺层与该各向异性导电层间的一平面的一方向导电；以及
于该聚酰亚胺层的另一表面上形成该导电层。
7.如权利要求5所述的制造方法，其中提供该可挠性电路板的步骤包含有：
提供该导电层；
于该导电层上形成该聚酰亚胺层；以及
于该聚酰亚胺层的一表面上混合各向异性导电粒子以形成一原始可挠性基膜；以及
施加一磁场于该原始可挠性基膜以形成该各向异性导电层。
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