CN101504629A - 闪速存储器控制器高速缓存架构 - Google Patents

闪速存储器控制器高速缓存架构 Download PDF

Info

Publication number
CN101504629A
CN101504629A CNA2009101260749A CN200910126074A CN101504629A CN 101504629 A CN101504629 A CN 101504629A CN A2009101260749 A CNA2009101260749 A CN A2009101260749A CN 200910126074 A CN200910126074 A CN 200910126074A CN 101504629 A CN101504629 A CN 101504629A
Authority
CN
China
Prior art keywords
data
sector
cache memory
memory
cache
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
CNA2009101260749A
Other languages
English (en)
Other versions
CN101504629B (zh
Inventor
凯文·M·康利
鲁文·埃尔哈米亚斯
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Delphi International Operations Luxembourg SARL
Original Assignee
SanDisk Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by SanDisk Corp filed Critical SanDisk Corp
Publication of CN101504629A publication Critical patent/CN101504629A/zh
Application granted granted Critical
Publication of CN101504629B publication Critical patent/CN101504629B/zh
Active legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Images

Classifications

    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C16/00—Erasable programmable read-only memories
    • G11C16/02—Erasable programmable read-only memories electrically programmable
    • G11C16/06—Auxiliary circuits, e.g. for writing into memory
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00—Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02—Addressing or allocation; Relocation
    • G06F12/08—Addressing or allocation; Relocation in hierarchically structured memory systems, e.g. virtual memory systems
    • G06F12/0802—Addressing of a memory level in which the access to the desired data or data block requires associative addressing means, e.g. caches
    • G06F12/0862—Addressing of a memory level in which the access to the desired data or data block requires associative addressing means, e.g. caches with prefetch
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00—Accessing, addressing or allocating within memory systems or architectures
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00—Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02—Addressing or allocation; Relocation
    • G06F12/08—Addressing or allocation; Relocation in hierarchically structured memory systems, e.g. virtual memory systems
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00—Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02—Addressing or allocation; Relocation
    • G06F12/08—Addressing or allocation; Relocation in hierarchically structured memory systems, e.g. virtual memory systems
    • G06F12/0802—Addressing of a memory level in which the access to the desired data or data block requires associative addressing means, e.g. caches
    • G06F12/0866—Addressing of a memory level in which the access to the desired data or data block requires associative addressing means, e.g. caches for peripheral storage systems, e.g. disk cache
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00—Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02—Addressing or allocation; Relocation
    • G06F12/08—Addressing or allocation; Relocation in hierarchically structured memory systems, e.g. virtual memory systems
    • G06F12/0802—Addressing of a memory level in which the access to the desired data or data block requires associative addressing means, e.g. caches
    • G06F12/0804—Addressing of a memory level in which the access to the desired data or data block requires associative addressing means, e.g. caches with main memory updating
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F2212/00—Indexing scheme relating to accessing, addressing or allocation within memory systems or architectures
    • G06F2212/10—Providing a specific technical effect
    • G06F2212/1016—Performance improvement
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F2212/00—Indexing scheme relating to accessing, addressing or allocation within memory systems or architectures
    • G06F2212/20—Employing a main memory using a specific memory technology
    • G06F2212/202—Non-volatile memory
    • G06F2212/2022—Flash memory
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F2212/00—Indexing scheme relating to accessing, addressing or allocation within memory systems or architectures
    • G06F2212/21—Employing a record carrier using a specific recording technology
    • G06F2212/214—Solid state disk
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F2212/00—Indexing scheme relating to accessing, addressing or allocation within memory systems or architectures
    • G06F2212/21—Employing a record carrier using a specific recording technology
    • G06F2212/214—Solid state disk
    • G06F2212/2146—Solid state disk being detachable, e.g.. USB memory
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F2212/00—Indexing scheme relating to accessing, addressing or allocation within memory systems or architectures
    • G06F2212/28—Using a specific disk cache architecture
    • G06F2212/282—Partitioned cache
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F2212/00—Indexing scheme relating to accessing, addressing or allocation within memory systems or architectures
    • G06F2212/50—Control mechanisms for virtual memory, cache or TLB
    • G06F2212/502—Control mechanisms for virtual memory, cache or TLB using adaptive policy

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Memory System Of A Hierarchy Structure (AREA)
  • Techniques For Improving Reliability Of Storages (AREA)
  • Read Only Memory (AREA)

Abstract

一种置于一非易失性存储器与一主机之间的缓冲区高速缓冲存储器可分区成若干可使用不同政策运行的段。高速缓冲存储政策包括直写式、写入式及超前读取式。直写式及回读式政策可提高速度。超前读取式高速缓冲存储器则允许在更有效地使用所述缓冲区高速缓冲存储器与非易失性存储器之间的总线。一会话命令通过保证不掉电而使数据能够保存于易失性存储器中。

Description

闪速存储器控制器高速缓存架构
本案为申请号为200580014130.X的分案申请，原申请的申请日为2005.03.07，发明名称为“闪速存储器控制器高速缓存架构”。
技术领域
本发明涉及半导体电可擦可编程只读存储器(EEPROM)且具体而言涉及一种用于使用EEPROM或其它类似存储器的可移动式存储卡的控制器高速缓存系统。
背景技术
闪速EEPROM系统正应用于多种应用，特别是当封装于一以可移动方式与一主机系统相连接的封闭卡中时。某些市售的卡为CompactFlashTM(CF)卡、多媒体卡(MMC)、安全数字(SD)卡、智能媒体卡、个人信息(P-Tag)卡及存储棒卡。这些卡的一供应商为本申请案的受让者SanDisk公司。与这些卡一起使用的主机系统包括个人计算机、笔记本式计算机、手持式计算装置、照像机、声音再现装置等等。闪速EEPROM系统也用作嵌入主机系统内的大容量存储器。
这些非易失性存储系统包括一浮动栅极存储胞阵列及一系统控制器。所述控制器管理与主机系统的通信和所述存储胞阵列存储和检索用户数据的操作。所述存储胞一起分组成多个存储胞块，其中一存储胞块是可同时擦除的最小存储胞分组。在将数据写入一个或多个存储胞块内之前，先擦除那些存储胞块。用户数据通常以扇区为单位在主机与存储器阵列之间传输。一个扇区的用户数据可为任一便于处理的量，较佳小于存储块的容量，通常等于标准磁盘驱动器扇区的尺寸，即512个字节。在一商用架构中，所述存储系统块的尺寸可存储一个扇区的用户数据加上开销数据，所述开销数据包括诸如存储在所述块中的用户数据的错误修正码(ECC)、所述块的使用历史、缺陷等信息、以及所述存储胞块的其他物理信息。此类非易失性存储系统的各种实施方式阐述于受让给SanDisk公司的下列美国专利及待决申请案中：第5,172,338号、第5,602,987号、第5,315,541号、第5,200,959号、第5,270,979号、第5,428,621号、第5,663,901号、第5,532,962号、第5,430,859号及第5,712,180号、第6,222,762号及第6,151,248号美国专利，所有这些美国专利及待决申请案均以引用方式全文并入本文中。另一类非易失性存储系统利用一存储多个扇区的用户数据的更大存储胞块尺寸。
有两种通用存储胞阵列架构已付诸商业应用：NOR及NAND。在一典型的NOR阵列中，各存储胞连接于在列方向上延伸的相邻位线源极与漏极扩散区之间，且控制栅极连接至沿存储胞列延伸的字线。一存储胞包括位于所述源极与漏极之间的存储胞沟道区域的至少一部分上方的至少一个存储元件。所述存储元件上一所编程的电荷电平控制所述存储胞的操作特性，因而通过对所被寻址的存储胞施加适当的电压即可读取所述存储胞。
NAND阵列则利用由多于两个(例如16个或32个)存储胞构成的串联串与一个或多个位于各单独位线与一参考电位之间的选择晶体管连接在一起而构成存储胞列。各字线延伸跨过大量所述列内的存储胞。在编程期间，通过如下方式来读取及验证一列中的一单独存储胞：使所述串中的其余胞强导通，以使流经一个串的电流取决于所寻址的胞中所存储电荷的电平。
为提高在将用户数据编程至存储器阵列及自存储器阵列读取用户数据期间的并行性程度，所述阵列通常划分成若干子阵列，所述子阵列通常称作平面，其包含其自身的数据寄存器及其它电路来容许并行操作，从而可同时将数据扇区编程至若干或所有平面中的每一平面，或同时自若干或所有平面中的每一平面读取数据扇区。单个集成电路上的阵列可在实体上划分为多个平面，或每一平面可由单独的一个或多个集成电路芯片构成。
有一种存储胞阵列架构可由一行或两行位于一胞子阵列或其他胞单元内并共享一共用擦除栅极的存储胞方便地形成一个块。虽然当前最常见的是通过只界定两个所编程的阈值电平而在每一浮动栅极胞中存储一位数据，但趋势是通过建立多于两个浮动栅极晶体管阈值范围而在每一胞中存储多于一位数据。当前具备一种在一浮动栅极中存储两位数据(四个阈值电平范围或状态)的存储系统。当然，随着每一胞中所存储的位数的上升，存储一扇区的数据所需的存储胞的数量下降。该趋势与由胞结构和通用半导体处理的改进所促成的阵列的按比例缩放相结合，使在一排胞的一分段部分中形成一存储胞块变得切实可行。所述块结构也可形成为使人们能够选择使每一存储胞以两种状态(每个胞一个数据位)或以某个倍数(例如四种状态(每胞两个数据位))来操作。
因为将数据编程到浮动栅极存储胞中可能需大量时间，所以通常同时编程一排中的大量存储胞。但此种并行性的增强会增大功率需求及毗邻胞的电荷的潜在干扰或胞之间的交互作用。SanDisk公司的第5,890,192号美国专利—其全文并入本文中—阐述一种通过将多个数据程序块同时编程至位于不同的工作存储胞单元(子阵列)中的不同胞块内来使这些影响最小化的系统。
为进一步有效地管理存储器，可将各个块连接在一起形成虚拟块或元块。换句话说，将每一元块界定为包括每一平面中的一个块。元块的使用阐述于第WO 02/058074号国际专利申请案中，该申请案全文并入本文中。所述元块通过一主机逻辑块地址标识为一编程及读取数据的目的地。同样地，一个元块中的所有块均一同擦除。以如此大的块及/或元块的存储系统中的控制器执行多种功能，包括在自主机接收到的逻辑块地址(LBA)与存储胞阵列内的物理块编号(PBN)之间实施转换。所述块内的各个页通常通过所述块地址内的偏移量来识别。元页为元块中数据编程单位。一个元页由所述元块中每一个块中的一个页构成。
由于一扇区(512字节)与一擦除块或元块(有时多于128扇区)的大小之间存在差别，因此有时必需从一擦除块或元块拷贝到另一擦除块或元块。此种操作称作无用单元收集。无用单元收集操作会降低存储系统的写入性能。例如，当元块中的一些扇区得到更新，而所述元块中的其它扇区未得到更新时，得到更新的扇区可写入至一新的元块。而未得到更新的扇区可作为无用单元收集的一部分立即或在稍后某一时刻拷贝到所述新的元块。
在一些存储系统中，物理存储胞也被分组成两个或两个以上的区段。一个区段可为物理存储器或存储系统中的任一分区子集，其中映射有一规定的逻辑块地址范围。例如，一能够存储64兆字节的数据的存储系统可分区成四个分别存储16兆字节的数据的区段。然后，所述逻辑块地址范围也划分成四个分组，分别为这四个区段中的每一个的物理块指配一个分组。在一典型的实施方式中，对逻辑块地址加以约束，以使每一逻辑块地址的数据决不会写入到其中映射有所述逻辑块地址的单个物理区段之外。在一划分成平面(子阵列)的存储胞阵列—这些平面(子阵列)分别具有其自身的寻址、编程及读取电路—中，每一区段较佳包括来自多个平面的块，来自每一平面的块数通常相同。区段主要用于简化地址管理(例如逻辑至物理的转换)，从而减小转换表、减少保存这些表所需的RAM存储器并加快对当前现用存储器区域进行寻址的存取时间，但因其限制性而无法实现最佳的耗损均衡。
一存储器阵列通常具有连接至所述阵列以自所述存储器阵列读取数据及向所述存储器阵列写入数据的电路。作为此电路的一部分，一数据高速缓冲存储器可连接至所述存储器阵列。一数据高速缓冲存储器可只是一排可用于传送来往于所述存储器阵列的数据的寄存器。一数据高速缓冲存储器可保存多达所述存储器阵列的一排的数据。通常，数据高速缓冲存储器与所述存储器阵列形成于同一芯片上。
一控制器可具有若干组件，包括一中央处理单元(CPU)、一缓冲区高速缓冲存储器(缓冲区RAM)及一CPU RAM。缓冲区RAM及CPU RAM二者均可为SRAM存储器。这些组件可位于同一芯片上或分别位于单独的芯片上。CPU为一微处理器，其运行软件(固件)来执行包括传送来往于所述存储器阵列的数据在内的操作。所述缓冲区高速缓冲存储器可用于在对所述存储器阵列进行写入前或在将数据发送至主机前保存数据。因此，所述缓冲区高速缓冲存储器为一可同时服务于闪速存储器及主机操作的双重存取存储器。CPU RAM可用于将CPU所需的数据(例如指令或数据地址)存储于所述缓冲区高速缓冲存储器中或存储于所述存储器阵列中。在第5,297,148号美国专利—其全文并入本文中—中所示的一实例中，一缓冲区高速缓冲存储器可用作一写入高速缓冲存储器以减少对一用作非易失性存储器的闪速EEPROM的耗损。
图1显示一置于一主机与一可移动式存储卡中的一非易失性存储器(NVM)之间的缓冲区高速缓冲存储器。所述缓冲区高速缓冲存储器通过一主机总线连接至所述主机。所述缓冲区高速缓冲存储器通过一NVM总线连接至所述NVM。所述主机总线的带宽大于所述NVM总线的带宽，因而所述NVM总线成为在主机与NVM之间传送数据的瓶颈。而且，NVM内的编程也可能成为瓶颈，尤其是在主机写入单个扇区的数据时。在一单扇区写入后，控制器在自主机接收另一扇区前等待NVM完成所述写入操作。在并行性允许处理更大数量的扇区时，涉及较小数量扇区的写入或读取操作可能效率低下。当一主机执行多个线程时，会产生可由一存储卡控制器依序处理的多个数据流。
因此，需要一种能提高涉及到一NVM中较少量数据的读取及写入操作的效率的存储控制器。
发明内容
一存储控制器包括一缓冲区高速缓冲存储器，所述缓冲区高速缓冲存储器可分区成若干个段从而形成一多段式高速缓冲存储器。不同的段可具有不同的政策以允许同时使用所述缓冲区高速缓冲存储器执行若干单独的操作。段的尺寸可随使用所述段的操作而异。
可在一单段式高速缓冲存储器或一多段式高速缓冲存储器中采用不同的政策。政策包括用于当实施读取时存储附加数据的超前读取(或预取)式高速缓冲存储器。所述附加数据被标识为所述主机有可能在下一命令中请求的数据。所述附加数据可只是所述存储器阵列中的按顺序的下一数据。一种直写式高速缓冲存储政策将数据存储于缓冲区高速缓冲存储器中并随后将所述数据不加修改地写入至所述存储器阵列。一回写式高速缓冲存储政策则将数据存储于缓冲区高速缓冲存储器中并可对高速缓冲存储器中的所述数据加以修改而不将所述数据写入至所述存储器阵列。另外，一CPU可将数据存储于一高速缓冲存储器中，其中所述数据为所述CPU所需。此可包括通常将存储于CPU RAM中的数据。
缓冲区高速缓冲存储器通常为一非易失性存储器，因此如果所述存储系统掉电，则仅存储于缓冲区高速缓冲存储器中的数据可能会丢失。对于可移动式存储卡而言，掉电是一尤其需要关注的问题。某些操作(包括高速缓存操作、无用单元收集及地址转换信息更新)可能只将数据存储于易失性存储器中。由主机所提供的电源保证可使此种操作能够作为后台操作执行。主机可向存储卡发送会话命令来作为在一时间周期内的电源保证。
附图说明
图1显示一现有技术存储卡；
图2显示一具有一高速缓冲存储器的存储卡，在所述高速缓冲存储器中可实施本发明的各个方面；
图3显示一具有一分区的缓冲区高速缓冲存储器的存储卡；
图4(包括图4A-D)显示超前读取式高速缓冲存储器的一实施方式；
图5显示一超前读取实施方式的一主机命令处理过程；
图6(包括图6A及B)显示一超前读取实施方式的一闪速存储器存取管理过程；
图7显示一具有两个高速缓冲存储单元的缓冲区高速缓冲存储器及一具有一与所述高速缓冲存储单元相同尺寸的元页的闪速存储器的一实例；
图8A显示超前读取式高速缓冲存储器操作的一实例，其中数据作为一高速缓冲存取器命中的结果自缓冲区高速缓冲存储器发送至一主机；
图8B显示超前读取式高速缓冲存储器操作的另一实例，其中数据作为一高速缓冲存储器命中的结果自缓冲区高速缓冲存储器发送至一主机；
图8C显示超前读取式高速缓冲存储器操作的一实例，其中数据作为一局部高速缓冲存取器命中的结果自缓冲区高速缓冲存储器发送至一主机；
图9显示一使用缓冲区高速缓冲存储器作为一写入式高速缓冲存储器的实例；
图10显示一直写式高速缓冲存储器的操作的实例；
图11显示一用以将数据以管线方式自主机传输至缓冲区高速缓冲存储器及自缓冲区高速缓冲存储器传输至NVM的实例；
图12为一回写式高速缓冲存储器的操作的流程图。
具体实施方式
图2显示一具有一缓冲区高速缓冲存储器212的存储卡210。数据经由缓冲区高速缓冲存储器在一主机214与一NVM之间传送。NVM 220可为一闪速EEPROM或用于存储数据的其它类似存储器。存储卡210具有一主机接口222以使存储卡210能够以可移动方式连接至一主机系统，例如照像机、PC或电话机。存储卡210具有一位于缓冲区高速缓冲存储器212与NVM 220之间的NVM接口224。NVM接口224包括有利于在缓冲区高速缓冲存储器212与NVM 220之间进行数据交换的电路。一中央处理单元(CPU)230控制存储卡210内的数据操作。CPU 230中的软件响应于由主机214发送的命令来实施操作。例如，如果主机214请求具有一特定逻辑地址范围的数据，则CPU 230确定NVM 220中的数据位置并执行必要的步骤来检索所述数据及将所述数据发送至主机214。一CPU RAM 232(例如一静态随机存取存储器(SRAM))用来存储CPU 230所使用的数据。CPU RAM 232内的数据可由CPU 230快速存取。通常，存储于CPU RAM 232中的数据是由CPU 230频繁使用的数据。
分区式高速缓冲存储器
图3显示一存储卡310，存储卡310类似于存储卡210但具有一分区式缓冲区高速缓冲存储器312。一分区式存储器(例如图3中的分区式缓冲区高速缓冲存储器)具有若干个可分别根据不同政策操作的段。分区式缓冲区高速缓冲存储器312可通过CPU中的软件或通过硬件自动作业来加以分区。图3中所示的缓冲区高速缓冲存储器312分区成段1-4。每一段均可单独地加以使用且每一段均具有一不同的政策。此结果类似于具有四个并行的独立缓冲区高速缓冲存储器。
CPU RAM 332中保持有缓冲区高速缓冲存储器312的特性的一表333。对缓冲区高速缓冲存储器312中的每一段均保持一单独的表项。一表项具有若干个字段，这些字段给出所述段在所述缓冲区高速缓冲存储器中的物理位置、存储于所述段中的数据的逻辑地址及用于所述段的高速缓冲存储政策。段的大小可根据需要来加以修改。大小的变化将会改变分配给一特定段的物理地址范围。也可通过硬件来实现分区。然而，此种分区不容易得到修改且执行起来比软件分区更加困难。
一分区式缓冲区高速缓冲存储器(例如分区式缓冲区高速缓冲存储器312)的大小可大于一传统(非分区式)缓冲区高速缓冲存储器。一传统缓冲区高速缓冲存储器的大小通常取决于为达到某一性能阈值而要存储的最大数据量。在非高速缓冲存储架构中，高速缓冲存储器大小通常为8-16kB。在一分区式高速缓冲存储器中，可能需要具有单个段来充当一写入式高速缓冲存储器且因此缓冲区高速缓冲存储器的总大小将需要更大。可使用32kB或更大的缓冲区大小。
可在一缓冲区高速缓冲存储器或一缓冲区高速缓冲存储器的一段中执行的高速缓冲存储政策既包括读取式也包括及写入式高速缓冲存储政策。超前读取是读取式高速缓冲存储政策的一实例。直写式及回写式为写入式高速缓冲存储政策的实例。CPU也可使用缓冲区高速缓冲存储器的一段来保持由CPU使用的数据。此可包括通常存储于CPU RAM中的数据。存储于高速缓冲存储器中的CPU数据可包括程序变量、地址转换信息及拷贝缓冲区。存储于高速缓冲存储器中的CPU数据可为在某些现有技术实例中存储于CPU RAM中的数据。通过为CPU数据提供一缓冲区高速缓冲存储器的一段，可除CPU RAM以外还提供一可使用的替代位置来存储此数据。
超前读取
一缓冲区高速缓冲存储器可用作一读取式高速缓冲存储器以保存自NVM传送至一主机的数据。读取式高速缓冲存储器可为整个缓冲区高速缓冲存储器也可为所述缓冲区高速缓冲存储器(如果其被分区)的一段。一超前读取(RLA)式高速缓冲存储器使可能被一主机请求的数据能够在所述主机实际作出对所述数据的请求前存储于所述高速缓冲存储器中。例如，当一主机请求具有一特定逻辑地址范围的数据时，可将具有一与所请求数据相接序的逻辑地址范围的附加数据存储于一RLA高速缓冲存储器中。由于一主机经常地请求在逻辑上与最后所请求的数据相接序的数据，因此所存储的数据将受到请求的概率较高。也可根据主机数据使用量图案以其它方式选择RLA数据。如果所高速缓冲存储的数据随后受到请求，则其可在不对NVM进行存取的情况下直接自RLA高速缓冲存储器传送至主机。此传送快于自NVM进行的传送且不使用NVM总线。因此，在向主机传送数据的同时，NVM总线可用于其它操作。
图4显示一RLA高速缓冲存储器操作的一实例。图4A显示经由一主机总线425与一主机414进行通信的RLA高速缓冲存储器412。RLA高速缓冲存储器412还经由一NVM总线421与NVM 420进行通信。主机414请求由扇区0-2组成的数据部分。在此实例中，将所述数据存储于扇区中，扇区可通过一逻辑地址寻址。在其它实例中，可将数据存储于其它可寻址的数据单元中。RLA高速缓冲存储器412为空的，因此扇区0-2必须自NVM 420传送。图4B显示扇区3-7与扇区0-2一起自NVM 420传送至RLA高速缓冲存储器412。图4C显示扇区0-2自RLA高速缓冲存储器412传送至主机414。将扇区自RLA高速缓冲存储器414传送至主机414便可腾出RLA高速缓冲存储器412中的空间，从而可在那里再存储三个扇区。因此，自NVM 420传送扇区8-10以充装RLA高速缓冲存储器412。图4D显示一自主机414接收到的第二请求。此请求是对扇区3-8的请求。因此，第二请求的所有所请求扇区均存在于RLA高速缓冲存储器412中。因扇区3-8位于RLA高速缓冲存储器412中，故不需要存取NVM 420且可将扇区3-8自RLA高速缓冲存储器412直接传送至主机414。如果第二请求是对不处于RLA高速缓冲存储器412中的扇区的请求，则将必须自NVM 420检索所请求的扇区。
在一闪速存储器的一RLA高速缓冲存储器的一实施方式中，使用两个过程来管理所述RLA高速缓冲存储器。其中一个过程(图5所示的主机命令处理过程)处理主机命令。另一过程(图6所示的闪速存储器存取管理过程)则处理RLA操作。
图5、6A及6B显示三个用于实施RLA操作的相关过程。图5显示一负责将数据自RLA高速缓冲存储器(读取式高速缓冲存储器)传送至主机的主机命令处理过程(Host Command Handling Process)。当接收到一新的命令时，首先确定其是否为一读取命令510。如果不是，则执行所述命令512而不进行RLA操作。对于一读取命令而言，如果确定出一所请求的扇区不处于读取式高速缓冲存储器中514，则所述过程等待其自闪速存储器传送至读取式高速缓冲存储器516。一旦所请求的扇区处于读取式高速缓冲存储器中，便将其传送至主机518。如果要读取更多的扇区519，则所述过程针对后续扇区重复此顺序。因此，此过程不断地将所请求扇区自读取式高速缓冲存储器传送至主机，直至所有所请求扇区均得到传送为止。
图6A及6B显示负责将扇区自闪速存储器传送至读取式高速缓冲存储器的过程。图6A显示一主机中断过程(Host Interrupt Process)。一主机命令通常同时调用图5所示的主机命令处理过程及图6A所示的主机中断过程二者。图6A所示的主机中断过程的主要作用是在图6B所示的闪速存储器存取管理过程(Flash Access ManagementProcess)的命令队列中对中断主机命令进行排队。如果确定出所述主机命令不是一读取命令620，则将所述命令放入闪速存储器存取管理过程的命令队列中622。所述命令队列可保存一个或多个命令。如果所述主机命令为一读取命令，则实施一调整读取命令(Adjust Read Command)步骤624。调整读取命令步骤624根据在读取式高速缓冲存储器中是否存在某些或所有所请求的扇区来对用于存取闪速存储器的所述读取命令进行修改。当读取式高速缓冲存储器中不存在所请求扇区时，不对读取命令进行修改，因为必须自闪速存储器中读取所有扇区。因此，将未经修改的命令放入所述命令队列中。而当读取式高速缓冲存储器中存在某些所请求扇区时，则对所述读取命令加以修改以便只向闪速存储器请求不存在于读取式高速缓冲存储器中的扇区。因此，所述调整读取命令步骤624在将所述读取命令放入所述命令队列中之前从所述读取命令中减去早已存在于读取式高速缓冲存储器中的扇区。当出现一全部高速缓冲存储器命中(所有所请求扇区均存在于读取式高速缓冲存储器中)时626，即无需存取所述闪速存储器，因为可直接自所述读取式高速缓冲存储器读取所有扇区。在此种情况下，更新RLA操作的起始LBA以识别要存储于读取式高速缓冲存储器中的新的一组RLA扇区。
图6B显示一负责将数据扇区自闪速存储器传送至读取式高速缓冲存储器的闪速存储器存取管理过程。当自所述主机中断过程接收到一新的命令时，如果所述命令为一写入命令，则使所述读取式高速缓冲存储器无效630并执行所述命令632。而如果所述命令为一读取命令，则作为上文参照调整读取命令步骤624所述的步骤634的一部分来实施一调整读取命令。在闪速存储器存取管理过程中重复一调整读取命令，因为此时在读取式高速缓冲存储器中可能存在一当作为所述主机中断过程的一部分实施所述调整读取命令步骤624时尚不存在的扇区。例如，在步骤624与634之间的时间周期内可能会完成一扇区自闪速存储器至读取式高速缓冲存储器的传送。从闪速存储器中读取不存在于读取式高速缓冲存储器中的任何所请求扇区并设定一起始LBA以使始于所述LBA的未请求数据可在作为步骤634的一部分的所述过程流程的超前部分中装入读取式高速缓冲存储器中。如果数据高速缓冲存储器636中存在一RLA扇区且在缓冲区高速缓冲存储器中存在可用于所述RLA扇区的空间(“主机缓冲区可用”)638，则将所述扇区自数据高速缓冲存储器传送至读取式高速缓冲存储器640。如果在数据高速缓冲存储器中存储有另外的扇区且所述缓冲区高速缓冲存储器中的扇区数量小于预取长度N(要装入缓冲区高速缓冲存储器中的预定扇区数量)642，则重复所述循环。如果接收到一新的命令644，则停止所述循环以便可执行所述新命令。如果数据高速缓冲存储器中不再存在扇区642且在读取式高速缓冲存储器644中存在少于N个扇区，则实施一读取来将数据自所述闪速存储器阵列传送至数据高速缓冲存储器646并随后重新开始所述循环。当读取式高速缓冲存储器中的扇区数量达到预取数量N时644，所述过程等待读取式高速缓冲存储器中的扇区数量减少至少于N(在步骤648处)。如果将读取式高速缓冲存储器中的扇区传送至主机，即会出现此种情况。如果此时接收到一新的命令630，则执行所述新命令。当读取式高速缓冲存储器中的扇区数量降至N以下时648，将新的RLA扇区自数据高速缓冲存储器652(如果存在于此处)传送至读取式高速缓冲存储器，或自闪速存储器阵列传送至数据高速缓冲存储器646并随后传送至读取式高速缓冲存储器640。
在所述RLA操作达到一预定限值的情况下或因正在执行另一操作，进行中的RLA操作可停止。当一存储器阵列有某些区段需要创建新的地址转换表时，RLA操作可在需要创建此种新表的元块边界处停止。RLA操作可在需要进行一具有长的等待时间的操作时停止。例如，当出现一需要软件干预的ECC错误时，RLA操作可停止。包含所述错误的数据应排除出高速缓冲存储器之外。当接收到任何新命令时，可中断RLA操作以便可立即执行所述新命令。RLA操作也可在高速缓冲存储器中存在所期望的扇区数量时停止。
超前读取的实例
下列各实例显示在接收到一对数据的请求时如何使用一RLA高速缓冲存储器。这些实例是基于使用一包含8个数据扇区的元页的闪速存储器。一闪速存储器703具有一保存有8个扇区且等于闪速存储器703的一个元页中的数据量的数据高速缓冲存储器。一控制器705具有一16扇区的缓冲区高速缓冲存储器707及一等于16的预取长度。如图7中所示，缓冲区高速缓冲存储器707具有能够分别保存8个扇区的高速缓冲存储单元0及高速缓冲存储单元1。因此，一高速缓冲存储单元保存与NVM的一个元页相同的数据量。在任意时刻均指定一个高速缓冲存储单元作为当前的高速缓冲存储单元。在所示实例中使用下列术语。
读取NM：                  自LBAN开始读取M个连续扇区
主机至缓冲区传送：        自主机向主机缓冲区传送扇区
主机缓冲区已满：          其指示整个缓冲区空间已满且主机缓冲区无法再接
                          受任何数据
卡忙：                    其向主机指示装置(缓冲区或缓冲区的段)
                          正忙且不能自主机接收一命令或数据
缓冲区至闪速存储器传送：  自主机缓冲区向闪速存储器传送扇区
就绪/忙(R/B)：            闪速存储器就绪/忙
真正就绪/忙：             闪速存储器真正就绪/忙
图8A显示RLA高速缓冲存储器操作的一实例。所述高速缓冲存储器在此操作开始时为空的。当自一主机接收到一指示所述主机正在请求一逻辑地址为O的扇区的请求“读取01”时，高速缓冲存储器中没有数据。此视为是高速缓冲存储器未命中。将扇区0自闪速存储器传送至高速缓冲存储器(缓冲区)。然后，将扇区0传送至主机。扇区1-7也作为对一第一高速缓冲存储单元的第一读取操作的一部分自闪速存储器传送至缓冲区高速缓冲存储器。接下来，扇区8-15作为一第二读取操作传送至一第二高速缓冲存储单元。然后，扇区16自高速缓冲存储器传送。由于扇区0已传送至主机，因而具备可用来存储扇区16的空间。当将一扇区传送至高速缓冲存储器时，通常将一整个元页自闪速存储器阵列读取至数据高速缓冲存储器。一元页可包括扇区16-23。在扇区16传送至缓冲区高速缓冲存储器后，扇区17-23可仍保留在数据高速缓冲存储器中。因此，主机对单个扇区的请求会促成一RLA操作，所述RLA操作将16个扇区存储于缓冲区高速缓冲存储器中并将其它7个扇区留在数据高速缓冲存储器中。
当自主机接收到一指示主机正在请求起始逻辑地址为1的16个扇区(扇区1-16)的第二请求“读取1 16”时，这些扇区已存在于高速缓冲存储器中并可直接传送至主机。在将扇区1-16传送至主机的同时，可作为一第二RLA操作的一部分将其他扇区自闪速存储器传送至高速缓冲存储器。
图8B显示一类似于图8A的实例，只是并非接收一对16个扇区的第二请求，而是接收一系列分别对单个扇区的请求。当将这些扇区中的一个扇区传送至主机时，一扇区会自数据高速缓冲存储器传送至高速缓冲存储器以使所述高速缓冲存储器保持满载。在第二请求(“读取11”)之前，扇区16-23存储于数据高速缓冲存储器中。因此，在将扇区1-7自高速缓冲存储器传送至主机时，可将扇区17-23自数据高速缓冲存储器传送至高速缓冲存储器。由于扇区17-23存在于数据高速缓冲存储器中，因此无需在此操作期间存取闪速存储器阵列。
图8C显示一局部命中，其中在高速缓冲存储器中只操作由主机在第二请求中所请求的一个数据扇区。第一请求与图8A及8B中的相同。然而，第二请求(“读取163”)是针对起始地址为16的三个扇区。这三个扇区中仅有一个(扇区16)存储于高速缓冲存储器中。扇区16直接自高速缓冲存储器传送至主机。其它两个扇区(扇区17及18)则自数据高速缓冲存储器读取。存储于高速缓冲存储器中的扇区(扇区1-15)被丢弃且将扇区19-34作为新的RLA扇区自闪速存储器存储器传送。
直写式高速缓冲存储器
一直写式高速缓冲存储器可构建于一缓冲区高速缓冲存储器(例如图2中所示的缓冲区高速缓冲存储器或图3中所示的分区式缓冲区高速缓冲存储器)中。一直写式高速缓冲存储器自一主机接受数据并将所述数据不加以修改地发送至NVM而。一旦接收到所述数据，即刻将其发送至NVM，其限制条件为所述NVM准备好接收所述数据。例如，当一主机发送一包括多个数据扇区的数据流时，可立即将扇区写入至NVM。在所述NVM中，可将数据保存于数据高速缓冲存储器中并在需要时加以编程。通过向主机回送一指示所述数据被写入至NVM的信号，当实际上其不在NVM中而在直写式高速缓冲存储器中时，可缩短用于存储数据的视在时间。此使主机能够更快地发送后续数据。主机可发送更多的数据而无需等待将前面的数据编程到NVM中。一存储卡可在将数据的一第一部分自直写式高速缓冲存储器传送至NVM的同时将数据的一第二部分自一主机传送至直写式高速缓冲存储器中。直写式高速缓冲存储器可允许对NVM进行更有效的编程。可将数据扇区存储于直写式高速缓冲存储器中，直至主机已传送足够的数据从而允许使用NVM阵列的最大并行性来对一整个元页进行编程为止。此可因并行性增加而允许更快地进行编程并可通过减少或避免在编程后所需的任何无用单元收集来进一步提高性能。
有各种事件可触发自直写式高速缓冲存储器向NVM的数据编程。可在直写式高速缓冲存储器中存在足以使用NVM的最大并行性的数据时对所述数据进行编程。对于一以元块形式存储数据的NVM而言，此将为一相当于一个元页的数据量。编程也可通过接收到一不接序早已存储于高速缓冲存储器中的扇区的扇区来触发。如果一扇区与所存储扇区之间的间隙小于某一预定量，则尽管存在该间隙，也仍将所述扇区视为接续的。某些主机命令可触发直写式高速缓冲存储器中的数据编程。在使用CompactFlashTM(CF)标准的存储卡中，触发直写式高速缓冲存储器中的数据编程的命令包括Read Sectors(读取扇区)、Flush Cache(将高速缓冲存储器清仓)及Set Feature(设定特征)(如果用于停用写入式高速缓冲存储器)。编程也可在一预定时间后触发。如果高速缓冲存储器的内容在所述预定时间中未提交至NVM，则编程自动进行。通常，所述预定时间将处于一1毫秒至500毫秒的范围内。
图9显示一其中进行单扇区写入且一NVM 909具有一八扇区元页的实例。八扇区(扇区0-7)可在写入至NVM 909前存储于直写式高速缓冲存储器中。此可快于分别将所述八个扇区存储于NVM中。此时并不是等待将扇区0编程至NVM，而是发送一信号来指示对扇区0进行编程且主机将扇区1发送至存储卡。此操作重复进行，直至扇区0-7得到存储为止，此时所有八个扇区均得到并行编程。扇区0-7自写入式高速缓冲存储单元0传送至数据高速缓冲存储器并随后并行编程至存储器阵列中的元页X。可将扇区分别传送至数据高速缓冲存储器并随后并行编程至所述存储器阵列。
与将扇区并行编程至图9中所示的闪速存储器(NVM)相比，某些现有技术系统只允许将单个扇区编程至一其中单独接收所述单扇区的多扇区页面中。通过向NVM进行单扇区编程，每一扇区最初可在阵列中占用一个元页的空间。因此，每一单扇区写入均在存储器阵列中留下足以存储七个数据扇区的无用空间。然后，这些扇区可作为无用单元收集的一部分合并成单个元页以恢复所述无用空间。然而，无用单元收集操作需要占用时间及系统资源，因此需要使对此种操作的需要最小化。
图10显示一系列单扇区写入，随后自一主机接收读取命令。各个扇区首先发送至直写式高速缓冲存储器。当接收到扇区7时，立即将其编程至所述NVM。当对扇区7进行编程时，自主机接收扇区8-16。在对扇区7进行编程后，将扇区8-15编程至所述存储器阵列。扇区8-15形成所述存储器阵列的一个元页。扇区16保持在直写式高速缓冲存储器中。接下来，接收一读取命令“读取71”。在将扇区写入至所述存储器阵列后，执行所述读取命令。
图11显示主机至缓冲区高速缓冲存储器与缓冲区高速缓冲存储器至NVM数据传送的管线连接。只要所述NVM准备好接收数据，便可在NVM中对先前自所述主机接收到的扇区进行编程，同时将新的扇区存储于直写式高速缓冲存储器中。一数据扇区流由一主机发送至一缓冲区，如由流“A”所指示。分别将各扇区传送至NVM，如由扇区“B”所指示。在NVM中，以元页为单位将各扇区自数据高速缓冲存储器并行编程至存储器阵列。将各扇区自一主机传送至缓冲区高速缓冲存储器是与将其它扇区编程至存储器阵列并行地进行。然而，编程至存储器阵列所需要的时间长于自主机传送的时间。图11显示Tgap—因将数据编程至存储器阵列而引起的时间延迟。Tgap是将八个扇区自主机传送至缓冲区高速缓冲存储器所需的时间与将八个扇区自缓冲区高速缓冲存储器传送至存储器阵列所需的时间之间的时间差。在此实例中，编程需要300微秒而Tgap小于100微秒。因此，由于进行管线式传输，使因编程时间而引起的延迟从300微秒减至小于100微秒。
回写式高速缓冲存储器
可在一缓冲区高速缓冲存储器或一缓冲区高速缓冲存储器的一段中执行一回写政策。一回写式高速缓冲存储政策允许在来自一主机的数据处于高速缓冲存储器中时对所述数据进行修改而不将其写入至NVM。此会减少对NVM及NVM总线的使用。在满足将数据挤出高速缓冲存储器的条件之前，不将数据写入至NVM。当数据处于高速缓冲存储器中时，可在不对NVM进行一程序作业的情况下对所述数据进行一次或多次更新。此可节省时间并且减少所需的无用单元收集量。
图12显示一写入式高速缓冲存储器操作的流程图，所述写入式高速缓冲存储器操作使用一具有两个单元的写入式高速缓冲存储器，这两个单元分别保存相当于在存储器阵列的一个元页中所保存的数据。在任一时刻，均指定一个写入式高速缓冲存储单元作为当前写入式高速缓冲存储单元。当自一主机接收数据时，首先对所述当前写入式高速缓冲存储单元进行检查以确定其是否有效(“高速缓冲存储器有效”)1210。如果所述当前写入式高速缓冲存储单元包含尚未写入至NVM的数据，则其有效。如果所述当前写入式高速缓冲存储单元无效，则将所接收的数据写入至所述当前写入式高速缓冲存储单元中并拷贝至NVM中的数据高速缓冲存储器但不编程至存储器阵列1212。如果当前写入式高速缓冲存储单元有效，则将所接收的数据与高速缓冲存储器中的数据相比较以确定是否存在一“高速缓冲存储器命中”1214。当所接收的数据替换存储于高速缓冲存储器中的数据或与存储于高速缓冲存储器中的数据相接序时，即会出现一高速缓冲存储器命中。当出现一高速缓冲存储器命中时，所接收的数据会输入至所述当前写入式高速缓冲存储单元中1216。当出现一“高速缓冲存储器未命中”(所接收的数据不替换且不接序高速缓冲存储器中的数据)时，则将所述当前写入式高速缓冲存储单元提交至存储器阵列1218(如果尚未提交)并将所述新数据存储于一指定为当前写入式高速缓冲存储单元的写入式高速缓冲存储单元中1212。
当一扇区存储于所述当前写入式高速缓冲存储单元中时，如果所述扇区使所述当前写入式高速缓冲存储单元变满1220，则将所述当前写入式高速缓冲存储单元编程至闪速存储器1222。由此，所述缓冲区高速缓冲存储器便能够自由地自所述主机接收新的数据扇区。
会话命令
上述实施例中的某些实施例将未存储于存储卡中其它地方的数据保存于缓冲区高速缓冲存储器中。缓冲区高速缓冲存储器通常为一易失性存储器，因而存储于缓冲区高速缓冲存储器中的数据在掉电时会丢失。在一自一主机获得电源的可移动式存储卡中，由于可能会掉电，因而存储卡可能无法将数据保存于易失性存储器中。甚至在一组事务为一主机会话的一部分并为所述会话保持通电的情况下，存储卡也可能不知道链接了所述事务。一事务是由主机与一由主机命令启动的存储卡之间的交换组成，例如发出一读取某些扇区的命令且随后所述存储卡传送所述扇区。由于所述卡不知道链接了所述事务，因此其不能利用各事务之间的时间且由于可能会掉电，因而所述卡可能无法执行某些操作。此类操作可包括后台操作，例如高速缓冲存储操作、无用单元收集及地址转换信息更新。重要的是，未存储于NVM中的数据，包括正处于存储于NVM中的过程中的数据及一缓冲区高速缓冲存储器中或CPU RAM中的数据，不会因掉电而丢失。主机可保证为存储卡供电且因此能够对原本得不到保存的数据使用所述缓冲区高速缓冲存储器或其它易失性存储器。此种电源保证也可允许对操作进行更有效的排程，因为有相当大部分的时间可供用于实施操作，从而使对其进行的排程具有更大的灵活性。例如，可将在无用单元收集操作排程在其将对主机数据写入操作具有降低的影响时。可将操作排程为作为后台操作来执行且因此几乎不会或根本不会干扰其它操作。
在一实施例中，主机可发布一会话命令(例如“SESSION_START”)以指示多个卡事务为同一会话的一部分且将电源至少保持至所述会话结束为止，从而允许在所述事务期间及在各事务之间的时间中进行数据高速缓冲存储或其它后台操作。所述会话命令指示主机在所述会话期间提供电源保证。此使所述卡能够在所述会话期间使用易失性存储器来执行某一操作。所述会话可通过一会话终止命令(例如“SESSION_END”)终止。“SESSION END”命令可因电源不再得到保证而停用数据高速缓冲存储。一会话命令可识别所述会话中的事务的起始逻辑地址、一事务中的块的数量、数据传送速率及其它主机概要信息。存储卡可对使用易失性存储器的后台操作进行排程以使其在一会话中的各事务之间进行。
在另一实施例中，使用串流式命令来优化来往于存储卡的数据流传送。一来自主机的“CONFIGURE STREAM(配置流)”命令可启用所述存储卡中串流式数据的高速缓冲存储。“CONFIGURE STREAM”命令也可界定数据流的属性以便可优化对该特定流的高速缓冲存储。所述“CONFIGURE STREAM”命令可为一数据流指定一命令完成时间。其他串流式命令可包括一需要将高速缓冲存储器清仓至NVM的命令。一单独的命令可启用对所有数据(包括非串流式数据)的高速缓冲存储。甚至在未对所有数据启用高速缓冲存储时，串流式命令也可允许对串流式数据使用高速缓冲存储。
上述说明详细阐述了本发明的各具体实施例并使用具体实例阐述了本发明的各实施例。然而，本发明并不仅限于所揭示的实施例或所给定的实例。应了解，本发明有权在随附权利要求书的整个范围内受到保护。

Claims (5)

1、一种用以操作一连接至一主机的可移动式存储系统的方法，所述存储系统包括一非易失性、非旋转式存储阵列及一易失性存储器，所述方法包括：
自所述主机接收一第一命令；及
响应于所述第一命令在所述可移动式存储系统中启用至少一个后台操作，所述存储系统在所述第一命令之后的两个或多个事务的持续时间中对所述至少一个后台操作保持启用。
2、如权利要求1所述的方法，其中所述第一命令为一指示可将所述易失性存储器中的数据存储启用达一时间周期的会话命令。
3、如权利要求1所述的方法，其中所启用的所述后台操作包括将未存储于所述非易失性、非旋转式存储器阵列中的数据存储于所述易失性存储器中。
4、如权利要求1所述的方法，其中所述至少一个后台操作包括一无用单元收集操作，以更有效地将数据存储于所述非易失性存储器中。
5、如权利要求1所述的方法，其进一步包括接收一第二命令并在所述可移动式存储系统中禁用所述至少一个后台操作。
CN2009101260749A 2004-03-08 2005-03-07 闪速存储器控制器高速缓存架构 Active CN101504629B (zh)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US10/796,575 2004-03-08
US10/796,575 US7173863B2 (en) 2004-03-08 2004-03-08 Flash controller cache architecture

Related Parent Applications (1)

Application Number Title Priority Date Filing Date
CNB200580014130XA Division CN100483366C (zh) 2004-03-08 2005-03-07 闪速存储器控制器高速缓存架构

Publications (2)

Publication Number Publication Date
CN101504629A true CN101504629A (zh) 2009-08-12
CN101504629B CN101504629B (zh) 2012-04-11

Family

ID=34912587

Family Applications (2)

Application Number Title Priority Date Filing Date
CN2009101260749A Active CN101504629B (zh) 2004-03-08 2005-03-07 闪速存储器控制器高速缓存架构
CNB200580014130XA Active CN100483366C (zh) 2004-03-08 2005-03-07 闪速存储器控制器高速缓存架构

Family Applications After (1)

Application Number Title Priority Date Filing Date
CNB200580014130XA Active CN100483366C (zh) 2004-03-08 2005-03-07 闪速存储器控制器高速缓存架构

Country Status (7)

Country Link
US (3) US7173863B2 (zh)
EP (2) EP2264605B1 (zh)
JP (1) JP5192228B2 (zh)
KR (1) KR101204680B1 (zh)
CN (2) CN101504629B (zh)
TW (1) TWI267862B (zh)
WO (1) WO2005088456A2 (zh)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN110113238A (zh) * 2013-03-15 2019-08-09 波音公司 通过易失性影子存储器访问非易失性存储器
CN118672666A (zh) * 2024-08-23 2024-09-20 成都赛力斯科技有限公司 可执行文件生成方法、装置、计算机设备和可读存储介质

Families Citing this family (279)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6347051B2 (en) * 1991-11-26 2002-02-12 Hitachi, Ltd. Storage device employing a flash memory
US20080320209A1 (en) * 2000-01-06 2008-12-25 Super Talent Electronics, Inc. High Performance and Endurance Non-volatile Memory Based Storage Systems
KR100614639B1 (ko) * 2003-07-24 2006-08-22 삼성전자주식회사 쓰기 방지 가능한 버퍼 메모리를 갖는 메모리 장치 및그것을 포함하는 정보 처리 시스템
US8112574B2 (en) * 2004-02-26 2012-02-07 Super Talent Electronics, Inc. Swappable sets of partial-mapping tables in a flash-memory system with a command queue for combining flash writes
US7173863B2 (en) * 2004-03-08 2007-02-06 Sandisk Corporation Flash controller cache architecture
TWI289304B (en) * 2004-02-17 2007-11-01 Hon Hai Prec Ind Co Ltd Data structure design system and method for prolonging useful life of FRAM
KR100541642B1 (ko) * 2004-03-11 2006-01-10 삼성전자주식회사 플래시 메모리의 데이터 관리 장치 및 방법
JP4817836B2 (ja) 2004-12-27 2011-11-16 株式会社東芝 カードおよびホスト機器
US20060236033A1 (en) * 2005-04-18 2006-10-19 Dell Products L.P. System and method for the implementation of an adaptive cache policy in a storage controller
US8516211B2 (en) * 2005-06-17 2013-08-20 Flexera Software Llc Secure storage management system and method
US10013371B2 (en) 2005-06-24 2018-07-03 Google Llc Configurable memory circuit system and method
US20080082763A1 (en) 2006-10-02 2008-04-03 Metaram, Inc. Apparatus and method for power management of memory circuits by a system or component thereof
US8060774B2 (en) 2005-06-24 2011-11-15 Google Inc. Memory systems and memory modules
US9542352B2 (en) 2006-02-09 2017-01-10 Google Inc. System and method for reducing command scheduling constraints of memory circuits
US8111566B1 (en) 2007-11-16 2012-02-07 Google, Inc. Optimal channel design for memory devices for providing a high-speed memory interface
US8397013B1 (en) 2006-10-05 2013-03-12 Google Inc. Hybrid memory module
US20070014168A1 (en) * 2005-06-24 2007-01-18 Rajan Suresh N Method and circuit for configuring memory core integrated circuit dies with memory interface integrated circuit dies
US8796830B1 (en) 2006-09-01 2014-08-05 Google Inc. Stackable low-profile lead frame package
US20080028136A1 (en) 2006-07-31 2008-01-31 Schakel Keith R Method and apparatus for refresh management of memory modules
US8386722B1 (en) 2008-06-23 2013-02-26 Google Inc. Stacked DIMM memory interface
US9171585B2 (en) 2005-06-24 2015-10-27 Google Inc. Configurable memory circuit system and method
US7590796B2 (en) * 2006-07-31 2009-09-15 Metaram, Inc. System and method for power management in memory systems
US8619452B2 (en) * 2005-09-02 2013-12-31 Google Inc. Methods and apparatus of stacking DRAMs
US7386656B2 (en) * 2006-07-31 2008-06-10 Metaram, Inc. Interface circuit system and method for performing power management operations in conjunction with only a portion of a memory circuit
US8081474B1 (en) 2007-12-18 2011-12-20 Google Inc. Embossed heat spreader
US8041881B2 (en) * 2006-07-31 2011-10-18 Google Inc. Memory device with emulated characteristics
US8130560B1 (en) 2006-11-13 2012-03-06 Google Inc. Multi-rank partial width memory modules
US9507739B2 (en) 2005-06-24 2016-11-29 Google Inc. Configurable memory circuit system and method
US8055833B2 (en) 2006-10-05 2011-11-08 Google Inc. System and method for increasing capacity, performance, and flexibility of flash storage
US8327104B2 (en) 2006-07-31 2012-12-04 Google Inc. Adjusting the timing of signals associated with a memory system
US7580312B2 (en) * 2006-07-31 2009-08-25 Metaram, Inc. Power saving system and method for use with a plurality of memory circuits
US8335894B1 (en) 2008-07-25 2012-12-18 Google Inc. Configurable memory system with interface circuit
US8438328B2 (en) 2008-02-21 2013-05-07 Google Inc. Emulation of abstracted DIMMs using abstracted DRAMs
US7392338B2 (en) * 2006-07-31 2008-06-24 Metaram, Inc. Interface circuit system and method for autonomously performing power management operations in conjunction with a plurality of memory circuits
US8090897B2 (en) 2006-07-31 2012-01-03 Google Inc. System and method for simulating an aspect of a memory circuit
US8359187B2 (en) 2005-06-24 2013-01-22 Google Inc. Simulating a different number of memory circuit devices
US8089795B2 (en) 2006-02-09 2012-01-03 Google Inc. Memory module with memory stack and interface with enhanced capabilities
US8244971B2 (en) 2006-07-31 2012-08-14 Google Inc. Memory circuit system and method
US8077535B2 (en) 2006-07-31 2011-12-13 Google Inc. Memory refresh apparatus and method
US7609567B2 (en) * 2005-06-24 2009-10-27 Metaram, Inc. System and method for simulating an aspect of a memory circuit
JP4856400B2 (ja) * 2005-07-06 2012-01-18 ルネサスエレクトロニクス株式会社 記憶装置及び情報処理端末
US7751242B2 (en) * 2005-08-30 2010-07-06 Micron Technology, Inc. NAND memory device and programming methods
KR100714873B1 (ko) * 2005-09-06 2007-05-07 삼성전자주식회사 비휘발성 메모리에서 데이터 갱신 방법 및 이를 위한 장치
JP4910360B2 (ja) * 2005-10-20 2012-04-04 ソニー株式会社 記憶装置、コンピュータシステム、およびデータ書き込み方法
CN100426230C (zh) * 2005-11-23 2008-10-15 鸿富锦精密工业（深圳）有限公司 一种嵌入式系统处理数据的方法
US20070119931A1 (en) * 2005-11-25 2007-05-31 C-Media Electronics Inc. Apparatus for reading/writing storage devices
JP4356686B2 (ja) * 2005-12-01 2009-11-04 ソニー株式会社 メモリ装置及びメモリ制御方法
US8275949B2 (en) * 2005-12-13 2012-09-25 International Business Machines Corporation System support storage and computer system
US20070150644A1 (en) * 2005-12-28 2007-06-28 Yosi Pinto System for writing non-volatile memories for increased endurance
US7245556B1 (en) * 2005-12-28 2007-07-17 Sandisk Corporation Methods for writing non-volatile memories for increased endurance
US9632929B2 (en) * 2006-02-09 2017-04-25 Google Inc. Translating an address associated with a command communicated between a system and memory circuits
EP2016494A4 (en) * 2006-02-14 2010-02-03 Atmel Corp DESCRIPTING AND SETTING FLASH SAVINGS
KR100703807B1 (ko) * 2006-02-17 2007-04-09 삼성전자주식회사 블록 방식의 메모리에서 데이터의 변경 유형에 따라 블록을관리하는 방법 및 장치
EP1850347A1 (en) * 2006-04-28 2007-10-31 Deutsche Thomson-Brandt Gmbh Method and device for writing to a flash memory
US7894269B2 (en) 2006-07-20 2011-02-22 Sandisk Corporation Nonvolatile memory and method for compensating during programming for perturbing charges of neighboring cells
US7885119B2 (en) 2006-07-20 2011-02-08 Sandisk Corporation Compensating for coupling during programming
US7724589B2 (en) 2006-07-31 2010-05-25 Google Inc. System and method for delaying a signal communicated from a system to at least one of a plurality of memory circuits
US7734861B2 (en) * 2006-09-08 2010-06-08 Sandisk Corporation Pseudo random and command driven bit compensation for the cycling effects in flash memory
US7606966B2 (en) 2006-09-08 2009-10-20 Sandisk Corporation Methods in a pseudo random and command driven bit compensation for the cycling effects in flash memory
US7885112B2 (en) * 2007-09-07 2011-02-08 Sandisk Corporation Nonvolatile memory and method for on-chip pseudo-randomization of data within a page and between pages
TWI463321B (zh) 2007-01-10 2014-12-01 Mobile Semiconductor Corp 用於改善外部計算裝置效能的調適性記憶體系統
US7660166B2 (en) * 2007-01-31 2010-02-09 Sandisk Il Ltd. Method of improving programming precision in flash memory
JP5032172B2 (ja) * 2007-03-28 2012-09-26 株式会社東芝 統合メモリ管理装置及び方法並びにデータ処理システム
US9396103B2 (en) * 2007-06-08 2016-07-19 Sandisk Technologies Llc Method and system for storage address re-mapping for a memory device
US20090006720A1 (en) * 2007-06-27 2009-01-01 Shai Traister Scheduling phased garbage collection and house keeping operations in a flash memory system
US8504784B2 (en) * 2007-06-27 2013-08-06 Sandisk Technologies Inc. Scheduling methods of phased garbage collection and housekeeping operations in a flash memory system
JP4963088B2 (ja) * 2007-07-13 2012-06-27 インターナショナル・ビジネス・マシーンズ・コーポレーション データをキャッシュする技術
KR101431205B1 (ko) * 2007-07-13 2014-08-18 삼성전자주식회사 캐시 메모리 장치 및 캐시 메모리 장치의 데이터 처리 방법
US8209479B2 (en) 2007-07-18 2012-06-26 Google Inc. Memory circuit system and method
KR20090024971A (ko) * 2007-09-05 2009-03-10 삼성전자주식회사 섹터의 집합을 이용한 캐시 운용 방법 및 캐시 장치
US8080874B1 (en) 2007-09-14 2011-12-20 Google Inc. Providing additional space between an integrated circuit and a circuit board for positioning a component therebetween
US7652929B2 (en) * 2007-09-17 2010-01-26 Sandisk Corporation Non-volatile memory and method for biasing adjacent word line for verify during programming
US7924628B2 (en) * 2007-11-14 2011-04-12 Spansion Israel Ltd Operation of a non-volatile memory array
US7945825B2 (en) * 2007-11-25 2011-05-17 Spansion Isreal, Ltd Recovery while programming non-volatile memory (NVM)
US9032154B2 (en) * 2007-12-13 2015-05-12 Sandisk Technologies Inc. Integration of secure data transfer applications for generic IO devices
US8443260B2 (en) 2007-12-27 2013-05-14 Sandisk Il Ltd. Error correction in copy back memory operations
US8275945B2 (en) 2008-02-05 2012-09-25 Spansion Llc Mitigation of flash memory latency and bandwidth limitations via a write activity log and buffer
US8332572B2 (en) * 2008-02-05 2012-12-11 Spansion Llc Wear leveling mechanism using a DRAM buffer
US8352671B2 (en) 2008-02-05 2013-01-08 Spansion Llc Partial allocate paging mechanism using a controller and a buffer
US8209463B2 (en) * 2008-02-05 2012-06-26 Spansion Llc Expansion slots for flash memory based random access memory subsystem
KR101067457B1 (ko) * 2008-03-01 2011-09-27 가부시끼가이샤 도시바 메모리 시스템
JP4643667B2 (ja) 2008-03-01 2011-03-02 株式会社東芝 メモリシステム
JP4745356B2 (ja) * 2008-03-01 2011-08-10 株式会社東芝 メモリシステム
US8706950B2 (en) 2008-03-01 2014-04-22 Kabushiki Kaisha Toshiba Memory system
JP4691122B2 (ja) 2008-03-01 2011-06-01 株式会社東芝 メモリシステム
JP4691123B2 (ja) 2008-03-01 2011-06-01 株式会社東芝 メモリシステム
JP4498426B2 (ja) * 2008-03-01 2010-07-07 株式会社東芝 メモリシステム
JP4729062B2 (ja) 2008-03-07 2011-07-20 株式会社東芝 メモリシステム
US9594679B2 (en) * 2008-05-01 2017-03-14 Sandisk Il Ltd. Flash cache flushing method and system
US20100017650A1 (en) * 2008-07-19 2010-01-21 Nanostar Corporation, U.S.A Non-volatile memory data storage system with reliability management
TWI475378B (zh) * 2008-10-09 2015-03-01 Micron Technology Inc 耦合至一主機之儲存系統、與儲存系統中之nand記憶體介接之控制器及管理nand記憶體裝置堆疊之方法
JP5650116B2 (ja) 2008-10-09 2015-01-07 マイクロン テクノロジー， インク． 仮想化ｅｃｃ−ｎａｎｄ
JP2012511789A (ja) * 2008-12-09 2012-05-24 ラムバス・インコーポレーテッド 並行且つパイプライン化されたメモリ動作用の不揮発性メモリデバイス
JP2010157130A (ja) * 2008-12-27 2010-07-15 Toshiba Corp メモリシステム
JP5221332B2 (ja) * 2008-12-27 2013-06-26 株式会社東芝 メモリシステム
US8166258B2 (en) * 2009-07-24 2012-04-24 Lsi Corporation Skip operations for solid state disks
US8321639B2 (en) * 2009-12-30 2012-11-27 Lsi Corporation Command tracking for direct access block storage devices
US8352689B2 (en) * 2009-11-30 2013-01-08 Lsi Corporation Command tag checking in a multi-initiator media controller architecture
US8219776B2 (en) * 2009-09-23 2012-07-10 Lsi Corporation Logical-to-physical address translation for solid state disks
US8341338B2 (en) * 2009-05-06 2012-12-25 Samsung Electronics Co., Ltd. Data storage device and related method of operation
US8286004B2 (en) * 2009-10-09 2012-10-09 Lsi Corporation Saving encryption keys in one-time programmable memory
US8245112B2 (en) * 2009-06-04 2012-08-14 Lsi Corporation Flash memory organization
US8555141B2 (en) * 2009-06-04 2013-10-08 Lsi Corporation Flash memory organization
US8271737B2 (en) * 2009-05-27 2012-09-18 Spansion Llc Cache auto-flush in a solid state memory device
WO2010144624A1 (en) 2009-06-09 2010-12-16 Google Inc. Programming of dimm termination resistance values
JP2011008570A (ja) * 2009-06-26 2011-01-13 Buffalo Inc ストレージ装置、情報処理システム、およびコンピュータプログラム
TWI435215B (zh) * 2009-08-26 2014-04-21 Phison Electronics Corp 下達讀取指令與資料讀取方法、控制器與儲存系統
JP2011070365A (ja) 2009-09-25 2011-04-07 Toshiba Corp メモリシステム
US8082313B2 (en) * 2009-10-26 2011-12-20 International Business Machines Corporation Efficient utilization of read-ahead buffer by partitioning read-ahead buffer in correspondence with selectors
US8407403B2 (en) * 2009-12-07 2013-03-26 Microsoft Corporation Extending SSD lifetime using hybrid storage
US8473669B2 (en) * 2009-12-07 2013-06-25 Sandisk Technologies Inc. Method and system for concurrent background and foreground operations in a non-volatile memory array
US9514055B2 (en) * 2009-12-31 2016-12-06 Seagate Technology Llc Distributed media cache for data storage systems
US9785561B2 (en) * 2010-02-17 2017-10-10 International Business Machines Corporation Integrating a flash cache into large storage systems
US9959209B1 (en) 2010-03-23 2018-05-01 Western Digital Technologies, Inc. Data storage device adjusting command rate profile based on operating mode
JP4988008B2 (ja) 2010-05-13 2012-08-01 株式会社東芝 情報処理装置およびドライバ
JP4988007B2 (ja) 2010-05-13 2012-08-01 株式会社東芝 情報処理装置およびドライバ
USRE49818E1 (en) 2010-05-13 2024-01-30 Kioxia Corporation Information processing method in a multi-level hierarchical memory system
JP2012022475A (ja) * 2010-07-13 2012-02-02 Panasonic Corp データ処理装置、半導体装置および制御方法
JP5520747B2 (ja) * 2010-08-25 2014-06-11 株式会社日立製作所 キャッシュを搭載した情報装置及びコンピュータ読み取り可能な記憶媒体
US8452911B2 (en) 2010-09-30 2013-05-28 Sandisk Technologies Inc. Synchronized maintenance operations in a multi-bank storage system
US8271692B1 (en) 2010-10-01 2012-09-18 Western Digital Technologies, Inc. Throttled command completion time
CN102169464B (zh) * 2010-11-30 2013-01-30 北京握奇数据系统有限公司 一种用于非易失性存储器的缓存方法、装置及智能卡
US8966201B2 (en) 2010-12-10 2015-02-24 Sandisk Technologies Inc. Method and system for hijacking writes to a non-volatile memory
JP2012133416A (ja) * 2010-12-17 2012-07-12 Toshiba Corp メモリシステム
US8918595B2 (en) 2011-04-28 2014-12-23 Seagate Technology Llc Enforcing system intentions during memory scheduling
US8843693B2 (en) 2011-05-17 2014-09-23 SanDisk Technologies, Inc. Non-volatile memory and method with improved data scrambling
US10031850B2 (en) * 2011-06-07 2018-07-24 Sandisk Technologies Llc System and method to buffer data
US8904128B2 (en) * 2011-06-08 2014-12-02 Hewlett-Packard Development Company, L.P. Processing a request to restore deduplicated data
TWI459389B (zh) * 2011-06-09 2014-11-01 Winbond Electronics Corp 半導體記憶體裝置、記憶體裝置讀取程式以及方法
US9189405B2 (en) * 2011-08-03 2015-11-17 International Business Machines Corporation Placement of data in shards on a storage device
US8762627B2 (en) 2011-12-21 2014-06-24 Sandisk Technologies Inc. Memory logical defragmentation during garbage collection
US10025711B2 (en) * 2012-01-16 2018-07-17 Qualcomm Incorporated Hybrid write-through/write-back cache policy managers, and related systems and methods
CN103324441A (zh) * 2012-03-19 2013-09-25 联想(北京)有限公司 一种信息处理方法及电子设备
US9135192B2 (en) 2012-03-30 2015-09-15 Sandisk Technologies Inc. Memory system with command queue reordering
US9754648B2 (en) 2012-10-26 2017-09-05 Micron Technology, Inc. Apparatuses and methods for memory operations having variable latencies
US9098491B2 (en) * 2012-11-23 2015-08-04 Hong Kong Applied Science and Technology Research Institute Company Limited Method and system for performing data transfer with a flash storage medium
US8873284B2 (en) 2012-12-31 2014-10-28 Sandisk Technologies Inc. Method and system for program scheduling in a multi-layer memory
US9734050B2 (en) 2012-12-31 2017-08-15 Sandisk Technologies Llc Method and system for managing background operations in a multi-layer memory
US9465731B2 (en) 2012-12-31 2016-10-11 Sandisk Technologies Llc Multi-layer non-volatile memory system having multiple partitions in a layer
US9348746B2 (en) 2012-12-31 2016-05-24 Sandisk Technologies Method and system for managing block reclaim operations in a multi-layer memory
US9336133B2 (en) 2012-12-31 2016-05-10 Sandisk Technologies Inc. Method and system for managing program cycles including maintenance programming operations in a multi-layer memory
US9223693B2 (en) 2012-12-31 2015-12-29 Sandisk Technologies Inc. Memory system having an unequal number of memory die on different control channels
US9734911B2 (en) 2012-12-31 2017-08-15 Sandisk Technologies Llc Method and system for asynchronous die operations in a non-volatile memory
US20140201442A1 (en) * 2013-01-15 2014-07-17 Lsi Corporation Cache based storage controller
US9652376B2 (en) * 2013-01-28 2017-05-16 Radian Memory Systems, Inc. Cooperative flash memory control
US9734097B2 (en) 2013-03-15 2017-08-15 Micron Technology, Inc. Apparatuses and methods for variable latency memory operations
CN104937565B (zh) 2013-03-28 2017-11-17 慧与发展有限责任合伙企业 从第一节点到第二节点的地址范围传送
EP2979187B1 (en) * 2013-03-28 2019-07-31 Hewlett-Packard Enterprise Development LP Data flush of group table
KR20140142759A (ko) * 2013-05-31 2014-12-15 에스케이하이닉스 주식회사 비휘발성 메모리 장치 및 그의 동작방법과 비휘발성 메모리 장치를 포함하는 시스템
WO2014205638A1 (zh) * 2013-06-25 2014-12-31 华为技术有限公司 一种数据包传输方法及设备
US8929146B1 (en) * 2013-07-26 2015-01-06 Avalanche Technology, Inc. Controller management of memory array of storage device using magnetic random access memory (MRAM)
US9563565B2 (en) 2013-08-14 2017-02-07 Micron Technology, Inc. Apparatuses and methods for providing data from a buffer
US9727493B2 (en) 2013-08-14 2017-08-08 Micron Technology, Inc. Apparatuses and methods for providing data to a configurable storage area
TWI514394B (zh) * 2013-08-27 2015-12-21 Toshiba Kk Semiconductor memory device and its control method
US10140212B2 (en) 2013-09-30 2018-11-27 Vmware, Inc. Consistent and efficient mirroring of nonvolatile memory state in virtualized environments by remote mirroring memory addresses of nonvolatile memory to which cached lines of the nonvolatile memory have been flushed
US10223026B2 (en) * 2013-09-30 2019-03-05 Vmware, Inc. Consistent and efficient mirroring of nonvolatile memory state in virtualized environments where dirty bit of page table entries in non-volatile memory are not cleared until pages in non-volatile memory are remotely mirrored
US9558124B2 (en) 2013-11-08 2017-01-31 Seagate Technology Llc Data storage system with passive partitioning in a secondary memory
KR102147993B1 (ko) 2013-11-14 2020-08-25 삼성전자주식회사 불휘발성 메모리 시스템 및 그것의 동작 방법
KR20150061393A (ko) 2013-11-27 2015-06-04 삼성전자주식회사 메모리 장치로부터 읽은 데이터를 고속으로 전송하는 메모리 컨트롤러 및 그것의 데이터 전송 방법.
KR20150068747A (ko) 2013-12-12 2015-06-22 삼성전자주식회사 비휘발성 메모리 시스템, 이를 포함하는 모바일 장치 및 비휘발성 메모리 시스템의 동작방법
KR102181210B1 (ko) 2014-01-10 2020-11-23 삼성전자주식회사 저장 장치의 데이터 처리 방법 및 저장 장치
US10031869B1 (en) 2014-03-28 2018-07-24 Adesto Technologies Corporation Cached memory structure and operation
KR102198855B1 (ko) * 2014-04-24 2021-01-05 삼성전자 주식회사 메모리 시스템 및 상기 메모리 시스템의 동작 방법
KR102106261B1 (ko) 2014-06-17 2020-05-04 삼성전자주식회사 메모리 컨트롤러의 작동 방법과 이를 포함하는 장치들의 작동 방법들
WO2015196378A1 (zh) 2014-06-25 2015-12-30 华为技术有限公司 读写闪存中数据的方法、装置及用户设备
US9740426B2 (en) * 2014-09-19 2017-08-22 Lenovo (Singapore) Pte. Ltd. Drive array policy control
WO2016086342A1 (zh) * 2014-12-01 2016-06-09 华为技术有限公司 数据写入的方法、装置、设备和存储系统
US10372602B2 (en) 2015-01-30 2019-08-06 Hewlett Packard Enterprise Development Lp Ordering updates for nonvolatile memory accesses
US9658959B2 (en) * 2015-02-20 2017-05-23 PernixData, Inc. Cache resource manager
CN105988735B (zh) 2015-03-06 2019-03-19 华为技术有限公司 数据写入控制装置及方法
US9875051B2 (en) * 2015-04-24 2018-01-23 Toshiba Memory Corporation Memory system that controls power state of buffer memory
US9823852B2 (en) * 2015-05-01 2017-11-21 Toshiba Memory Corporation Memory system with nonvolatile memory
US10025532B2 (en) 2015-09-11 2018-07-17 Sandisk Technologies Llc Preserving read look ahead data in auxiliary latches
US10642513B2 (en) 2015-09-11 2020-05-05 Sandisk Technologies Llc Partially de-centralized latch management architectures for storage devices
US10042553B2 (en) 2015-10-30 2018-08-07 Sandisk Technologies Llc Method and system for programming a multi-layer non-volatile memory having a single fold data path
US9778855B2 (en) 2015-10-30 2017-10-03 Sandisk Technologies Llc System and method for precision interleaving of data writes in a non-volatile memory
US10133490B2 (en) 2015-10-30 2018-11-20 Sandisk Technologies Llc System and method for managing extended maintenance scheduling in a non-volatile memory
US10120613B2 (en) 2015-10-30 2018-11-06 Sandisk Technologies Llc System and method for rescheduling host and maintenance operations in a non-volatile memory
KR102470606B1 (ko) 2015-11-26 2022-11-28 삼성전자주식회사 불휘발성 메모리 장치 및 불휘발성 메모리 장치를 포함하는 스토리지 장치
CN105405465B (zh) * 2015-12-29 2019-07-23 中北大学 数据存储及处理电路
US10120808B2 (en) 2016-04-22 2018-11-06 Arm Limited Apparatus having cache memory disposed in a memory transaction path between interconnect circuitry and a non-volatile memory, and corresponding method
US10298646B2 (en) 2016-04-27 2019-05-21 Google Llc Similar introduction advertising caching mechanism
KR102664674B1 (ko) 2016-06-10 2024-05-16 에스케이하이닉스 주식회사 메모리 시스템 및 메모리 시스템의 동작방법
KR20180031412A (ko) * 2016-09-20 2018-03-28 삼성전자주식회사 메모리 컨트롤러의 동작 방법과, 이를 포함하는 장치들의 동작 방법들
US9823880B1 (en) * 2016-09-30 2017-11-21 Intel Corporation Method and apparatus for initiating pre-read operation before completion of data load operation
US10452598B2 (en) * 2016-10-18 2019-10-22 Micron Technology, Inc. Apparatuses and methods for an operating system cache in a solid state device
US11182306B2 (en) * 2016-11-23 2021-11-23 Advanced Micro Devices, Inc. Dynamic application of software data caching hints based on cache test regions
US10318423B2 (en) 2016-12-14 2019-06-11 Macronix International Co., Ltd. Methods and systems for managing physical information of memory units in a memory device
JP2018106573A (ja) 2016-12-28 2018-07-05 富士通株式会社 ストレージ制御装置及び制御プログラム
US10725835B2 (en) 2017-05-03 2020-07-28 Western Digital Technologies, Inc. System and method for speculative execution of commands using a controller memory buffer
US10564853B2 (en) 2017-04-26 2020-02-18 Western Digital Technologies, Inc. System and method for locality detection to identify read or write streams in a memory device
US10509569B2 (en) 2017-03-24 2019-12-17 Western Digital Technologies, Inc. System and method for adaptive command fetch aggregation
WO2018175063A1 (en) * 2017-03-24 2018-09-27 Western Digital Technologies, Inc. System and method for locality detection to identify read or write streams in a memory device
US10466903B2 (en) 2017-03-24 2019-11-05 Western Digital Technologies, Inc. System and method for dynamic and adaptive interrupt coalescing
US10452278B2 (en) 2017-03-24 2019-10-22 Western Digital Technologies, Inc. System and method for adaptive early completion posting using controller memory buffer
WO2018176388A1 (en) * 2017-03-31 2018-10-04 Intel Corporation Techniques to maintain memory confidentiality through power state changes
US10296249B2 (en) 2017-05-03 2019-05-21 Western Digital Technologies, Inc. System and method for processing non-contiguous submission and completion queues
US10884926B2 (en) 2017-06-16 2021-01-05 Alibaba Group Holding Limited Method and system for distributed storage using client-side global persistent cache
US10482010B2 (en) * 2017-06-29 2019-11-19 Intel Corporation Persistent host memory buffer
US10564856B2 (en) 2017-07-06 2020-02-18 Alibaba Group Holding Limited Method and system for mitigating write amplification in a phase change memory-based storage device
US10678443B2 (en) 2017-07-06 2020-06-09 Alibaba Group Holding Limited Method and system for high-density converged storage via memory bus
US10613985B2 (en) * 2017-07-06 2020-04-07 Seagate Technology Llc Buffer management in a data storage device wherein a bit indicating whether data is in cache is reset after updating forward table with physical address of non-volatile memory and jettisoning the data from the cache
US10496829B2 (en) 2017-09-15 2019-12-03 Alibaba Group Holding Limited Method and system for data destruction in a phase change memory-based storage device
US10642522B2 (en) 2017-09-15 2020-05-05 Alibaba Group Holding Limited Method and system for in-line deduplication in a storage drive based on a non-collision hash
US10503409B2 (en) 2017-09-27 2019-12-10 Alibaba Group Holding Limited Low-latency lightweight distributed storage system
US10789011B2 (en) 2017-09-27 2020-09-29 Alibaba Group Holding Limited Performance enhancement of a storage device using an integrated controller-buffer
US10860334B2 (en) 2017-10-25 2020-12-08 Alibaba Group Holding Limited System and method for centralized boot storage in an access switch shared by multiple servers
US10445190B2 (en) 2017-11-08 2019-10-15 Alibaba Group Holding Limited Method and system for enhancing backup efficiency by bypassing encoding and decoding
US10877898B2 (en) 2017-11-16 2020-12-29 Alibaba Group Holding Limited Method and system for enhancing flash translation layer mapping flexibility for performance and lifespan improvements
US10891239B2 (en) * 2018-02-07 2021-01-12 Alibaba Group Holding Limited Method and system for operating NAND flash physical space to extend memory capacity
US10496548B2 (en) 2018-02-07 2019-12-03 Alibaba Group Holding Limited Method and system for user-space storage I/O stack with user-space flash translation layer
US10831404B2 (en) 2018-02-08 2020-11-10 Alibaba Group Holding Limited Method and system for facilitating high-capacity shared memory using DIMM from retired servers
WO2019222958A1 (en) 2018-05-24 2019-11-28 Alibaba Group Holding Limited System and method for flash storage management using multiple open page stripes
WO2020000136A1 (en) 2018-06-25 2020-01-02 Alibaba Group Holding Limited System and method for managing resources of a storage device and quantifying the cost of i/o requests
US10921992B2 (en) 2018-06-25 2021-02-16 Alibaba Group Holding Limited Method and system for data placement in a hard disk drive based on access frequency for improved IOPS and utilization efficiency
KR102695771B1 (ko) * 2018-07-06 2024-08-19 에스케이하이닉스 주식회사 메모리 시스템 및 메모리 시스템의 동작방법
US10871921B2 (en) 2018-07-30 2020-12-22 Alibaba Group Holding Limited Method and system for facilitating atomicity assurance on metadata and data bundled storage
US10747673B2 (en) 2018-08-02 2020-08-18 Alibaba Group Holding Limited System and method for facilitating cluster-level cache and memory space
US10996886B2 (en) 2018-08-02 2021-05-04 Alibaba Group Holding Limited Method and system for facilitating atomicity and latency assurance on variable sized I/O
US11327929B2 (en) 2018-09-17 2022-05-10 Alibaba Group Holding Limited Method and system for reduced data movement compression using in-storage computing and a customized file system
US10852948B2 (en) 2018-10-19 2020-12-01 Alibaba Group Holding System and method for data organization in shingled magnetic recording drive
US10795586B2 (en) 2018-11-19 2020-10-06 Alibaba Group Holding Limited System and method for optimization of global data placement to mitigate wear-out of write cache and NAND flash
KR102684940B1 (ko) 2018-11-21 2024-07-17 에스케이하이닉스 주식회사 데이터 처리 시스템
KR102693213B1 (ko) 2018-11-30 2024-08-09 에스케이하이닉스 주식회사 메모리 시스템
US11544063B2 (en) 2018-11-21 2023-01-03 SK Hynix Inc. Memory system and data processing system including the same
KR102679649B1 (ko) * 2018-11-30 2024-07-01 에스케이하이닉스 주식회사 메모리 시스템
US10769018B2 (en) 2018-12-04 2020-09-08 Alibaba Group Holding Limited System and method for handling uncorrectable data errors in high-capacity storage
US10884654B2 (en) 2018-12-31 2021-01-05 Alibaba Group Holding Limited System and method for quality of service assurance of multi-stream scenarios in a hard disk drive
US10977122B2 (en) 2018-12-31 2021-04-13 Alibaba Group Holding Limited System and method for facilitating differentiated error correction in high-density flash devices
US11061735B2 (en) 2019-01-02 2021-07-13 Alibaba Group Holding Limited System and method for offloading computation to storage nodes in distributed system
US11132291B2 (en) 2019-01-04 2021-09-28 Alibaba Group Holding Limited System and method of FPGA-executed flash translation layer in multiple solid state drives
US10860420B2 (en) 2019-02-05 2020-12-08 Alibaba Group Holding Limited Method and system for mitigating read disturb impact on persistent memory
US11200337B2 (en) 2019-02-11 2021-12-14 Alibaba Group Holding Limited System and method for user data isolation
US10970212B2 (en) 2019-02-15 2021-04-06 Alibaba Group Holding Limited Method and system for facilitating a distributed storage system with a total cost of ownership reduction for multiple available zones
US11061834B2 (en) 2019-02-26 2021-07-13 Alibaba Group Holding Limited Method and system for facilitating an improved storage system by decoupling the controller from the storage medium
US10783035B1 (en) 2019-02-28 2020-09-22 Alibaba Group Holding Limited Method and system for improving throughput and reliability of storage media with high raw-error-rate
US10877896B2 (en) 2019-03-07 2020-12-29 Micron Technology, Inc. Adaptive readahead cache manager based on detected active streams of read commands
JP2020155052A (ja) * 2019-03-22 2020-09-24 キオクシア株式会社 メモリシステムおよび制御方法
US10891065B2 (en) 2019-04-01 2021-01-12 Alibaba Group Holding Limited Method and system for online conversion of bad blocks for improvement of performance and longevity in a solid state drive
US10922234B2 (en) 2019-04-11 2021-02-16 Alibaba Group Holding Limited Method and system for online recovery of logical-to-physical mapping table affected by noise sources in a solid state drive
US10908960B2 (en) 2019-04-16 2021-02-02 Alibaba Group Holding Limited Resource allocation based on comprehensive I/O monitoring in a distributed storage system
KR20240064052A (ko) * 2019-05-17 2024-05-10 양쯔 메모리 테크놀로지스 씨오., 엘티디. 정적 랜덤 액세스 메모리를 사용하는 3차원 메모리 디바이스의 캐시 프로그램 작동
US11169873B2 (en) 2019-05-21 2021-11-09 Alibaba Group Holding Limited Method and system for extending lifespan and enhancing throughput in a high-density solid state drive
US10860223B1 (en) 2019-07-18 2020-12-08 Alibaba Group Holding Limited Method and system for enhancing a distributed storage system by decoupling computation and network tasks
US10789094B1 (en) 2019-08-22 2020-09-29 Micron Technology, Inc. Hierarchical memory apparatus
US11126561B2 (en) 2019-10-01 2021-09-21 Alibaba Group Holding Limited Method and system for organizing NAND blocks and placing data to facilitate high-throughput for random writes in a solid state drive
KR20210066631A (ko) 2019-11-28 2021-06-07 삼성전자주식회사 메모리에 데이터를 기입하기 위한 장치 및 방법
US11042307B1 (en) 2020-01-13 2021-06-22 Alibaba Group Holding Limited System and method for facilitating improved utilization of NAND flash based on page-wise operation
US11449455B2 (en) 2020-01-15 2022-09-20 Alibaba Group Holding Limited Method and system for facilitating a high-capacity object storage system with configuration agility and mixed deployment flexibility
US10923156B1 (en) 2020-02-19 2021-02-16 Alibaba Group Holding Limited Method and system for facilitating low-cost high-throughput storage for accessing large-size I/O blocks in a hard disk drive
US10872622B1 (en) 2020-02-19 2020-12-22 Alibaba Group Holding Limited Method and system for deploying mixed storage products on a uniform storage infrastructure
US11150986B2 (en) 2020-02-26 2021-10-19 Alibaba Group Holding Limited Efficient compaction on log-structured distributed file system using erasure coding for resource consumption reduction
US11144250B2 (en) 2020-03-13 2021-10-12 Alibaba Group Holding Limited Method and system for facilitating a persistent memory-centric system
US11200114B2 (en) 2020-03-17 2021-12-14 Alibaba Group Holding Limited System and method for facilitating elastic error correction code in memory
US11385833B2 (en) 2020-04-20 2022-07-12 Alibaba Group Holding Limited Method and system for facilitating a light-weight garbage collection with a reduced utilization of resources
US11281575B2 (en) 2020-05-11 2022-03-22 Alibaba Group Holding Limited Method and system for facilitating data placement and control of physical addresses with multi-queue I/O blocks
US11461262B2 (en) 2020-05-13 2022-10-04 Alibaba Group Holding Limited Method and system for facilitating a converged computation and storage node in a distributed storage system
US11494115B2 (en) 2020-05-13 2022-11-08 Alibaba Group Holding Limited System method for facilitating memory media as file storage device based on real-time hashing by performing integrity check with a cyclical redundancy check (CRC)
US11218165B2 (en) 2020-05-15 2022-01-04 Alibaba Group Holding Limited Memory-mapped two-dimensional error correction code for multi-bit error tolerance in DRAM
US11556277B2 (en) 2020-05-19 2023-01-17 Alibaba Group Holding Limited System and method for facilitating improved performance in ordering key-value storage with input/output stack simplification
US11507499B2 (en) 2020-05-19 2022-11-22 Alibaba Group Holding Limited System and method for facilitating mitigation of read/write amplification in data compression
US11263132B2 (en) 2020-06-11 2022-03-01 Alibaba Group Holding Limited Method and system for facilitating log-structure data organization
US11354200B2 (en) 2020-06-17 2022-06-07 Alibaba Group Holding Limited Method and system for facilitating data recovery and version rollback in a storage device
US11422931B2 (en) 2020-06-17 2022-08-23 Alibaba Group Holding Limited Method and system for facilitating a physically isolated storage unit for multi-tenancy virtualization
US11462249B2 (en) 2020-06-30 2022-10-04 Micron Technology, Inc. System and method for reading and writing memory management data using a non-volatile cell based register
US11354233B2 (en) 2020-07-27 2022-06-07 Alibaba Group Holding Limited Method and system for facilitating fast crash recovery in a storage device
US11372774B2 (en) 2020-08-24 2022-06-28 Alibaba Group Holding Limited Method and system for a solid state drive with on-chip memory integration
US11513723B2 (en) 2020-09-17 2022-11-29 Western Digital Technologies, Inc. Read handling in zoned namespace devices
US11487465B2 (en) 2020-12-11 2022-11-01 Alibaba Group Holding Limited Method and system for a local storage engine collaborating with a solid state drive controller
US11734115B2 (en) 2020-12-28 2023-08-22 Alibaba Group Holding Limited Method and system for facilitating write latency reduction in a queue depth of one scenario
US11416365B2 (en) 2020-12-30 2022-08-16 Alibaba Group Holding Limited Method and system for open NAND block detection and correction in an open-channel SSD
US11726699B2 (en) 2021-03-30 2023-08-15 Alibaba Singapore Holding Private Limited Method and system for facilitating multi-stream sequential read performance improvement with reduced read amplification
US11461173B1 (en) 2021-04-21 2022-10-04 Alibaba Singapore Holding Private Limited Method and system for facilitating efficient data compression based on error correction code and reorganization of data placement
US11650758B2 (en) 2021-05-06 2023-05-16 Western Digital Technologies, Inc. Data storage device and method for host-initiated cached read to recover corrupted data within timeout constraints
US11476874B1 (en) 2021-05-14 2022-10-18 Alibaba Singapore Holding Private Limited Method and system for facilitating a storage server with hybrid memory for journaling and data storage
CN113905097B (zh) * 2021-09-26 2022-07-05 合肥申威睿思信息科技有限公司 一种数据传输方法和装置
US20230281122A1 (en) * 2022-03-04 2023-09-07 Western Digital Technologies, Inc. Data Storage Device and Method for Host-Determined Proactive Block Clearance
US11894060B2 (en) 2022-03-25 2024-02-06 Western Digital Technologies, Inc. Dual performance trim for optimization of non-volatile memory performance, endurance, and reliability
CN116049025B (zh) * 2023-01-29 2023-08-11 荣耀终端有限公司 动态调整内存回收gc参数的方法、电子设备及存储介质

Family Cites Families (94)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4725945A (en) 1984-09-18 1988-02-16 International Business Machines Corp. Distributed cache in dynamic rams
US5095344A (en) 1988-06-08 1992-03-10 Eliyahou Harari Highly compact eprom and flash eeprom devices
US5043940A (en) 1988-06-08 1991-08-27 Eliyahou Harari Flash EEPROM memory systems having multistate storage cells
JPH02219144A (ja) 1989-02-21 1990-08-31 Toshiba Corp ライト・バックアクセス時間を短縮したキャッシュメモリ
US5070032A (en) 1989-03-15 1991-12-03 Sundisk Corporation Method of making dense flash eeprom semiconductor memory structures
DE69033438T2 (de) 1989-04-13 2000-07-06 Sandisk Corp., Santa Clara Austausch von fehlerhaften Speicherzellen einer EEprommatritze
US5172338B1 (en) 1989-04-13 1997-07-08 Sandisk Corp Multi-state eeprom read and write circuits and techniques
US5200959A (en) 1989-10-17 1993-04-06 Sundisk Corporation Device and method for defect handling in semi-conductor memory
JPH0418649A (ja) * 1990-05-11 1992-01-22 Fujitsu Ltd バッファメモリ制御方式
US5343063A (en) 1990-12-18 1994-08-30 Sundisk Corporation Dense vertical programmable read only memory cell structure and processes for making them
US5270979A (en) 1991-03-15 1993-12-14 Sundisk Corporation Method for optimum erasing of EEPROM
US5663901A (en) 1991-04-11 1997-09-02 Sandisk Corporation Computer memory cards using flash EEPROM integrated circuit chips and memory-controller systems
US5430859A (en) 1991-07-26 1995-07-04 Sundisk Corporation Solid state memory system including plural memory chips and a serialized bus
US5359569A (en) 1991-10-29 1994-10-25 Hitachi Ltd. Semiconductor memory
US5313421A (en) 1992-01-14 1994-05-17 Sundisk Corporation EEPROM with split gate source side injection
US5712180A (en) 1992-01-14 1998-01-27 Sundisk Corporation EEPROM with split gate source side injection
US6222762B1 (en) 1992-01-14 2001-04-24 Sandisk Corporation Multi-state memory
JPH05233464A (ja) 1992-02-25 1993-09-10 Fuji Photo Film Co Ltd Ｅｅｐｒｏｍのデータ書換方法およびｅｅｐｒｏｍカード
JPH05299616A (ja) 1992-04-16 1993-11-12 Hitachi Ltd 半導体記憶装置
US5532962A (en) 1992-05-20 1996-07-02 Sandisk Corporation Soft errors handling in EEPROM devices
US5315541A (en) 1992-07-24 1994-05-24 Sundisk Corporation Segmented column memory array
US5428621A (en) 1992-09-21 1995-06-27 Sundisk Corporation Latent defect handling in EEPROM devices
JPH07146820A (ja) 1993-04-08 1995-06-06 Hitachi Ltd フラッシュメモリの制御方法及び、それを用いた情報処理装置
JPH06349286A (ja) * 1993-06-04 1994-12-22 Matsushita Electric Ind Co Ltd フラッシュメモリ用書き込み制御方法および制御装置
US5555204A (en) 1993-06-29 1996-09-10 Kabushiki Kaisha Toshiba Non-volatile semiconductor memory device
KR0169267B1 (ko) 1993-09-21 1999-02-01 사토 후미오 불휘발성 반도체 기억장치
US6026027A (en) 1994-01-31 2000-02-15 Norand Corporation Flash memory system having memory cache
US5726937A (en) 1994-01-31 1998-03-10 Norand Corporation Flash memory system having memory cache
US5661053A (en) 1994-05-25 1997-08-26 Sandisk Corporation Method of making dense flash EEPROM cell array and peripheral supporting circuits formed in deposited field oxide with the use of spacers
JP3586887B2 (ja) * 1994-06-10 2004-11-10 松下電器産業株式会社 情報記録再生装置およびデータキャッシュ方法
JPH086858A (ja) * 1994-06-21 1996-01-12 Toshiba Corp キャッシュ制御装置
US5586291A (en) * 1994-12-23 1996-12-17 Emc Corporation Disk controller with volatile and non-volatile cache memories
US5606532A (en) 1995-03-17 1997-02-25 Atmel Corporation EEPROM array with flash-like core
JPH08263229A (ja) * 1995-03-23 1996-10-11 Hitachi Ltd 半導体記憶装置
US5579259A (en) 1995-05-31 1996-11-26 Sandisk Corporation Low voltage erase of a flash EEPROM system having a common erase electrode for two individually erasable sectors
US5712179A (en) 1995-10-31 1998-01-27 Sandisk Corporation Method of making triple polysilicon flash EEPROM arrays having a separate erase gate for each row of floating gates
US5903495A (en) 1996-03-18 1999-05-11 Kabushiki Kaisha Toshiba Semiconductor device and memory system
US6023027A (en) * 1996-05-03 2000-02-08 Neff; Scott E. Cable guard having a hinge rod and for protecting cables extending along a tubing string
US5798968A (en) 1996-09-24 1998-08-25 Sandisk Corporation Plane decode/virtual sector architecture
US5966734A (en) 1996-10-18 1999-10-12 Samsung Electronics Co., Ltd. Resizable and relocatable memory scratch pad as a cache slice
US5890192A (en) 1996-11-05 1999-03-30 Sandisk Corporation Concurrent write of multiple chunks of data into multiple subarrays of flash EEPROM
US5937423A (en) 1996-12-26 1999-08-10 Intel Corporation Register interface for flash EEPROM memory arrays
US6418506B1 (en) * 1996-12-31 2002-07-09 Intel Corporation Integrated circuit memory and method for transferring data using a volatile memory to buffer data for a nonvolatile memory array
US5930167A (en) 1997-07-30 1999-07-27 Sandisk Corporation Multi-state non-volatile flash memory capable of being its own two state write cache
US5822251A (en) * 1997-08-25 1998-10-13 Bit Microsystems, Inc. Expandable flash-memory mass-storage using shared buddy lines and intermediate flash-bus between device-specific buffers and flash-intelligent DMA controllers
US6000006A (en) 1997-08-25 1999-12-07 Bit Microsystems, Inc. Unified re-map and cache-index table with dual write-counters for wear-leveling of non-volatile flash RAM mass storage
US5909449A (en) 1997-09-08 1999-06-01 Invox Technology Multibit-per-cell non-volatile memory with error detection and correction
US6105103A (en) * 1997-12-19 2000-08-15 Lsi Logic Corporation Method for mapping in dynamically addressed storage subsystems
US6263398B1 (en) 1998-02-10 2001-07-17 Ramtron International Corporation Integrated circuit memory device incorporating a non-volatile memory array and a relatively faster access time memory cache
US6295577B1 (en) * 1998-02-24 2001-09-25 Seagate Technology Llc Disc storage system having a non-volatile cache to store write data in the event of a power failure
US6249841B1 (en) 1998-12-03 2001-06-19 Ramtron International Corporation Integrated circuit memory device and method incorporating flash and ferroelectric random access memory arrays
US6349363B2 (en) 1998-12-08 2002-02-19 Intel Corporation Multi-section cache with different attributes for each section
GB9903490D0 (en) * 1999-02-17 1999-04-07 Memory Corp Plc Memory system
US6741414B1 (en) * 1999-06-15 2004-05-25 Tokyo Electron Limited Joint spindle speed and head position control in rotating media storage systems
US6151248A (en) 1999-06-30 2000-11-21 Sandisk Corporation Dual floating gate EEPROM cell array with steering gates shared by adjacent cells
US6708257B2 (en) 1999-07-12 2004-03-16 Koninklijke Philips Electronics N.V. Buffering system bus for external-memory access
US6343649B1 (en) * 1999-09-07 2002-02-05 Halliburton Energy Services, Inc. Methods and associated apparatus for downhole data retrieval, monitoring and tool actuation
US6434669B1 (en) 1999-09-07 2002-08-13 International Business Machines Corporation Method of cache management to dynamically update information-type dependent cache policies
JP3578265B2 (ja) 1999-11-19 2004-10-20 日本電気株式会社 不揮発性メモリへのデータ書き込み方法および情報処理装置ならびに記録媒体
US6647499B1 (en) 2000-01-26 2003-11-11 International Business Machines Corporation System for powering down a disk storage device to an idle state upon trnsfer to an intermediate storage location accessible by system processor
US6329687B1 (en) * 2000-01-27 2001-12-11 Advanced Micro Devices, Inc. Two bit flash cell with two floating gate regions
US6426893B1 (en) 2000-02-17 2002-07-30 Sandisk Corporation Flash eeprom system with simultaneous multiple data sector programming and storage of physical block characteristics in other designated blocks
US6615307B1 (en) * 2000-05-10 2003-09-02 Micron Technology, Inc. Flash with consistent latency for read operations
JP2001344986A (ja) 2000-06-05 2001-12-14 Mitsubishi Electric Corp 不揮発性半導体記憶装置
TW576966B (en) * 2000-06-23 2004-02-21 Intel Corp Non-volatile cache integrated with mass storage device
EP1297434B1 (en) 2000-06-27 2005-04-20 Koninklijke Philips Electronics N.V. Integrated circuit with flash
US6721843B1 (en) 2000-07-07 2004-04-13 Lexar Media, Inc. Flash memory architecture implementing simultaneously programmable multiple flash memory banks that are host compatible
US6694453B1 (en) * 2000-11-14 2004-02-17 Hewlett-Packard Development Company, L.P. Apparatus and method to handle power supply failures for a peripheral device
US6349056B1 (en) 2000-12-28 2002-02-19 Sandisk Corporation Method and structure for efficient data verification operation for non-volatile memories
US20020087225A1 (en) * 2001-01-03 2002-07-04 Howard Gary M. Portable computing device having a low power media player
US6763424B2 (en) 2001-01-19 2004-07-13 Sandisk Corporation Partial block data programming and reading operations in a non-volatile memory
US6691205B2 (en) * 2001-03-05 2004-02-10 M-Systems Flash Disk Pioneers Ltd. Method for using RAM buffers with simultaneous accesses in flash based storage systems
US6941414B2 (en) 2001-05-15 2005-09-06 International Business Machines Corporation High speed embedded DRAM with SRAM-like interface
JP4049297B2 (ja) 2001-06-11 2008-02-20 株式会社ルネサステクノロジ 半導体記憶装置
US6522580B2 (en) 2001-06-27 2003-02-18 Sandisk Corporation Operating techniques for reducing effects of coupling between storage elements of a non-volatile memory operated in multiple data states
US7418344B2 (en) * 2001-08-02 2008-08-26 Sandisk Corporation Removable computer with mass storage
US6456528B1 (en) 2001-09-17 2002-09-24 Sandisk Corporation Selective operation of a multi-state non-volatile memory system in a binary mode
US6717847B2 (en) 2001-09-17 2004-04-06 Sandisk Corporation Selective operation of a multi-state non-volatile memory system in a binary mode
US6925007B2 (en) 2001-10-31 2005-08-02 Sandisk Corporation Multi-state non-volatile integrated circuit memory systems that employ dielectric storage elements
JP4082913B2 (ja) * 2002-02-07 2008-04-30 株式会社ルネサステクノロジ メモリシステム
US6871257B2 (en) * 2002-02-22 2005-03-22 Sandisk Corporation Pipelined parallel programming operation in a non-volatile memory system
US6798353B2 (en) 2002-04-24 2004-09-28 Itron Electricity Metering, Inc. Method of using flash memory for storing metering data
US6941412B2 (en) * 2002-08-29 2005-09-06 Sandisk Corporation Symbol frequency leveling in a storage system
US7003620B2 (en) * 2002-11-26 2006-02-21 M-Systems Flash Disk Pioneers Ltd. Appliance, including a flash memory, that is robust under power failure
US7546418B2 (en) * 2003-08-20 2009-06-09 Dell Products L.P. System and method for managing power consumption and data integrity in a computer system
US7500127B2 (en) * 2003-09-18 2009-03-03 Vulcan Portals Inc. Method and apparatus for operating an electronic device in a low power mode
US7426647B2 (en) * 2003-09-18 2008-09-16 Vulcan Portals Inc. Low power media player for an electronic device
US7173863B2 (en) * 2004-03-08 2007-02-06 Sandisk Corporation Flash controller cache architecture
US7139864B2 (en) * 2003-12-30 2006-11-21 Sandisk Corporation Non-volatile memory and method with block management system
US7490283B2 (en) * 2004-05-13 2009-02-10 Sandisk Corporation Pipelined data relocation and improved chip architectures
US8429313B2 (en) * 2004-05-27 2013-04-23 Sandisk Technologies Inc. Configurable ready/busy control
US7420847B2 (en) * 2004-12-14 2008-09-02 Sandisk Corporation Multi-state memory having data recovery after program fail
JP4805696B2 (ja) * 2006-03-09 2011-11-02 株式会社東芝 半導体集積回路装置およびそのデータ記録方式
ITRM20060139A1 (it) * 2006-03-13 2007-09-14 Micron Technology Inc Sistema ad unita di controllo distribuito di dispositivo di memoria

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN110113238A (zh) * 2013-03-15 2019-08-09 波音公司 通过易失性影子存储器访问非易失性存储器
CN110113238B (zh) * 2013-03-15 2021-12-07 波音公司 通过易失性影子存储器访问非易失性存储器
CN118672666A (zh) * 2024-08-23 2024-09-20 成都赛力斯科技有限公司 可执行文件生成方法、装置、计算机设备和可读存储介质

Also Published As

Publication number Publication date
EP2264605A1 (en) 2010-12-22
KR101204680B1 (ko) 2012-11-26
EP2264605B1 (en) 2015-12-16
CN100483366C (zh) 2009-04-29
WO2005088456A3 (en) 2006-04-20
JP2007528079A (ja) 2007-10-04
US20080250202A1 (en) 2008-10-09
TW200614249A (en) 2006-05-01
US20070143545A1 (en) 2007-06-21
US9678877B2 (en) 2017-06-13
EP1725937A2 (en) 2006-11-29
CN1950804A (zh) 2007-04-18
US20050195635A1 (en) 2005-09-08
WO2005088456A2 (en) 2005-09-22
US7408834B2 (en) 2008-08-05
KR20070022659A (ko) 2007-02-27
JP5192228B2 (ja) 2013-05-08
TWI267862B (en) 2006-12-01
CN101504629B (zh) 2012-04-11
US7173863B2 (en) 2007-02-06

Similar Documents

Publication Publication Date Title
CN100483366C (zh) 闪速存储器控制器高速缓存架构
US7340581B2 (en) Method of writing data to non-volatile memory
US8208322B2 (en) Non-volatile memory control
US9183136B2 (en) Storage control apparatus and storage control method
CN102750226B (zh) 具有非易失性存储器的系统的高效缓冲
US8171239B2 (en) Storage management method and system using the same
US20060187738A1 (en) Memory management device and memory device
US20030065899A1 (en) Memory system sectors
WO2009086357A1 (en) System and method for performing host initiated mass storage commands using a hierarchy of data structures
CN111796771B (zh) 闪存控制器、固态硬盘及其控制器、闪存命令管理方法
US10776042B2 (en) Methods for garbage collection and apparatuses using the same
CN114253461A (zh) 混合通道存储设备
US9304906B2 (en) Memory system, controller and control method of memory
CN114253462A (zh) 提供混合通道存储设备的方法
CN213338708U (zh) 一种控制部件及存储设备
CN118051165A (zh) 固态硬盘及其数据缓冲区管理方法

Legal Events

Date Code Title Description
C06 Publication
PB01 Publication
C10 Entry into substantive examination
SE01 Entry into force of request for substantive examination
C14 Grant of patent or utility model
GR01 Patent grant
ASS Succession or assignment of patent right

Owner name: SANDISK TECHNOLOGY CO., LTD.

Free format text: FORMER OWNER: SANDISK CORP.

Effective date: 20121219

C41 Transfer of patent application or patent right or utility model
TR01 Transfer of patent right

Effective date of registration: 20121219

Address after: American Texas

Patentee after: Sandisk Corp.

Address before: American California

Patentee before: Sandisk Corp.

C56 Change in the name or address of the patentee
CP01 Change in the name or title of a patent holder

Address after: American Texas

Patentee after: DELPHI INT OPERATIONS LUX SRL

Address before: American Texas

Patentee before: Sandisk Corp.