Dynamic detection electrostatic protection circuit
Technical field
The present invention relates to a kind of electrostatic protection circuit structure, particularly relate to a kind of dynamic detection electrostatic protection circuit.
Background technology
In the static leakage circuit,, help reducing the electrostatic leakage cut-in voltage of MOSFET pipe in the gate coupled appropriate bias voltage of electrostatic leakage Metal-oxide-semicondutor field effect transistor (MOSFET); And in multi-fork syconoid MOSFET structure, gate bias voltage also helps the uniformity of each interdigital conducting, thereby improves its electrostatic protection performance.Circuit shown in Fig. 1,2 is widely used at present, the dynamic detection electrostatic leadage circuit of being made up of resistance, electric capacity.
In circuit shown in Figure 1; when electrostatic leakage; static can pass through the grid of the certain bias voltage of RC dynamic sensing circuit coupling that resistance R, capacitor C form to electrostatic leakage device ESD NMOS; reduce the electrostatic leakage cut-in voltage of electrostatic leakage device ESDNMOS; and improve its conducting homogeneity, thereby improve the electrostatic protection performance of ESDNMOS.Yet, in order to reach certain electrostatic protection ability,, approximately need to bear 1.5 amperes electrostatic leakage electric current as Human Body Model's 2 kilovolts, therefore need more large-sized electrostatic leakage device ESDNMOS.The grid capacitance of large-sized electrostatic leakage device ESDNMOS often may influence choosing of capacitance size in the circuit for detecting of being made up of resistance R, capacitor C.
Circuit shown in Figure 2 is to have inserted the inverter that one-level is made of PMOS and NMOS pipe in the circuit of Fig. 1, thereby dynamic sensing circuit and electrostatic leakage device ESDNMOS that resistance R, capacitor C are formed keep apart.PMOS in the inverter and the size of NMOS are little more a lot of than electrostatic leakage device ESDNMOS pipe, so the capacitance size is chosen in the dynamic sensing circuit that the gate capacitance of PMOS and NMOS is formed resistance R and capacitor C in the inverter, and to influence meeting little a lot.But the grid capacitance of the PMOS of introducing pipe and NMOS pipe still can influence choosing of capacitance in the dynamic sensing circuit of resistance and electric capacity composition, influences the electrostatic leakage performance of dynamic detection electrostatic leadage circuit structure.
Summary of the invention
The technical problem to be solved in the present invention provides a kind of dynamic detection electrostatic protection circuit, can further reduce the influence chosen of parasitic gate capacitance to capacitance in the dynamic sensing circuit, improves the electrostatic leakage performance of dynamic detection electrostatic leadage circuit structure.
For solving the problems of the technologies described above, dynamic detection electrostatic protection circuit of the present invention comprises dynamic sensing circuit, middle buffer circuit, the static leakage circuit that is attempted by between static end and the earth terminal; Middle buffer circuit is used to isolate dynamic sensing circuit and static leakage circuit, and carries out dividing potential drop and driving; The input of middle buffer circuit is electrically connected with dynamic sensing circuit, and its output is electrically connected with the input of static leakage circuit; Described dynamic sensing circuit is made up of resistance and capacitance series;
Described static leakage circuit is made of the NMOS pipe, and described middle buffer circuit is composed in series with a resistance by PMOS pipe; Perhaps,
Described static leakage circuit is made of the PMOS pipe, and described middle buffer circuit is composed in series with a resistance by NMOS pipe.
Owing to adopt the foregoing circuit structure; dynamic detection electrostatic protection circuit of the present invention is with respect to circuit shown in Figure 2; a NMOS pipe or PMOS pipe have been removed; so can further reduce the influence chosen of parasitic gate capacitance, thereby improve the electrostatic leakage performance of dynamic detection electrostatic leadage circuit structure to capacitance in the dynamic sensing circuit.
Description of drawings
The present invention is further detailed explanation below in conjunction with accompanying drawing and embodiment:
Fig. 1 is the existing dynamic detection electrostatic protection circuit figure that is made up of resistance capacitance;
Fig. 2 is the existing dynamic detection electrostatic protection circuit figure that is made up of resistance capacitance, inverter;
Fig. 3 is the circuit diagram of dynamic detection electrostatic protection circuit embodiment one of the present invention;
Fig. 4 is the circuit diagram of dynamic detection electrostatic protection circuit embodiment two of the present invention;
Fig. 5 is the circuit diagram of dynamic detection electrostatic protection circuit embodiment three of the present invention;
Fig. 6 is the circuit diagram of dynamic detection electrostatic protection circuit embodiment four of the present invention;
Fig. 7 is the circuit diagram of dynamic detection electrostatic protection circuit embodiment five of the present invention;
Fig. 8 is the circuit diagram of dynamic detection electrostatic protection circuit embodiment six of the present invention;
Fig. 9 is the circuit diagram of dynamic detection electrostatic protection circuit embodiment seven of the present invention;
Figure 10 is the circuit diagram of dynamic detection electrostatic protection circuit embodiment eight of the present invention.
Embodiment
Embodiment one
As shown in Figure 3.Dynamic detection electrostatic protection circuit of the present invention on the basis of electrostatic protection circuit structure shown in Figure 2, has been removed the NMOS pipe; Comprise dynamic sensing circuit, middle buffer circuit, static leakage circuit.The influence that parasitic gate capacitance is chosen capacitance in the dynamic sensing circuit when further reducing circuit design, thus the electrostatic leakage performance of dynamic detection electrostatic leadage circuit structure improved.Middle buffer circuit also plays the effect of dividing potential drop and driving except that playing the effect of isolating dynamic sensing circuit and static leakage circuit.
Described dynamic sensing circuit, static leakage circuit, middle buffer circuit are attempted by between static end and the earth terminal.Described dynamic sensing circuit is composed in series by resistance R 1 and capacitor C.Described static leakage circuit is made of an ESD NMOS pipe.Described middle buffer circuit is composed in series with a resistance R 2 by PMOS pipe.The grid of described PMOS pipe is electrically connected with the node of resistance R 1 and capacitor C, and the drain electrode of PMOS pipe is electrically connected with the grid of ESD NMOS pipe.
When electrostatic pulse is loaded into the static end; the PMOS pipe is opened with resistance R 2 and is formed the branch laminated structure; the certain voltage of gate bias at electrostatic leakage device ESDNMOS; thereby reduce the electrostatic leakage cut-in voltage of electrostatic leakage device ESD NMOS; and improve its conducting homogeneity, thereby improve the electrostatic protection performance of ESD NMOS.
Embodiment two
As shown in Figure 4, dynamic detection electrostatic protection circuit of the present invention on the basis of electrostatic protection circuit structure shown in Figure 2, has been removed the PMOS pipe; Comprise dynamic sensing circuit, middle buffer circuit, static leakage circuit.The influence that parasitic gate capacitance is chosen capacitance in the dynamic sensing circuit when further reducing circuit design, thus the electrostatic leakage performance of dynamic detection electrostatic leadage circuit structure improved.Middle buffer circuit also plays the effect of dividing potential drop and driving except that playing the effect of isolating dynamic sensing circuit and static leakage circuit.
Described dynamic sensing circuit, static leakage circuit, middle buffer circuit are attempted by between static end and the earth terminal.Described dynamic sensing circuit is composed in series by resistance R 1 and capacitor C.Described static leakage circuit is made of an ESD PMOS pipe.Described middle buffer circuit is composed in series with a resistance R 2 by NMOS pipe.The grid of described NMOS pipe is electrically connected with the node of resistance R 1 and capacitor C, and the drain electrode of NMOS pipe is electrically connected with the grid of ESD PMOS pipe.
When electrostatic pulse is loaded into the static end; the NMOS pipe is opened with resistance R 2 and is formed the branch laminated structure; the certain voltage of gate bias at electrostatic leakage device ESDPMOS; thereby reduce the electrostatic leakage cut-in voltage of electrostatic leakage device ESDPMOS; and improve its conducting homogeneity, thereby improve the electrostatic protection performance of ESDPMOS.
Embodiment three
As shown in Figure 5, the difference of it and embodiment one (referring to Fig. 3) is, the resistance of middle buffer circuit, dynamic sensing circuit is polysilicon resistance Rpoly or n trap resistance R nw, and the electric capacity of dynamic sensing circuit is polycrystalline silicon-on-insulator-polysilicon (pip:poly-isolation-poly) electric capacity.
Embodiment four
As shown in Figure 6, the difference of it and embodiment two (referring to Fig. 4) is that the resistance of middle buffer circuit, dynamic sensing circuit is polysilicon resistance Rpoly or n trap resistance R nw; The electric capacity of dynamic sensing circuit is polycrystalline silicon-on-insulator-polysilicon (pip:poly-isolation-poly) electric capacity.
Embodiment five
As shown in Figure 7, the difference of it and embodiment one (referring to Fig. 3) is that the resistance of middle buffer circuit, dynamic sensing circuit is polysilicon resistance Rpoly or n trap resistance R nw; The electric capacity of dynamic sensing circuit is the NMOS gate capacitance.
Embodiment six
As shown in Figure 8, the difference of it and embodiment two (referring to Fig. 4) is that the resistance in middle buffer circuit, the dynamic sensing circuit is polysilicon resistance Rpoly or n trap resistance R nw; The electric capacity of dynamic sensing circuit is the NMOS gate capacitance.
Embodiment seven
As shown in Figure 9, the difference of it and embodiment one (referring to Fig. 3) is that the resistance of middle buffer circuit, dynamic sensing circuit is polysilicon resistance Rpoly or n trap resistance R nw; The electric capacity of dynamic sensing circuit is the PMOS gate capacitance.
Embodiment eight
As shown in figure 10, the difference of it and embodiment two (referring to Fig. 4) is that the resistance of middle buffer circuit, dynamic sensing circuit is polysilicon resistance Rpoly or n trap resistance R nw, and the electric capacity of dynamic sensing circuit is the PMOS gate capacitance.