CN104578034A - Electrostatic protection circuit - Google Patents

Electrostatic protection circuit Download PDF

Info

Publication number
CN104578034A
CN104578034A CN201510005039.7A CN201510005039A CN104578034A CN 104578034 A CN104578034 A CN 104578034A CN 201510005039 A CN201510005039 A CN 201510005039A CN 104578034 A CN104578034 A CN 104578034A
Authority
CN
China
Prior art keywords
electrostatic discharge
node
power output
discharge protective
loop
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
CN201510005039.7A
Other languages
Chinese (zh)
Inventor
单毅
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Wuhan Xinxin Semiconductor Manufacturing Co Ltd
Original Assignee
Wuhan Xinxin Semiconductor Manufacturing Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Wuhan Xinxin Semiconductor Manufacturing Co Ltd filed Critical Wuhan Xinxin Semiconductor Manufacturing Co Ltd
Priority to CN201510005039.7A priority Critical patent/CN104578034A/en
Publication of CN104578034A publication Critical patent/CN104578034A/en
Pending legal-status Critical Current

Links

Abstract

The invention provides an electrostatic protection circuit which comprises an input/output pin, a power output terminal, a ground terminal, a function unit and a clamping circuit. The function unit is connected with the power output terminal and the ground terminal, the clamping circuit is connected with the power output terminal and the ground terminal, the function unit is connected with the input/output pin through a node, a first unidirectional conducting unit is connected between the node and the power output terminal in series, and the node and the ground terminal are in series connection with a second unidirectional conducting unit; a first LC circuit is connected between the node and the power output terminal in series or a second LC circuit is connected between the node and the ground terminal in series, or the first LC circuit is connected between the node and the power output terminal in series and the second LC circuit is connected between the node and the ground terminal in series. The electrostatic protection circuit has the advantages of being high in response speed, low in trigger voltage, better in conducting uniformity, and capable of reducing the influence on radio-frequency signals of the function unit.

Description

Electrostatic discharge protective circuit
Technical field
The present invention relates to Integrated circuit electrostatic protecting circuit designed field, particularly relate to a kind of ESD Circuits Design for High being applied to radio circuit.
Background technology
Integrated circuit, in manufacture, assembling and test or in final application, is easy to the impact of the static discharge (ESD) of the generation be subjected in manufacture or use procedure, thus makes integrated circuit be subject to the damage of electrostatic.
In prior art for the electrostatic discharge protective circuit figure of radio circuit with reference to shown in figure 1; comprise radio circuit 1, I/O pin 2, clamp circuit 3; power output end VDD and earth terminal GND; when producing positive electrostatic pulse in I/O pin 2; electric charge is along diode 4, power output end VDD, clamp circuit 3; be discharged into earth terminal GND, the sense of current is as shown in the arrow of solid line in Fig. 1.When producing negative electrostatic pulse in I/O pin 2, electric charge is directly released into earth terminal GND along diode 5, and the sense of current as indicated by a dashed arrow in the figure.But the electrostatic discharge protective circuit of Fig. 1 only punctures by the direction of diode the electrostatic protection ability being difficult to provide higher.
As shown in Figure 2, in order to improve above-mentioned electrostatic discharge protective circuit, realize the electrostatic protection ability of higher function at power output end VDD and earth terminal GND multiple diode of directly connecting.When producing positive electrostatic pulse in I/O pin 104, electric charge, along diode string structure 102, power output end VDD, clamp circuit 3, is discharged into earth terminal GND, and the sense of current is as shown in the arrow of solid line in Fig. 2.When producing negative electrostatic pulse in I/O pin 104, electric charge is directly released into earth terminal GND along diode string structure 103, and the sense of current as represented by the arrows in the dashed line in figure 2.But the diode string structure in Fig. 2 can introduce larger resistance in circuit.
But, the clamp circuit trigger voltage of substrate triggering (Sub-trigger) that the clamp circuit in the Gate-couple nmos pass transistor 6 that the clamp circuit in Fig. 1 adopts, Fig. 2 adopts is high, response speed is slow, and conducting homogeneity is bad, all can the transmission coefficient (power gain) of radio frequency circuit and noise figure (noisefigure) have an impact.
Summary of the invention
The object of the invention is to, provide that a kind of response speed block, trigger voltage are low, the better electrostatic discharge protective circuit of conducting homogeneity.
For solving the problems of the technologies described above, the invention provides a kind of electrostatic discharge protective circuit, comprising:
I/O pin, power output end, earth terminal, functional unit and clamp circuit, described functional unit is connected with described power output end and described earth terminal respectively, described clamp circuit is connected with described power output end and described earth terminal, described functional unit is connected with described I/O pin by a node, connect between described node with described power output end one first one-way conduction unit, described node is connected with described earth terminal one second one-way conduction unit; Wherein
Also to connect between described node with described power output end one the one LC loop; Or
Also to connect between described node with described earth terminal one the 2nd LC loop; Or
To connect between described node with described power output end a described LC loop, and described 2nd LC loop of connecting between described node with described earth terminal.
Optionally, described clamp circuit comprises diode string structure, nmos pass transistor, described diode string structure connects the grid of described power output end and described nmos pass transistor, and the source electrode of described nmos pass transistor connects described power output end, and the drain electrode of described nmos pass transistor connects described earth terminal.
Optionally, described nmos pass transistor grid and drain electrode between series connection one first resistance.
Optionally, described diode string structure comprises the diode of at least three series connection.
Optionally, the negative pole of described first one-way conduction unit connects described power output end.
Optionally, described first one-way conduction unit is one first diode.
Optionally, a described LC loop comprises one first inductance and one first electric capacity, between the positive pole being connected to described node and described first unidirectional single-pass unit after described first inductance and described first Capacitance parallel connection,
Optionally, described first electric capacity is one the 3rd diode, and described 3rd diode cathode connects described node.
Optionally, the positive pole of described second one-way conduction unit connects described earth terminal.
Optionally, described second one-way conduction unit is one second diode.
Optionally, described 2nd LC loop comprises one second inductance and one second electric capacity, between the negative pole being connected to described node and described second unidirectional single-pass unit after described second inductance and described second Capacitance parallel connection.
Optionally, described second electric capacity is one the 4th diode, and described 4th diode cathode connects described node.
Optionally, it is characterized in that, described functional unit is a radio circuit with a center operating frequency.
Optionally, the resonance frequency in a described LC loop is consistent with the center operating frequency of described functional unit.
Optionally, the resonance frequency in described 2nd LC loop is consistent with the center operating frequency of described functional unit.
Compared with prior art, electrostatic discharge protective circuit of the present invention, when I/O pin produces electrostatic pulse, electrostatic pulse is discharged into earth terminal by a LC loop, power output end, clamp circuit.The LC loop adopted makes electrostatic discharge protective circuit can not have an impact to the radiofrequency signal of functional unit.Adopt two trigger architectures of nmos pass transistor and parasitic NPN transistor in clamp circuit, there is the low feature of response speed block, trigger voltage and also conducting homogeneity better.
Accompanying drawing explanation
Fig. 1 is the circuit diagram of an electrostatic discharge protective circuit of radio circuit in prior art;
Fig. 2 is the circuit diagram of an electrostatic discharge protective circuit improved of radio circuit in prior art;
Fig. 3 is the circuit diagram of electrostatic discharge protective circuit in one embodiment of the invention.
Embodiment
Below in conjunction with schematic diagram, electrostatic discharge protective circuit of the present invention is described in more detail, which show the preferred embodiments of the present invention, should be appreciated that those skilled in the art can revise the present invention described here, and still realize advantageous effects of the present invention.Therefore, following description is appreciated that extensively knowing for those skilled in the art, and not as limitation of the present invention.
In the following passage, more specifically the present invention is described by way of example with reference to accompanying drawing.According to the following describes and claims, advantages and features of the invention will be clearer.It should be noted that, accompanying drawing all adopts the form that simplifies very much and all uses non-ratio accurately, only in order to object that is convenient, the aid illustration embodiment of the present invention lucidly.
Core concept of the present invention is, when I/O pin produces electrostatic pulse, electrostatic pulse is discharged into earth terminal by a LC loop, power output end, clamp circuit.The LC loop adopted makes electrostatic discharge protective circuit can not have an impact to the frequency signal of functional unit.Adopt two trigger architectures of nmos pass transistor and parasitic NPN transistor in clamp circuit, make the response speed block of circuit, trigger voltage is low, conducting homogeneity is better.
Concrete, according to above-mentioned core concept, in composition graphs 3, the circuit diagram of electrostatic discharge protective circuit is specifically described, and electrostatic discharge protective circuit of the present invention comprises:
I/O pin 20, power output end VDD, earth terminal GND and functional unit 10, described functional unit 10 is connected with described I/O pin 20, described power output end VDD and described earth terminal GND respectively, and described functional unit 10 is connected with described I/O pin 20 by a node A.In the present embodiment, described functional unit 10 is for having the radio circuit of certain center operating frequency.
To connect between described node A with described power output end VDD one first one-way conduction cells D 1, the negative pole of described first onunit D1 connects described power output end VDD, preferably, described first onunit D1 is one first diode, or is the structure of multiple Diode series.Also to connect between described node A with described power output end VDD one the one LC loop 31.A described LC loop comprises one first inductance L 1 and the first electric capacity, between the positive pole being connected to described node A and described first unidirectional single-pass cells D 1 after described first inductance L 1 and described first Capacitance parallel connection.Wherein, described first electric capacity is one the 3rd diode D3, and the positive pole of described 3rd diode D3 connects described node A, makes its single-pass direction identical with the conducting direction of described first one-way conduction cells D 1.
To connect between described node A with described earth terminal GND one second one-way conduction cells D 2, the positive pole of described second onunit D2 connects described earth terminal GND, preferably, described second onunit D2 is one second diode, or is the structure of multiple Diode series.Also to connect between described node A with described earth terminal GND one the 2nd LC loop 32.Described 2nd LC loop comprises one second inductance L 2 and the second electric capacity, between the negative pole being connected to described node A and described second unidirectional single-pass cells D 2 after described second inductance L 2 and described second Capacitance parallel connection.Wherein, described second electric capacity is one the 4th diode D4, and the negative pole of described 4th diode D4 connects described node A, makes its single-pass direction identical with the conducting direction of described second one-way conduction cells D 2.
In the present invention, the resonance frequency in a described LC loop 31 is consistent with the center operating frequency of described functional unit 10.The resonance frequency in a described LC loop 31 is ω 1for:
ω 1 = 1 L 1 C 1
Wherein, L 1be the inductance coefficent of described first inductance L 1 in a LC loop 31, C in a LC loop 31 1for the electric capacity of described first electric capacity, be the equivalent capacity of the 3rd diode D3 wherein.In the present embodiment, by the resonance frequency omega in a LC loop 31 1be set as consistent with the center operating frequency of radio circuit 10, make on described I/O pin 20, the impedance of electrostatic discharge protective circuit is approximately infinitely great, and therefore, the radiofrequency signal of radio frequency circuit can not have an impact.
The resonance frequency in described 2nd LC loop 32 is consistent with the center operating frequency of described functional unit 10.The resonance frequency in described 2nd LC loop 32 is ω 2for:
ω 2 = 1 L 2 C 2
Wherein, L 2for the inductance coefficent of the second inductance L 2 described in the 2nd LC loop 32, C in the 2nd LC loop 32 2for the electric capacity of described second electric capacity, be the equivalent capacity of the 4th diode D4 wherein.Same, in the present embodiment, by the resonance frequency omega in the 2nd LC loop 32 2be set as consistent with the center operating frequency of radio circuit 10, make on described I/O pin 20, the impedance of electrostatic discharge protective circuit is approximately infinitely great, and therefore, the radiofrequency signal of radio frequency circuit can not have an impact.
Be understandable that, electric current through a LC loop or the 2nd LC loop, due to the resonance frequency omega in a LC loop 2and the 2nd resonance frequency omega in LC loop 2consistent with the center operating frequency of radio circuit, make impedance on I/O pin 20 infinitely great, for the transmission coefficient of the radiofrequency signal of radio circuit and the impact of noise figure very little.
In the present invention; the connected mode in the first one-way conduction cells D 1 and a described LC loop 31; and second one-way conduction cells D 2 be not limited to above-described with the connected mode in described 2nd LC loop 32; such as; can also be connected between described first one-way conduction cells D 1 and described power output end VDD for a described LC loop 31; described 2nd LC loop 32 is connected between described second one-way conduction cells D 2 and described earth terminal GND, as long as the impact that can reduce electrostatic discharge protective circuit radio frequency circuit is also within protection scope of the present invention.
In addition; the present invention can also an only LC loop 31 between described node A and described power output end VDD; not connect between described node A with described earth terminal GND the 2nd LC loop 32; or the 2nd LC loop 32 of only connecting between described node A with described earth terminal GND; a not LC loop 31 between described node A and described power output end VDD, this is also within the thought range of the present invention's protection.
Clamp circuit 40, described clamp circuit 40 is connected with described power output end VDD and described earth terminal GND.Described clamp circuit 40 comprises diode string structure 41, nmos pass transistor 42.Described diode string structure 41 connects the grid of described power output end VDD and described nmos pass transistor 42.The source electrode of described nmos pass transistor 42 meets described power output end VDD, and the drain electrode of nmos pass transistor 42 meets described earth terminal GND, and, the grid of nmos pass transistor 42 and the indirect one first resistance R1 of drain electrode.In the present invention, described diode string structure 41 can be equivalent to capacitance structure.Described diode string structure 41 comprises the diode of at least three series connection; such as can to connect three, four or five diodes; the number of diode of series connection is more, and the pressure drop on described diode string structure 41 is larger, and makes electrostatic discharge protective circuit can not false triggering.
In the present invention, the drain electrode (N-type) of the source electrode (N-type) of nmos pass transistor, the Semiconductor substrate (P type) of device, nmos pass transistor forms parasitic NPN transistor, and respectively as NPN transistor emitter, base stage, collector electrode.Connect between the base stage of parasitic NPN transistor and the grid of described nmos pass transistor 42 one the 5th diode D5.Be equivalent to a parasitic diode D6 between the base stage of parasitic NPN transistor and the drain electrode 42 of described nmos pass transistor, make clamp circuit 40 form complete diode paths of connecting between power output end VDD with earth terminal GND, be beneficial to the release of electrostatic pulse.
When I/O pin 20 producing the electrostatic pulse of positive charge, electrostatic pulse is along LC loop 31, a first one-way conduction cells D 1, power output end VDD, clamp circuit 40, and be discharged into earth terminal GND, the sense of current is as shown in the arrow of solid line in Fig. 3.Wherein, electrostatic pulse makes the current potential of power output end VDD raise rapidly, then the diode string structure 41 in clamp circuit 40 and the first resistance R1 form loop between power output end and earth terminal GND, the current potential lifting that the first resistance R1 holds, and namely make the grid V of described nmos pass transistor 42 gcurrent potential is raised rapidly, grid potential V ghigher than source potential V s, nmos pass transistor 42 conducting, the raceway groove of nmos pass transistor 42 discharges partial electrostatic pulse, meanwhile, the base potential of parasitic NPN transistor is elevated, the base-emitter positively biased of parasitic NPN transistor, make parasitic NPN transistor conducting, discharge a large amount of electric charges.In clamp circuit 40 in the present invention; conducting trigger NMOS transistor 42 conducting of diode string structure 41; the conducting of nmos pass transistor 42 triggers parasitic NPN transistor conducting; form two trigger architecture, make electrostatic discharge protective circuit have the low feature of response speed block, trigger voltage and the conducting homogeneity of parasitic NPN transistor is better.
When I/O pin 40 producing the electrostatic pulse of negative electrical charge, electrostatic pulse can be directly released into earth terminal GND along the 2nd LC loop 32, second one-way conduction cells D 2, and the sense of current is as shown in dotted arrow in Fig. 3.
In sum, electrostatic discharge protective circuit of the present invention, when I/O pin produces electrostatic pulse, electrostatic pulse is discharged into earth terminal by a LC loop, power output end, clamp circuit, or is directly released into earth terminal by the 2nd LC loop.The LC loop adopted and the 2nd LC loop make electrostatic discharge protective circuit can not have an impact to the radiofrequency signal of functional unit.Adopt two trigger architectures of nmos pass transistor and parasitic NPN transistor in clamp circuit, such that response speed block, trigger voltage are low, conducting homogeneity is better.
Obviously, those skilled in the art can carry out various change and modification to the present invention and not depart from the spirit and scope of the present invention.Like this, if these amendments of the present invention and modification belong within the scope of the claims in the present invention and equivalent technologies thereof, then the present invention is also intended to comprise these change and modification.

Claims (15)

1. an electrostatic discharge protective circuit, is characterized in that, comprising:
I/O pin, power output end, earth terminal, functional unit and clamp circuit, described functional unit is connected with described power output end and described earth terminal respectively, described clamp circuit is connected with described power output end and described earth terminal, described functional unit is connected with described I/O pin by a node, connect between described node with described power output end one first one-way conduction unit, described node is connected with described earth terminal one second one-way conduction unit; Wherein
Also to connect between described node with described power output end one the one LC loop; Or
Also to connect between described node with described earth terminal one the 2nd LC loop; Or
To connect between described node with described power output end a described LC loop, and described 2nd LC loop of connecting between described node with described earth terminal.
2. electrostatic discharge protective circuit as claimed in claim 1; it is characterized in that; described clamp circuit comprises diode string structure, nmos pass transistor; described diode string structure connects the grid of described power output end and described nmos pass transistor; the source electrode of described nmos pass transistor connects described power output end, and the drain electrode of described nmos pass transistor connects described earth terminal.
3. electrostatic discharge protective circuit as claimed in claim 2, is characterized in that, series connection one first resistance between the grid of described nmos pass transistor and drain electrode.
4. electrostatic discharge protective circuit as claimed in claim 2, is characterized in that, described diode string structure comprises the diode of at least three series connection.
5. as the electrostatic discharge protective circuit in Claims 1-4 as described in any one, it is characterized in that, the negative pole of described first one-way conduction unit connects described power output end.
6. electrostatic discharge protective circuit as claimed in claim 5, it is characterized in that, described first one-way conduction unit is one first diode.
7. electrostatic discharge protective circuit as claimed in claim 5; it is characterized in that; a described LC loop comprises one first inductance and one first electric capacity, between the positive pole being connected to described node and described first unidirectional single-pass unit after described first inductance and described first Capacitance parallel connection.
8. electrostatic discharge protective circuit as claimed in claim 7, it is characterized in that, described first electric capacity is one the 3rd diode, and described 3rd diode cathode connects described node.
9. as the electrostatic discharge protective circuit in Claims 1-4 as described in any one, it is characterized in that, the positive pole of described second one-way conduction unit connects described earth terminal.
10. electrostatic discharge protective circuit as claimed in claim 8, it is characterized in that, described second one-way conduction unit is one second diode.
11. electrostatic discharge protective circuits as claimed in claim 8; it is characterized in that; described 2nd LC loop comprises one second inductance and one second electric capacity, between the negative pole being connected to described node and described second unidirectional single-pass unit after described second inductance and described second Capacitance parallel connection.
12. electrostatic discharge protective circuits as claimed in claim 11, is characterized in that, described second electric capacity is one the 4th diode, and described 4th diode cathode connects described node.
13., as the electrostatic discharge protective circuit in Claims 1-4 as described in any one, is characterized in that, described functional unit is a radio circuit with a center operating frequency.
14., as the electrostatic discharge protective circuit in claim 13 as described in any one, is characterized in that, the resonance frequency in a described LC loop is consistent with the center operating frequency of described functional unit.
15., as the electrostatic discharge protective circuit in claim 13 as described in any one, is characterized in that, the resonance frequency in described 2nd LC loop is consistent with the center operating frequency of described functional unit.
CN201510005039.7A 2015-01-06 2015-01-06 Electrostatic protection circuit Pending CN104578034A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN201510005039.7A CN104578034A (en) 2015-01-06 2015-01-06 Electrostatic protection circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN201510005039.7A CN104578034A (en) 2015-01-06 2015-01-06 Electrostatic protection circuit

Publications (1)

Publication Number Publication Date
CN104578034A true CN104578034A (en) 2015-04-29

Family

ID=53093507

Family Applications (1)

Application Number Title Priority Date Filing Date
CN201510005039.7A Pending CN104578034A (en) 2015-01-06 2015-01-06 Electrostatic protection circuit

Country Status (1)

Country Link
CN (1) CN104578034A (en)

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN105552872A (en) * 2015-12-18 2016-05-04 锐迪科创微电子(北京)有限公司 ESD (electrostatic discharge) protection circuit
CN107204611A (en) * 2016-03-16 2017-09-26 帝奥微电子有限公司 Overvoltage protection structure
WO2020001599A1 (en) * 2018-06-30 2020-01-02 唯捷创芯(天津)电子技术股份有限公司 Surge protection device and chip constituted by same, and communication terminal
CN113839374A (en) * 2021-11-29 2021-12-24 珠海市杰理科技股份有限公司 ESD power protection circuit, working power supply and chip

Citations (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20040075964A1 (en) * 2002-10-21 2004-04-22 Ming-Dou Ker Electrostatic discharge protection device for giga-hertz radio frequency integrated circuits with varactor-LC tanks
CN1662113A (en) * 2004-02-27 2005-08-31 联华电子股份有限公司 Protective circuit of electrostatic discharge suitable to integrated circuit in radio frequency
US20060027872A1 (en) * 2004-08-05 2006-02-09 Shiao-Shien Chen Electrostatic discharge protection device
CN1822501A (en) * 2005-02-14 2006-08-23 三星电子株式会社 Static discharge voltage-free high input voltage endurable input/output circuit
CN100514859C (en) * 2004-08-20 2009-07-15 恩益禧电子股份有限公司 Semiconductor device
US20110013438A1 (en) * 2009-07-20 2011-01-20 Michael Frisch inverter topologies usable with reactive power
US20120099228A1 (en) * 2010-10-20 2012-04-26 Taiwan Semiconductor Manufacturing Co., Ltd. Esd protection for rf circuits
CN102646970A (en) * 2012-03-21 2012-08-22 敦泰科技有限公司 Power supply clamping circuit
CN103219720A (en) * 2012-08-29 2013-07-24 晶焱科技股份有限公司 Power strangulation electrostatic discharge protection circuit
CN104253126A (en) * 2013-06-28 2014-12-31 瑞萨电子株式会社 ESD protection circuit, semiconductor device, on-vehicle electronic device, and on-vehicle electronic system

Patent Citations (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20040075964A1 (en) * 2002-10-21 2004-04-22 Ming-Dou Ker Electrostatic discharge protection device for giga-hertz radio frequency integrated circuits with varactor-LC tanks
CN1662113A (en) * 2004-02-27 2005-08-31 联华电子股份有限公司 Protective circuit of electrostatic discharge suitable to integrated circuit in radio frequency
US20060027872A1 (en) * 2004-08-05 2006-02-09 Shiao-Shien Chen Electrostatic discharge protection device
CN100514859C (en) * 2004-08-20 2009-07-15 恩益禧电子股份有限公司 Semiconductor device
CN1822501A (en) * 2005-02-14 2006-08-23 三星电子株式会社 Static discharge voltage-free high input voltage endurable input/output circuit
US20110013438A1 (en) * 2009-07-20 2011-01-20 Michael Frisch inverter topologies usable with reactive power
US20120099228A1 (en) * 2010-10-20 2012-04-26 Taiwan Semiconductor Manufacturing Co., Ltd. Esd protection for rf circuits
CN102646970A (en) * 2012-03-21 2012-08-22 敦泰科技有限公司 Power supply clamping circuit
CN103219720A (en) * 2012-08-29 2013-07-24 晶焱科技股份有限公司 Power strangulation electrostatic discharge protection circuit
CN104253126A (en) * 2013-06-28 2014-12-31 瑞萨电子株式会社 ESD protection circuit, semiconductor device, on-vehicle electronic device, and on-vehicle electronic system

Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN105552872A (en) * 2015-12-18 2016-05-04 锐迪科创微电子(北京)有限公司 ESD (electrostatic discharge) protection circuit
CN107204611A (en) * 2016-03-16 2017-09-26 帝奥微电子有限公司 Overvoltage protection structure
WO2020001599A1 (en) * 2018-06-30 2020-01-02 唯捷创芯(天津)电子技术股份有限公司 Surge protection device and chip constituted by same, and communication terminal
CN113839374A (en) * 2021-11-29 2021-12-24 珠海市杰理科技股份有限公司 ESD power protection circuit, working power supply and chip
CN113839374B (en) * 2021-11-29 2022-03-04 珠海市杰理科技股份有限公司 ESD power protection circuit, working power supply and chip

Similar Documents

Publication Publication Date Title
CN104319275B (en) Electrostatic discharge protection circuit
CN101039027B (en) Improved electrostatic discharge protecting circuit
EP2526618B1 (en) HIGH VOLTAGE, HIGH FREQUENCY ESD PROTECTION CIRCUIT FOR RF ICs
CN102195280B (en) Electro-static discharge protection circuit and semiconductor device
CN104517957B (en) Static discharge (ESD) circuit
CN102204087A (en) Amplifier with improved ESD protection circuitry
CN104578034A (en) Electrostatic protection circuit
CN104867910A (en) Electrostatic discharge protection circuit and semiconductor device
CN102263102B (en) Backward diode-triggered thyristor for electrostatic protection
CN103646945A (en) Integrated circuit power supply esd protection circuit
CN102769284B (en) Small-size electrostatic discharge protection circuit in radio frequency power amplifier
US10270244B2 (en) Electrostatic discharge protection circuit
JP2011049559A (en) Method of providing wideband esd protection, and circuit obtained by the same
CN101383507A (en) Electro-static discharging protection circuit
CN108321781A (en) A kind of esd protection circuit and the integration module based on GaAs PHEMT techniques
CN103646944A (en) Double-mode electro-static discharge protection IO circuit
CN103247697B (en) Decoupling capacitor and there is the integrated circuit of this decoupling capacitor
CN104319271A (en) CDM (Charged-Device-Model) electrostatic protection circuit
CN102227808A (en) Esd protection
CN102779818A (en) Electrostatic protection circuit for radio-frequency identification tag
CN100477215C (en) Semiconductor apparatus
CN104914287B (en) A kind of tension measuring circuit
CN114747109B (en) ESD protection circuit
CN104242280A (en) Electrostatic protection circuit
CN103199090A (en) Electrostatic protective circuit and battery protective circuit thereof

Legal Events

Date Code Title Description
C06 Publication
PB01 Publication
C10 Entry into substantive examination
SE01 Entry into force of request for substantive examination
RJ01 Rejection of invention patent application after publication
RJ01 Rejection of invention patent application after publication

Application publication date: 20150429