CN101383507A - Electro-static discharging protection circuit - Google Patents
Electro-static discharging protection circuit Download PDFInfo
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- CN101383507A CN101383507A CNA2007101456100A CN200710145610A CN101383507A CN 101383507 A CN101383507 A CN 101383507A CN A2007101456100 A CNA2007101456100 A CN A2007101456100A CN 200710145610 A CN200710145610 A CN 200710145610A CN 101383507 A CN101383507 A CN 101383507A
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Abstract
The invention relates to a static discharge protecting circuit which is connected between a positive voltage source and a joint pad. The static discharge protecting circuit comprises a row of equidirectional and serial diodes, a resistor and a transistor, wherein an anode and a cathode are arranged at two ends of each diode, and the cathode is connected with the joint pad; the resistor is connected between the positive voltage source and the anodes of the serial diodes; a grid pole and a source pole of the transistor are connected to the positive voltage source, a drain pole of the transistor is connected to the joint pad, and a basal pole of the transistor is connected to the anode of the serial diode. Compared with the prior art, the invention has simple circuit structure, lower and adjustable trigger voltage and more effective static discharge protecting property.
Description
Technical field
The present invention relates to a kind of electrostatic storage deflection (ESD) protection circuit.
Background technology
In complementary metal-oxide field-effect semiconductor (MOSFET) integrated circuit, static discharge (Electrostatic Discharge) phenomenon has caused the concern that people are vast.In miscellaneous electrostatic discharge protection component, Gated MOSFET is because its protective capacities is preferable, and design simply is subjected to numerous designers' favor.Fig. 1 is the circuit diagram of a kind of Gated of use MOSFET as electrostatic discharge protection component, and wherein the output electrostatic storage deflection (ESD) protection circuit can be replaced by the output buffering (output buffer) of circuit itself.With electrostatic storage deflection (ESD) protection circuit shown in Figure 1 is example, when carrying out electrostatic discharge testing, wherein test combination PS (is that joint sheet 5 places connect forward voltage, VSS6 ground connection, the electrostatic discharge testing mode that other knot pin suspend) and ND (be that joint sheet 5 places connect negative voltage, positive voltage source VDD4 ground connection, the electrostatic discharge testing mode that other knot pin suspend) the electrostatic discharge protective voltage of gained is lower, thereby has limited the electro-static discharge protective ability of entire circuit system (chip).This is because under the PS test pattern, the device that plays main electrostatic discharge protective effect is Gated NMOS, it mainly is to use the big electric current that parasitic triode comes the conduct static discharge to be produced, wherein its trigger voltage value (trigger voltage) is approximately the reverse breakdown voltage value of N+/P well diode, and this value is subjected to the restriction of different technological processes.In like manner, under the ND test pattern, the trigger voltage of electrostatic discharge protection component Gated PMOS also is subjected to the restriction of different process flow process.
In more and more advanced semiconductor technology processing procedure (for example 0.15um, 0.13um, 90nm etc.), supply voltage value is more and more lower, and thickness of grid oxide layer is more and more thinner, and its puncture voltage is also more and more lower.Make circuit need the trigger voltage value in more accurate electrostatic discharge protective loop like this, and also more and more higher to its requirement.How reducing designer's design complexities, simultaneously by reducing the electro-static discharge protective ability that trigger voltage improves device, is the technical problem that is faced at present.
Summary of the invention
At the defective of above prior art, the purpose of this invention is to provide a kind of electrostatic storage deflection (ESD) protection circuit, this electrostatic storage deflection (ESD) protection circuit simplicity of design has lower and regulatable trigger voltage, has more effective static discharge protecting property simultaneously.
Above-mentioned purpose and other purposes based on the present invention, the present invention proposes a kind of electrostatic storage deflection (ESD) protection circuit, and it is connected between positive voltage source VDD and the joint sheet, and this electrostatic storage deflection (ESD) protection circuit comprises: a row series aiding connection diode, two ends have a positive pole and negative pole, and its negative pole is connected in joint sheet; One resistance is connected between the positive pole of positive voltage source VDD and this row series diode; One PMOS transistor, its grid and source electrode are connected to positive voltage source VDD, and drain electrode is connected to joint sheet, and base stage is connected to the positive pole of this row series diode.
Described resistance is transistorized dead resistance of PMOS or additional resistance.
The present invention also proposes a kind of electrostatic storage deflection (ESD) protection circuit, is connected between joint sheet and the earth terminal VSS, and this electrostatic storage deflection (ESD) protection circuit comprises: a row series aiding connection diode, and two ends have a positive pole and negative pole, and its positive pole is connected in joint sheet; One resistance is connected between the negative pole and earth terminal VSS of this row series diode; One nmos pass transistor, its grid and source electrode are connected to earth terminal VSS, and drain electrode is connected to joint sheet, and base stage is connected to the negative pole of this row series diode.
Described resistance is the dead resistance or the additional resistance of nmos pass transistor.
More than two kinds of electrostatic storage deflection (ESD) protection circuit can be used for electrostatic discharge protective between input, output and/or the power supply.
Adopt technical scheme of the present invention, make of the number decision of transistorized trigger voltage by series diode, so simplicity of design can make trigger voltage value be lower than the reverse breakdown voltage of P+/N trap or N+/P n in design process, has so just improved its electro-static discharge protective ability greatly.Compared with prior art, adopt circuit structure of the present invention to have lower regulatable trigger voltage, and have more effective static discharge protecting property.
Below in conjunction with accompanying drawing, the specific embodiment of the present invention is described in further detail.For the person of ordinary skill in the field, to the detailed description of the invention, above-mentioned and other purpose of the present invention, feature and advantage will be apparent.
Description of drawings
Fig. 1 is the electrostatic storage deflection (ESD) protection circuit schematic diagram of prior art;
Fig. 2 A is the electrostatic storage deflection (ESD) protection circuit schematic diagram of first embodiment of the invention;
Fig. 2 B is the electrostatic storage deflection (ESD) protection circuit working state schematic representation of first embodiment of the invention;
Fig. 3 A is the electrostatic storage deflection (ESD) protection circuit schematic diagram of second embodiment of the invention;
Fig. 3 B is the electrostatic storage deflection (ESD) protection circuit working state schematic representation of second embodiment of the invention;
Fig. 4 for the rapid return characteristic curve ratio of transistor in the electrostatic storage deflection (ESD) protection circuit of the present invention and prior art than schematic diagram.
Fig. 5 is the schematic diagram of the electrostatic storage deflection (ESD) protection circuit of another preferred embodiment of the present invention;
Embodiment
The present invention will be further described below in conjunction with accompanying drawing.
Fig. 2 A is the electrostatic storage deflection (ESD) protection circuit of first embodiment of the invention, it comprises: a row series aiding connection diode 11, its number can be 4, also can be other number that is fit to arbitrarily, decides according to designer's requirement, do not limit herein, the two ends of this row series diode 11 have a positive pole and negative pole, and its negative pole is connected in joint sheet 5, and this joint sheet 5 can be input or output, perhaps earth terminal does not limit herein; One resistance 12 is connected between the positive pole of positive voltage source VDD4 and this row series diode 11, and dead resistance or additional resistance that this resistance 12 can be PMOS transistor 131 do not limit herein; One PMOS transistor 131, its grid and source electrode are connected to positive voltage source VDD4, and drain electrode is connected to joint sheet 5, and base stage is connected to the positive pole of this row series diode 11.Shown in Fig. 2 B, suppose that joint sheet 5 place's negative value are V1, when voltage difference (VDD-V1) makes series diode 11 forward conductions (its turn-on voltage is subjected to the control of series diode number), to produce electric current I 1 this moment, the electric current I 1 of resistance 12 of flowing through will make the GatedPMOS underlayer voltage change, thereby make parasitic triode P+N trap/P+ conducting, and then discharging static discharge current.Because the trigger voltage of total so can make trigger voltage value be lower than the reverse breakdown voltage of P+N n, has so just improved electro-static discharge protective ability by the number decision of series diode greatly in design process.
Fig. 3 A is the electrostatic storage deflection (ESD) protection circuit of the second embodiment of the present invention, it comprises: a row series aiding connection diode 21, its number can be 4, also can be other number that is fit to arbitrarily, decides according to designer's requirement, do not limit herein, the two ends of this row series diode 21 have a positive pole and negative pole, and its positive pole is connected in joint sheet 5, and this pad 5 can be input or output, perhaps the positive voltage source end does not limit herein; One resistance 22 is connected between the negative pole and earth terminal VSS6 of this row series diode 21, and dead resistance or additional resistance that this resistance 22 can be nmos pass transistor 232 do not limit herein; One nmos pass transistor 232, its grid and source electrode are connected to earth terminal VSS6, and drain electrode is connected to joint sheet 5, and base stage is connected to the negative pole of this row series diode 21.Shown in Fig. 3 B, suppose that joint sheet 5 place's negative value are V2, when voltage difference (V2-VSS) makes series diode 21 forward conductions (its turn-on voltage is subjected to the control of series diode number), to produce electric current I 2 this moment, the electric current I 2 of resistance 22 of flowing through will make the GatedNMOS underlayer voltage change, thereby make parasitic triode N+/P trap/N+ conducting, and then discharging static discharge current.Because the trigger voltage of total so can make trigger voltage be lower than the reverse breakdown voltage of N+/P n, has so just improved its electro-static discharge protective ability by the number decision of series diode greatly in design process.As shown in Figure 4, the rapid return characteristic of former protecting component for electrostatic discharge (snap back) curve is shown in solid line among the figure, the rapid return characteristic of the protecting component for electrostatic discharge of present embodiment can see that present embodiment has lower trigger voltage and has more effective static discharge protecting property (t2 is bigger for the second breakdown electric current I) as shown in phantom in FIG..
First and second embodiment of the present invention can be separately or in conjunction with the electrostatic discharge protective that is used between input, output and power supply.Fig. 5 is the electrostatic storage deflection (ESD) protection circuit of another preferred embodiment.This electrostatic storage deflection (ESD) protection circuit combination comprises: one first row series aiding connection diode 11, and two ends have a positive pole and negative pole, and its negative pole is connected in input joint sheet 5; One first resistance 12 is connected between the positive pole of positive voltage source VDD4 and this first row series diode 11; One the first transistor PMOS transistor 131, its grid and source electrode are connected to positive voltage source VDD4, and drain electrode is connected to input joint sheet 5, and base stage is connected to the positive pole of this first row series diode 11; One secondary series series aiding connection diode 21, two ends have a positive pole and negative pole, and its positive pole is connected in input joint sheet 5; One second resistance 22 is connected between the negative pole and earth terminal VSS6 of this secondary series series diode 21; One transistor seconds nmos pass transistor 232, its grid and source electrode are connected to earth terminal VSS6, and drain electrode is connected to input joint sheet 5, and base stage is connected to the negative pole of this secondary series series diode 21; One the 3rd row series aiding connection diode 31, two ends have a positive pole and negative pole, and its positive pole is connected in positive voltage source VDD4; One the 3rd resistance 32 is connected between the negative pole and earth terminal VSS6 of the 3rd row series diode 31; One the 3rd transistor nmos pass transistor 332, its grid and source electrode are connected to earth terminal VSS6, and drain electrode is connected to positive voltage source VDD4, and base stage is connected to the negative pole of the 3rd row series diode 31.
Wherein, the number of the first row series diode 11, secondary series series diode 21, the 3rd row series diode 31 can be 4, also can be other number that is fit to arbitrarily, decides according to designer's requirement, does not limit herein.Because the number of series diode can change according to designer's requirement, make trigger voltage value to adjust lowlyer as required, thereby under normal operating voltage, electrostatic discharge protection component is in masked state, in case joint sheet 5 place's voltages or electric current big fluctuation conducting in time take place to stop it to inner damage of circuit.
Certainly; the present invention also can have other embodiment; under the situation of spirit that does not deviate from the present invention and essence; the person of ordinary skill in the field works as can make various corresponding changes and distortion according to the present invention, but these corresponding changes and distortion all should belong to the protection range of claim of the present invention.
Claims (4)
1. an electrostatic storage deflection (ESD) protection circuit is connected between positive voltage source and the joint sheet, it is characterized in that, comprising:
The diode of one row series aiding connection, two ends have a positive pole and negative pole, and its negative pole is connected in joint sheet;
One resistance is connected between the positive pole of positive voltage source and this row series diode;
One PMOS transistor, its grid and source electrode are connected to positive voltage source, and drain electrode is connected to joint sheet, and base stage is connected to the positive pole of this row series diode.
2. a kind of electrostatic storage deflection (ESD) protection circuit according to claim 1 is characterized in that, described resistance is transistorized dead resistance of PMOS or additional resistance.
3. an electrostatic storage deflection (ESD) protection circuit is connected between joint sheet and the earth terminal, it is characterized in that, comprising:
One row series aiding connection diode, two ends have a positive pole and negative pole, and its positive pole is connected in joint sheet;
One resistance is connected between the negative pole and earth terminal of this row series diode;
One nmos pass transistor, its grid and source electrode are connected to earth terminal, and drain electrode is connected to joint sheet, and base stage is connected to the negative pole of this row series diode.
4. a kind of electrostatic storage deflection (ESD) protection circuit according to claim 3 is characterized in that, described resistance is the dead resistance or the additional resistance of nmos pass transistor.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CNA2007101456100A CN101383507A (en) | 2007-09-03 | 2007-09-03 | Electro-static discharging protection circuit |
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| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CNA2007101456100A CN101383507A (en) | 2007-09-03 | 2007-09-03 | Electro-static discharging protection circuit |
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| CN101383507A true CN101383507A (en) | 2009-03-11 |
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| CNA2007101456100A Pending CN101383507A (en) | 2007-09-03 | 2007-09-03 | Electro-static discharging protection circuit |
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Cited By (8)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN101834183A (en) * | 2010-04-23 | 2010-09-15 | 崇贸科技股份有限公司 | Semiconductor structure |
| CN104052030B (en) * | 2013-03-15 | 2017-08-15 | 国际商业机器公司 | Excess voltage protection |
| EP3309836A1 (en) * | 2016-10-12 | 2018-04-18 | eMemory Technology Inc. | Electrostatic discharge circuit |
| CN108335681A (en) * | 2018-02-13 | 2018-07-27 | 京东方科技集团股份有限公司 | It is a kind of for the antistatic unit of thin film transistor (TFT), driving circuit and display device |
| CN109286181A (en) * | 2017-07-21 | 2019-01-29 | 上海韦玏微电子有限公司 | Power clamp ESD protective circuit |
| CN109979933A (en) * | 2017-12-28 | 2019-07-05 | 禾瑞亚科技股份有限公司 | Applied to the electrostatic discharge protection element structure in CMOS processing procedure |
| CN110023746A (en) * | 2016-12-02 | 2019-07-16 | 索尼半导体解决方案公司 | Semiconductor device and potential test device |
| CN111742618A (en) * | 2018-02-28 | 2020-10-02 | 赤多尼科两合股份有限公司 | Ripple suppression circuit, control method and driving apparatus |
-
2007
- 2007-09-03 CN CNA2007101456100A patent/CN101383507A/en active Pending
Cited By (12)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN101834183A (en) * | 2010-04-23 | 2010-09-15 | 崇贸科技股份有限公司 | Semiconductor structure |
| CN101834183B (en) * | 2010-04-23 | 2012-02-01 | 崇贸科技股份有限公司 | Semiconductor structure |
| CN104052030B (en) * | 2013-03-15 | 2017-08-15 | 国际商业机器公司 | Excess voltage protection |
| EP3309836A1 (en) * | 2016-10-12 | 2018-04-18 | eMemory Technology Inc. | Electrostatic discharge circuit |
| CN110023746A (en) * | 2016-12-02 | 2019-07-16 | 索尼半导体解决方案公司 | Semiconductor device and potential test device |
| CN110023746B (en) * | 2016-12-02 | 2022-11-18 | 索尼半导体解决方案公司 | Semiconductor device and potential measuring device |
| CN109286181A (en) * | 2017-07-21 | 2019-01-29 | 上海韦玏微电子有限公司 | Power clamp ESD protective circuit |
| CN109979933A (en) * | 2017-12-28 | 2019-07-05 | 禾瑞亚科技股份有限公司 | Applied to the electrostatic discharge protection element structure in CMOS processing procedure |
| CN109979933B (en) * | 2017-12-28 | 2021-05-28 | 禾瑞亚科技股份有限公司 | Electrostatic discharge protection element structure applied in CMOS process |
| CN108335681A (en) * | 2018-02-13 | 2018-07-27 | 京东方科技集团股份有限公司 | It is a kind of for the antistatic unit of thin film transistor (TFT), driving circuit and display device |
| CN108335681B (en) * | 2018-02-13 | 2021-05-25 | 京东方科技集团股份有限公司 | Anti-static unit for thin film transistor, driving circuit and display device |
| CN111742618A (en) * | 2018-02-28 | 2020-10-02 | 赤多尼科两合股份有限公司 | Ripple suppression circuit, control method and driving apparatus |
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Open date: 20090311 |