CN101416286A - 以多退火步骤形成氮氧化硅栅极介电层的方法 - Google Patents

以多退火步骤形成氮氧化硅栅极介电层的方法 Download PDF

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CN101416286A
CN101416286A CNA2007800124430A CN200780012443A CN101416286A CN 101416286 A CN101416286 A CN 101416286A CN A2007800124430 A CNA2007800124430 A CN A2007800124430A CN 200780012443 A CN200780012443 A CN 200780012443A CN 101416286 A CN101416286 A CN 101416286A
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silicon oxynitride
oxynitride film
milli
oxygen
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C·S·奥尔森
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Applied Materials Inc
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Abstract

所揭示的为一种在处理室中处理半导体基材的方法，包括利用一种两－步骤退火的工艺来形成氧氮化硅膜层。第一退火步骤包括在分压约1～100毫托耳的氧化气体下将该氧氮化硅膜退火，且第二退火步骤包括在流速约1slm的氧气下将该氧氮化硅膜退火。第一退火步骤是在比第二退火步骤更高温且更高压力下实施。

Description

以多退火步骤形成氮氧化硅栅极介电层的方法
技术领域
本发明实施方案大致是有关形成氧氮化硅膜层的半导体处理。更详细地说，本发明是有关一种用来形成氧氮化硅膜层的方法，其是利用包含等离子氮化以及一种两-步骤退火的工艺来完成。
背景技术
随着集成电路和晶体管的组件几何尺寸日渐缩减，所需用以驱动晶体管栅极的电流也日益升高。已知晶体管的栅极驱动电流会随其栅极电容增加而增加，且栅极电容等于k×A/d，其中k是该栅极介电质(通常是二氧化硅)的介电常数，d是该介电质的厚度，且A是栅极接点面积。因此，降低介电质的厚度与提高栅极介电质的介电常数是两种可用来提高栅极电容与驱动电流的方式。
已有人尝试减少介电质的厚度，例如降低二氧化硅层的厚度到以下。但是，使用厚度低于的二氧化硅介电质经常会造成效能不佳及耐用性降低。举例来说，在掺有硼的电极中，硼原子会从电极渗出穿过薄的二氧化硅介电质而进入其下方的硅基材中。此外，还会出现不乐见的栅极漏电流(即，通道电流(channel current))现象，因而增加栅极的耗电量。薄二氧化硅栅极介电质也较易受到负型通道金氧半导体(negative-channelmetal-oxide semiconductor，NMOS)热载子裂变、以及正型通道金氧半导体(NMOS)负偏压温度不稳(negative bias temperature instability，NBTI)定现象的影响。
将二氧化硅层氮化已是习用以降低二氧化硅介电质厚度到以下的方法。以等离子氮化将氮原子并入至栅极氧化物中。氮化可在电极/氧化物界面中提供高浓度的氮原子。此界面中高浓度的氮原子可防止硼原子渗透进入栅极氧化物中。相反的，该栅极氧化物块材在等离子氮化过程中。仅掺杂有微量的氮原子。块材中低量的氮原子导致膜层具有较原来氧化物膜层厚度为低的等效氧化物层厚度(equivalent oxide thickness，EOT)，因而可减少栅极漏电流。较佳是提供一种EOT<
Figure A200780012443D0006101712QIETU
的介电质。
氮化后将氧氮化硅膜层退火可改善通道电子的迁移力，但代价是会造成EOT上升，此可在传统氧氮化硅膜层退火过程中执行尖峰瞬间导电度量测中观察到。相对于在较高EOT厚度下，通道电子的迁移力在较低EOT厚度下的裂变较快。此外，较高的EOT值也会降低传统退火的氧氮化硅膜层的驱动电流，因此，需要一种可使膜层具有欲求的通道电子迁移力、驱动电流和EOT的退火工艺。
发明内容
本发明提供一种用以形成具有欲求的通道电子迁移力和驱动电流的氧氮化硅薄层的制备方法。依据本发明一实施方案，该方法包括以1～100毫托耳的氧化气体(其可为氧气、氧化二氮或氧化氮)将氧氮化硅层退火，和以约1slm的氧气将该氧氮化硅层退火。以1～100毫托耳的氧化气体将氧氮化硅层退火的步骤，是在较以约1slm的氧气将该氧氮化硅层退火的步骤所需的更高温度与更高压力下进行。
附图说明
图1为用以处理半导体基材的群集工具的分解示意图。
图2为用以形成一种氧氮化硅膜层的方法流程图。
图3为以各种处理条件(其是在两步骤处理的两个步骤中均包括有氧气)所形成的膜层的有效氧化物厚度与饱和驱动电流的关系。
主要组件符号说明
100      群集工具               102、104      负载锁定室
106、108       快速热退火或处理室
110            去耦合等离子氮室          112     沉积室
114            冷却室                    116     基材处理工具
118            基材                      200     方法
202、208       步骤                      204     第一步骤
206            第二步骤
具体实施方式
在阅读过以下包括附图及申请专利范围的详细说明后，将可更了解本发明上述特征。但须知，本发明范畴并不仅限于所揭示实施例中。
图1为一群集工具100的示意图，用以依据本发明各种实施方案来处理半导体基材。此群集工具100的实例的一为应用材料公司出品的GATESTACK CENTU RATM群集工具。此群集工具100包括负载锁定室102、104，快速热退火或处理室(rapid thermal anneal or process，RTP)106、108，去耦合等离子氮化(decoupled plasma nitridation，DPN)室110，沉积室112，及冷却室114。此群集工具100也包括一用来传送基材118进出一特定处理室的基材处理工具116。
基材处理工具116位在一与其周围各处理室连通的中央传送室中。欲处理的基材是位在负载锁定室102、104中。沉积室112是一种化学或物理气相沉积室，其可被用来在一半导体基材上形成一膜或一层。
RTP处理室106、108可用来在减压下(例如，约等于或小于10托耳)执行快速热处理。可用的RTP处理室实例包括应用材料公司出品的RADIANCE XETM、RADIANCE XE PLUSTM和RADIANCETM RTP。、
图2为用来形成一退火的氧氮化硅层的方法200的流程图。一开始，先处理一基板以于该基板表面上形成一层氧化硅层。接着，在步骤202中，以一诸如热氮化或等离子氮化的类的氮化工艺来处理该氧化硅层，以形成一层氧氮化硅层。使用等离子氮化工艺来形成氧氮化硅层的方法揭示在2003年6月12日提申的美国专利申请案10/461,143中，其全文在此并入作为参考。
待形成氧氮化硅层后，让该氧氮化硅层经歴一种两-步骤式的退火处理。此退火处理的第一步骤204是在一处理室压约为100毫托耳至800托耳间，约700℃或更高温度下实施约1～120秒。此退火处理的第一步骤204可以在含有一惰性、还原、氧化或上述的混合的气体环境下实施。适合的惰性气体包括氮气、氦气及氩气。适合的还原气体包括氢气。适合的氧化气体包括氧气、氧化二氮、氧化氮及臭氧。上述这些气体的混合气体包括由氮气与氧气组成的混合气体。
氧气流速是以分压表示，至于其它压力则是由流入处理室中的其它气体(例如，氮气)分压来平衡。当提供氧气时，须选择氧气流速使其可提供约1～100毫托耳的氧气分压。如果第一退火步骤是在约1000℃下实施，则此氧气分压较佳是在约1～15毫托耳的氧气间。如果第一退火步骤是在约1050℃下实施，则此氧气分压较佳是在约10～50毫托耳的氧气间。如果第一退火步骤是在约1100℃下实施，则此氧气分压较佳是在约75～200毫托耳间。一般并不乐见在第一退火步骤添加太多的氧气，因为可能会造成过度氧化。
为比较由数种以各流速的氮气与氧气组成的组合在三种不同热退火温度下所形成的膜层性质，而观察并纪录饱和驱动电流(其是为栅极电流密度的函数)。对一使用约10～50毫托耳氧气的工艺来说，当其第一退火步骤是在1050℃下实施时，其最大饱和驱动电流出现在栅极电流密度为100mA/mm2时。
该退火处理的第二步骤206是在约10～100毫托耳的较低压力及约900～1100℃温度下实施。该第二退火步骤206是实施约1～120秒。可控制该第二步骤206使其能增加氧氮化硅层EOT约
Figure A200780012443D0008101809QIETU
。可将氧气及其它氧化气体引入至RTP室。氧化气体包括氧气、氧化二氮、氧化氮及臭氧。在一较佳的该第二退火步骤206中，以可提供约0.5～3.0托耳的氧气分压的速率将氧气流入处理室中约15秒。举例，可使用约1slm的速率来提供此范围的氧气分压。
在第二退火步骤206之后，可在该群集工具的另一处理室内形成一帽盖层于氧氮化硅层表面上(步骤208)。可在该群集工具内执行其它额外的处理或是将基板转移至其另一工具中。
图3为以各种处理条件(包括本发明实施例的处理条件)所形成的膜层的有效氧化物厚度与饱和驱动电流的关系。空心圆圈代表在1000℃下以0.5托耳氧气(每一影化步骤中其余气体部份均为氮气)实施15秒的一步骤退火，实心圆圈则代表在1000℃下以氮气实施15秒的第一退火步骤加上以0.5托耳氧气实施15秒的第二退火步骤。实心三角形代表在1000℃下以氮气实施45秒的第一退火步骤加上以0.5托耳氧气实施15秒的第二退火步骤。至于实心方形则代表在950℃下以氮气实施45秒的第一退火步骤加上以0.5托耳氧气实施15秒的第二退火步骤。依据这些结果，本发明中两步骤的退火处理结果远较一步骤的退火处理来得优异。此外，较佳是在两步骤退火处理的第一步骤同时使用氧气和氮气。但是，须知这是较佳实施例，本发明尚涵盖其它实施方案。
依据本发明实施方案，可观察到以各种工艺条件形成的膜层，其氧气分压为温度的函数。相较于不使用氧气的第一退火步骤于1000℃、1050℃、及1100℃所形成的组件而言，使用氧气在第一退火步骤中所形成的大部份组件比较能被接受。这些结果显示，相较于不在退火期间添加氧气的组件来说，于高温下实施的第一退火步骤期间添加氧气可提供更多无缺陷的组件。
虽然本发明已揭示如上，习知技艺人士应知在不悖离本发明精神范畴下，仍可对本发明技术作多种改良与修饰，这些改良与修饰仍应被视为涵盖在权利要求中。

Claims (20)

1.一种用以处理半导体基材的方法，包含：
形成氧氮化硅膜层；
在分压约1～100毫托耳的氧化气体存在下，将该氧氮化硅膜层退火；及
以分压约0.5～3.0托耳的氧气，将该氧氮化硅膜层退火。
2.如权利要求1所述的方法，其中该形成氧氮化硅膜层的步骤以等离子氮化来实施。
3.如权利要求1所述的方法，其中该在分压约1～100毫托耳的氧化气体存在下将该氧氮化硅膜层退火的步骤是在约700℃或更高温度下实施。
4.如权利要求3所述的方法，其中该在分压约1～100毫托耳的氧化气体存在下将该氧氮化硅膜层退火的步骤是在约1000℃～1100℃间实施。
5.如权利要求1所述的方法，其中该在分压约1～100毫托耳的氧化气体存在下将该氧氮化硅膜层退火的步骤是实施约1～120秒。
6.如权利要求1所述的方法，其中该在分压约1～100毫托耳的氧化气体存在下将该氧氮化硅膜层退火的步骤是在处理室压约100毫托耳至800托耳间实施。
7.如权利要求1所述的方法，其中该氧化气体是选自氧气、氧化二氮、氧化氮及臭氧中。
8.如权利要求1所述的方法，其中该氧化气体为氧气。
9.如权利要求1所述的方法，其中该在分压约1～100毫托耳的氧化气体存在下将该氧氮化硅膜层退火的步骤更包含以一还原气体将该氧氮化硅膜层退火。
10.如权利要求9所述的方法，其中该还原气体是氢气。
11.如权利要求1所述的方法，其中该在分压约1～100毫托耳的氧化气体存在下将该氧氮化硅膜层退火的步骤更包含以一惰性气体将该氧氮化硅膜层退火。
12.如权利要求11所述的方法，其中该惰性气体是选自氮气、氦气及氩气。
13.如权利要求1所述的半导体组件，其中在以氧气将该氧氮化硅膜层退火的步骤中，氧气的流速约为1slm且是在约900℃至约1100℃下实施。
14.如权利要求1所述的方法，其中在以氧气将该氧氮化硅膜层退火的步骤中，氧气的流速约为1slm且是在约10毫托耳至约100托耳的压力下实施。
15.如权利要求1所述的方法，其中该以分压约0.5～3.0托耳的氧气将该氧氮化硅膜层退火的步骤，是实施约1秒至约120秒。
16.一种用以退火一处理室中具有氧氮化硅膜层的半导体基材的方法，包含：
在约1000℃至约1100℃的温度下，将约1～100毫托耳的氧化气体流入该处理室中；
以约1slm流速将约0.5～3托耳的氧气流入该处理室中；
其中该将约1～100毫托耳的氧化气体流入该处理室中的步骤是在较该将约0.5～3托耳的氧气流入该处理室的步骤更高温度与更高处理室压下实施。
17.如权利要求16所述的方法，其中该将约1～100毫托耳的氧化气体流入该处理室中的步骤是在约1000℃的温度下实施。
18.如权利要求16所述的方法，其中该将约1～100毫托耳的氧化气体流入该处理室中的步骤是实施约1秒至约120秒。
19.如权利要求16所述的方法，其中该将约1～100毫托耳的氧化气体流入该处理室中的步骤是在处理室压约100毫托耳至约800托耳下实施。
20.如权利要求16所述的方法，其中该氧化气体是选自氧气、氧化二氮、氧化氮及臭氧中。
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