CN101286507B - 半导体装置及便携式设备 - Google Patents

半导体装置及便携式设备 Download PDF

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Publication number
CN101286507B
CN101286507B CN2008101092128A CN200810109212A CN101286507B CN 101286507 B CN101286507 B CN 101286507B CN 2008101092128 A CN2008101092128 A CN 2008101092128A CN 200810109212 A CN200810109212 A CN 200810109212A CN 101286507 B CN101286507 B CN 101286507B
Authority
CN
China
Prior art keywords
semiconductor element
semiconductor
semiconductor device
resin layer
outer edge
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
CN2008101092128A
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English (en)
Chinese (zh)
Other versions
CN101286507A (zh
Inventor
大塚健志
今冈俊一
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Sanyo Electric Co Ltd
Original Assignee
Sanyo Electric Co Ltd
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Filing date
Publication date
Application filed by Sanyo Electric Co Ltd filed Critical Sanyo Electric Co Ltd
Publication of CN101286507A publication Critical patent/CN101286507A/zh
Application granted granted Critical
Publication of CN101286507B publication Critical patent/CN101286507B/zh
Expired - Fee Related legal-status Critical Current
Anticipated expiration legal-status Critical

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    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/071—Connecting or disconnecting
    • H10W72/073—Connecting or disconnecting of die-attach connectors
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/071—Connecting or disconnecting
    • H10W72/075—Connecting or disconnecting of bond wires
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/50—Bond wires
    • H10W72/541—Dispositions of bond wires
    • H10W72/5449—Dispositions of bond wires not being orthogonal to a side surface of the chip, e.g. fan-out arrangements
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/50—Bond wires
    • H10W72/551—Materials of bond wires
    • H10W72/552—Materials of bond wires comprising metals or metalloids, e.g. silver
    • H10W72/5522—Materials of bond wires comprising metals or metalloids, e.g. silver comprising gold [Au]
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/851—Dispositions of multiple connectors or interconnections
    • H10W72/874—On different surfaces
    • H10W72/884—Die-attach connectors and bond wires
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W90/00—Package configurations
    • H10W90/701—Package configurations characterised by the relative positions of pads or connectors relative to package parts
    • H10W90/721—Package configurations characterised by the relative positions of pads or connectors relative to package parts of bump connectors
    • H10W90/724—Package configurations characterised by the relative positions of pads or connectors relative to package parts of bump connectors between a chip and a stacked insulating package substrate, interposer or RDL
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W90/00—Package configurations
    • H10W90/701—Package configurations characterised by the relative positions of pads or connectors relative to package parts
    • H10W90/731—Package configurations characterised by the relative positions of pads or connectors relative to package parts of die-attach connectors
    • H10W90/732—Package configurations characterised by the relative positions of pads or connectors relative to package parts of die-attach connectors between stacked chips
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W90/00—Package configurations
    • H10W90/701—Package configurations characterised by the relative positions of pads or connectors relative to package parts
    • H10W90/731—Package configurations characterised by the relative positions of pads or connectors relative to package parts of die-attach connectors
    • H10W90/734—Package configurations characterised by the relative positions of pads or connectors relative to package parts of die-attach connectors between a chip and a stacked insulating package substrate, interposer or RDL
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W90/00—Package configurations
    • H10W90/701—Package configurations characterised by the relative positions of pads or connectors relative to package parts
    • H10W90/751—Package configurations characterised by the relative positions of pads or connectors relative to package parts of bond wires
    • H10W90/754—Package configurations characterised by the relative positions of pads or connectors relative to package parts of bond wires between a chip and a stacked insulating package substrate, interposer or RDL

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  • Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)
CN2008101092128A 2007-01-31 2008-01-31 半导体装置及便携式设备 Expired - Fee Related CN101286507B (zh)

Applications Claiming Priority (4)

Application Number Priority Date Filing Date Title
JP020683/07 2007-01-31
JP2007020683 2007-01-31
JP011473/08 2008-01-22
JP2008011473A JP5193611B2 (ja) 2007-01-31 2008-01-22 半導体装置

Publications (2)

Publication Number Publication Date
CN101286507A CN101286507A (zh) 2008-10-15
CN101286507B true CN101286507B (zh) 2011-12-21

Family

ID=39787192

Family Applications (1)

Application Number Title Priority Date Filing Date
CN2008101092128A Expired - Fee Related CN101286507B (zh) 2007-01-31 2008-01-31 半导体装置及便携式设备

Country Status (2)

Country Link
JP (2) JP5193611B2 (https=)
CN (1) CN101286507B (https=)

Families Citing this family (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP5535351B1 (ja) * 2013-03-01 2014-07-02 株式会社東芝 半導体装置
JP6081229B2 (ja) 2013-03-01 2017-02-15 株式会社東芝 半導体装置、無線装置、及び記憶装置
JP6004537B2 (ja) 2013-03-18 2016-10-12 コベルコ建機株式会社 ジブ
KR102501845B1 (ko) 2021-02-08 2023-02-20 경희대학교 산학협력단 백수오 추출물을 유효성분으로 포함하는 피부 재생 또는 상처 치료용 조성물
JP2026048017A (ja) * 2024-09-04 2026-03-16 華泰電子股▲分▼有限公司 半導体パッケージ及びその製造方法

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20030045029A1 (en) * 2000-05-11 2003-03-06 Yoshiaki Emoto Semiconductor device and method for manufacturing the same
CN1519929A (zh) * 2002-12-19 2004-08-11 ��ʽ����뵼����Դ�о��� 半导体芯片及其制作方法
CN1815733A (zh) * 2005-01-13 2006-08-09 夏普株式会社 半导体装置及其制造方法

Family Cites Families (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH05235113A (ja) * 1992-02-21 1993-09-10 Toshiba Corp 半導体装置
JPH06275752A (ja) * 1993-03-18 1994-09-30 Hitachi Ltd 半導体装置の冷却装置
JP2005150456A (ja) * 2003-11-17 2005-06-09 Oki Electric Ind Co Ltd 半導体装置及びその製造方法
JP2005268533A (ja) * 2004-03-18 2005-09-29 Shinko Electric Ind Co Ltd 積層型半導体装置
JP2008177241A (ja) * 2007-01-16 2008-07-31 Toshiba Corp 半導体パッケージ

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20030045029A1 (en) * 2000-05-11 2003-03-06 Yoshiaki Emoto Semiconductor device and method for manufacturing the same
CN1519929A (zh) * 2002-12-19 2004-08-11 ��ʽ����뵼����Դ�о��� 半导体芯片及其制作方法
CN1815733A (zh) * 2005-01-13 2006-08-09 夏普株式会社 半导体装置及其制造方法

Also Published As

Publication number Publication date
JP2008211188A (ja) 2008-09-11
CN101286507A (zh) 2008-10-15
JP5193611B2 (ja) 2013-05-08
JP2013055367A (ja) 2013-03-21
JP5431567B2 (ja) 2014-03-05

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Granted publication date: 20111221

Termination date: 20220131