CN101233608B - 连接构造体的制造方法 - Google Patents
连接构造体的制造方法 Download PDFInfo
- Publication number
- CN101233608B CN101233608B CN2006800279973A CN200680027997A CN101233608B CN 101233608 B CN101233608 B CN 101233608B CN 2006800279973 A CN2006800279973 A CN 2006800279973A CN 200680027997 A CN200680027997 A CN 200680027997A CN 101233608 B CN101233608 B CN 101233608B
- Authority
- CN
- China
- Prior art keywords
- electrode
- mentioned
- substrate
- bonding agent
- adhesive
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
Links
Images
Classifications
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/30—Assembling printed circuits with electric components, e.g. with resistor
- H05K3/32—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits
- H05K3/321—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits by conductive adhesives
- H05K3/323—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits by conductive adhesives by applying an anisotropic conductive adhesive layer over an array of pads
-
- G—PHYSICS
- G02—OPTICS
- G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
- G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
- G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour
- G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour based on liquid crystals, e.g. single liquid crystal display cells
- G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
- G02F1/1333—Constructional arrangements; Manufacturing methods
- G02F1/1345—Conductors connecting electrodes to cell terminals
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L24/28—Structure, shape, material or disposition of the layer connectors prior to the connecting process
- H01L24/29—Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L24/31—Structure, shape, material or disposition of the layer connectors after the connecting process
- H01L24/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L24/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/36—Assembling printed circuits with other printed circuits
-
- G—PHYSICS
- G02—OPTICS
- G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
- G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
- G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour
- G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour based on liquid crystals, e.g. single liquid crystal display cells
- G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
- G02F1/1333—Constructional arrangements; Manufacturing methods
- G02F1/1345—Conductors connecting electrodes to cell terminals
- G02F1/13452—Conductors connecting driver circuitry and terminals of panels
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/02—Bonding areas; Manufacturing methods related thereto
- H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
- H01L2224/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
- H01L2224/0554—External layer
- H01L2224/0556—Disposition
- H01L2224/05568—Disposition the whole external layer protruding from the surface
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/02—Bonding areas; Manufacturing methods related thereto
- H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
- H01L2224/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
- H01L2224/0554—External layer
- H01L2224/05573—Single external layer
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
- H01L2224/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
- H01L2224/161—Disposition
- H01L2224/16151—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/16221—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/16225—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L2224/28—Structure, shape, material or disposition of the layer connectors prior to the connecting process
- H01L2224/29—Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
- H01L2224/29001—Core members of the layer connector
- H01L2224/29099—Material
- H01L2224/2919—Material with a principal constituent of the material being a polymer, e.g. polyester, phenolic based polymer, epoxy
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
- H01L2224/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
- H01L2224/321—Disposition
- H01L2224/32151—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/32221—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/32225—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
- H01L2224/732—Location after the connecting process
- H01L2224/73201—Location after the connecting process on the same surface
- H01L2224/73203—Bump and layer connectors
- H01L2224/73204—Bump and layer connectors the bump connector being embedded into the layer connector
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L2224/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
- H01L2224/831—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector the layer connector being supplied to the parts to be connected in the bonding apparatus
- H01L2224/83101—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector the layer connector being supplied to the parts to be connected in the bonding apparatus as prepeg comprising a layer connector, e.g. provided in an insulating plate member
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L2224/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
- H01L2224/8319—Arrangement of the layer connectors prior to mounting
- H01L2224/83192—Arrangement of the layer connectors prior to mounting wherein the layer connectors are disposed only on another item or body to be connected to the semiconductor or solid-state body
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L2224/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
- H01L2224/838—Bonding techniques
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01006—Carbon [C]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01015—Phosphorus [P]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01029—Copper [Cu]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01033—Arsenic [As]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01047—Silver [Ag]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01049—Indium [In]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/0105—Tin [Sn]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01078—Platinum [Pt]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01079—Gold [Au]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/06—Polymers
- H01L2924/0665—Epoxy resin
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/06—Polymers
- H01L2924/078—Adhesive characteristics other than chemical
- H01L2924/0781—Adhesive characteristics other than chemical being an ohmic electrical conductor
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/06—Polymers
- H01L2924/078—Adhesive characteristics other than chemical
- H01L2924/0781—Adhesive characteristics other than chemical being an ohmic electrical conductor
- H01L2924/07811—Extrinsic, i.e. with electrical conductive fillers
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/10—Details of semiconductor or other solid state devices to be connected
- H01L2924/11—Device type
- H01L2924/14—Integrated circuits
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
- H05K2201/10—Details of components or other objects attached to or integrated in a printed circuit board
- H05K2201/10613—Details of electrical connections of non-printed components, e.g. special leads
- H05K2201/10621—Components characterised by their electrical contacts
- H05K2201/10674—Flip chip
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2203/00—Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
- H05K2203/14—Related to the order of processing steps
- H05K2203/1476—Same or similar kind of process performed in phases, e.g. coarse patterning followed by fine patterning
Landscapes
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Power Engineering (AREA)
- Manufacturing & Machinery (AREA)
- Nonlinear Science (AREA)
- Crystallography & Structural Chemistry (AREA)
- Chemical & Material Sciences (AREA)
- Mathematical Physics (AREA)
- General Physics & Mathematics (AREA)
- Optics & Photonics (AREA)
- Wire Bonding (AREA)
- Combinations Of Printed Boards (AREA)
- Electric Connection Of Electric Components To Printed Circuits (AREA)
- Liquid Crystal (AREA)
Abstract
本发明提供一种连接构造体的制造方法,该连接构造体的制造方法是在第一基板(12)上形成有第一电极(13)的第一电路部件上临时固定粘接剂(20),在第一电极(13)和第二电极(32)之间夹入粘接剂(20)并使第一电极(13)和第二电极(32)相对的状态下,配置在第二基板上形成有第二电极(32)的第二电路部件(30),在第一电极(13)和第二电极(32)的连接方向加压加热第二电路部件(30),使得介于第一电极(13)和第二电极(32)之间的粘接剂(20)硬化,对从第二电路部件(30)的外周溢出的粘接剂的未硬化部分(23)照射能量波(51)而进行硬化。
Description
技术领域
本发明是使用粘接剂连接彼此相对的电路基板的连接构造体的制造方法,尤其涉及使用各向异性导电粘接剂在液晶面板的玻璃基板上的透明电极上安装驱动用IC的液晶装置的制造方法。
背景技术
近年来,使用携带用薄轻短小化的信息处理装置。在这种装置中,作为显示装置一般使用液晶装置。安装有IC的液晶装置使用于传真设备、移动电话、音响设备、家用制品、液晶打印机、液晶投影机、液晶监视器以及液晶电视接收机等多种商品。
最近被称为液晶原件的玻璃覆晶的液晶驱动用IC的安装方法中的导电部件从银胶逐渐变为各向异性导电粘接剂。在专利文献1(日本特开昭62-244143号公报)中已公开有在液晶面板的玻璃基板上的透明电极上直接安装驱动用IC的液晶装置的制造方法。
具体为在液晶面板的玻璃基板的伸出部上配设各向异性导电粘接剂,并在各向异性导电粘接剂上面朝下地对驱动用IC进行定位后,通过使用加热部件从驱动用IC的背面进行加压、加热而安装驱动用IC。
但是,在上述的方法中,虽然驱动用IC下侧的各向异性导电粘接剂硬化,但在外周周边的各向异性导电粘接剂的溢出的部分产生未硬化部分。该各向异性导电粘合剂的未硬化部分吸收水分,从而成为引起电蚀现象、例如,接通了电源时透明电极被电解(氧化铟成为铟单质)、断线、不通电现象的原因之一。
此外,在专利文献2(日本特开2001-93936号公报)中已公开有通过在溢出在外周周边的未硬化的各向异性导电粘接剂上吹热风而使其硬化的方法。
发明内容
本发明的目的在于提供通过硬化粘接剂的未硬化部分而防止电蚀现象的连接构造体的制造方法。
根据本发明,提供以下的连接构造体的制造方法。
第一方案的连接构造体的制造方法是在第一基板上形成有第一电极的第一电路部件上放置粘接剂,
在上述第一电极与上述第二电极之间夹入上述粘接剂并使上述第一电极与上述第二电极相对的状态下,配置在第二基板上形成有第二电极的第二电路部件,
在上述第一电极和上述第二电极的连接方向加压加热上述第二电路部件,使得介于上述第一电极和上述第二电极之间的粘接剂硬化,
对从上述第二电路部件的外周溢出的粘接剂的未硬化部分照射能量波而进行硬化。
第二方案的连接构造体的制造方法在第一方案的基础上,上述粘接剂为各向异性导电粘接剂,上述第一电路部件为液晶面板的玻璃基板,上述第二电路部件为驱动用IC。
根据本发明,能够提供通过硬化粘接剂的未硬化部分而防止电蚀现象的连接构造体的制造方法。
附图说明
图1是表示涉及本发明的连接构造体的制造方法的一个实施方式的工序图。
具体实施方式
以下基于附图对本发明的连接构造体的制造方法进行说明。
图1是表示涉及本发明的连接构造体的制造方法的一个实施方式的工序图。在该实施方式中,将液晶面板的玻璃基板(第一电路部件)通过各向异性导电膜(粘接剂)连接在驱动用IC(第二电路部件)上。
图1(a)表示将各向异性导电膜20粘贴在基板上的工序。
如该图所示,在液晶面板10的下玻璃基板11的伸出部12上形成的导电图案(第一电极)13上的规定的位置上临时固定各向异性导电膜20。
各向异性导电薄膜(未图示)通常由基底薄膜和以膜状层叠在其上的各向异性导电膜构成。如图1(d)、(e)所示,各向异性导电膜通常由热塑性树脂等的绝缘性树脂21和导电粒子22构成。
这里,就基底薄膜而言,作为各向异性导电膜的载体带起作用,只要不阻碍各向异性导电膜对基板的转贴,对其形成材料或厚度等没有特殊的限制。例如,能够使用聚四氟乙烯、实施了剥离处理的聚对苯二甲酸乙二醇酯(PET)薄膜等。
各向异性导电膜虽然通常在绝缘性树脂中分散有导电粒子,但绝缘性树脂或导电粒子其本身,能够做成与公知的各向异性导电膜相同。
例如,作为绝缘性树脂,能够使用各种热固性粘接剂或热塑性粘接剂。从IC芯片安装后的可靠性方面考虑,最好使用环氧系树脂、氨基甲酸乙酯系树脂、丙烯酸酯系树脂以及BT树脂等热固性粘接剂。此外,在由这些树脂成分制备绝缘性树脂的场合,既可以使用单一种树脂成分,也可以混合多种而使用。
另一方面,作为导电粒子,能够使用例如Ni、Ag、Cu或由这些的合金等构成的金属粉、以及在球状树脂粒子的表面镀了金属的粒子等由电良导体构成的多种粒子。也能够使用在由这样的电良导体构成的粒子上形成了绝缘保护模的粒子。另外,最好将导电粒子的粒径做成0.2~20μm。
在该工序(a)中,剥掉各向异性导电薄膜的基底薄膜,将各向异性导电膜20粘贴在基板上。
如图1(b)所示,各向异性导电膜20的大小L1(例如,2.0~3.0mm),设定成与驱动用IC30的大小L2(例如,1.8~2.8mm)相同或稍微大一些。
此外,虽然在本实施方式中使用各向异性导电膜,但也可以将粘接剂通过印刷涂敷或浇注封装来配设以代替做成带状(膜状)。
图1(b)是对驱动用IC30进行定位及临时固定的工序,以使驱动用IC30的凸出部(第二电极)32处在下侧并面朝下的状态安置在各向异性导电膜20的上面。
就驱动用IC30而言,例如在Cu上镀了Au的衬垫电极(未图示)上形成有凸出部32。在与该衬垫电极相对的位置设有下玻璃基板12的导电图案13。
图1(c)是利用加热部件40从驱动用IC30的背面进行加压、加热的工序。如图1(d)所示,若利用加热部件40从驱动用IC的背面进行加压、加热,则凸出部32通过介于中间的各向异性导电膜20的导电粒子22与导电图案13电连接。
另外,各向异性导电膜20的树脂21一冷却就粘合,从而将驱动用IC30的凸出部32固定在下玻璃基板12的导电图案13上。
此时,在驱动用IC30的外周周边产生树脂的溢出部23(未硬化部分)。该驱动用IC30的外周周边的溢出部23的树脂几乎没有硬化。
图1(e)是利用激光照射使未硬化部分硬化的工序。作为照射激光的装置,例如使用激光发射装置50将激光51照射在溢出部23上,以使树脂硬化。
通过这样对溢出的树脂进行硬化,能够防止该部分的腐蚀等。
此外,在本实施方式中,虽然利用激光照射使未硬化部分硬化,但也能利用激光以外的能量波进行硬化。例如,也可以使用远红外线、高频等。这样,由于通过利用能量波进行硬化,就能仅对未硬化部分选择性地进行照射而进行硬化,因此能够有效地进行硬化而对电路电极的其它部分不会造成损伤。
此外,虽然上述实施方式使用各向异性导电粘接剂,但即使在以各向同性导电粘接剂代替各向异性导电粘接剂进行安装,并在面朝下地安装的IC芯片附近的电路基板上涂敷液态的树脂后,加热电路基板而使液态树脂低粘度化,并在IC芯片和电路基板的间隙内填充低粘度化的液态树脂,进一步用高温使液态树脂硬化的制造方法中,在IC芯片的外周周边存在溢出树脂的未硬化部分的场合,如在本实施方式中已说明,能够对液晶面板的偏转板不产生影响地使用激光等的能量波有效地照射未硬化部分而进行硬化。
另外,虽然上述实施方式使用了各向异性导电粘接剂,但在以使用导电胶代替各向异性导电粘接剂进行COG安装后,利用树脂进行铸型的方法中,作为硬化IC芯片周边的树脂的方法,使用本发明也能够得到同样的效果。
另外,在工业上,本发明的连接构造体的制造方法能够在电气、电子领域广泛使用。
Claims (2)
1. 一种连接构造体的制造方法,其特征在于:
在第一基板上形成有第一电极的第一电路部件上放置粘接剂;
在上述第一电极与上述第二电极之间夹入上述粘接剂并使上述第一电极与上述第二电极相对的状态下,配置在第二基板上形成有第二电极的第二电路部件;
在上述第一电极和上述第二电极的连接方向加压加热上述第二电路部件,使得介于上述第一电极和上述第二电极之间的粘接剂硬化;以及,
对从上述第二电路部件的外周溢出的粘接剂的未硬化部分照射能量波而进行硬化。
2. 根据权利要求1所述的连接构造体的制造方法,其特征在于,
上述粘接剂为各向异性导电粘接剂,上述第一电路部件为液晶面板的玻璃基板,上述第二电路部件为驱动用IC。
Applications Claiming Priority (3)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP226090/2005 | 2005-08-04 | ||
JP2005226090 | 2005-08-04 | ||
PCT/JP2006/314179 WO2007015367A1 (ja) | 2005-08-04 | 2006-07-18 | 接続構造体の製造方法 |
Publications (2)
Publication Number | Publication Date |
---|---|
CN101233608A CN101233608A (zh) | 2008-07-30 |
CN101233608B true CN101233608B (zh) | 2011-02-02 |
Family
ID=37708646
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
CN2006800279973A Expired - Fee Related CN101233608B (zh) | 2005-08-04 | 2006-07-18 | 连接构造体的制造方法 |
Country Status (5)
Country | Link |
---|---|
JP (1) | JPWO2007015367A1 (zh) |
KR (1) | KR20080031311A (zh) |
CN (1) | CN101233608B (zh) |
TW (1) | TW200708218A (zh) |
WO (1) | WO2007015367A1 (zh) |
Families Citing this family (6)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP5144102B2 (ja) * | 2007-03-30 | 2013-02-13 | 京セラディスプレイ株式会社 | 基板への電子回路の搭載方法 |
CN101923414B (zh) * | 2010-08-13 | 2012-07-25 | 友达光电股份有限公司 | 电子装置的制造方法 |
KR102078019B1 (ko) * | 2012-11-28 | 2020-02-18 | 엘지디스플레이 주식회사 | 소수성 특성을 갖는 접착수단을 포함하는 표시장치 및 접착수단을 이용한 구동 ic의 실장 방법 |
CN104794096A (zh) * | 2015-01-21 | 2015-07-22 | 李振华 | 可动态组合和调整的个人工作系统 |
CN108901144A (zh) * | 2018-07-17 | 2018-11-27 | 天津瑞爱恩科技有限公司 | 增强印刷线路板软硬板组合强度的方法 |
CN112327128B (zh) * | 2020-11-06 | 2021-05-14 | 法特迪精密科技(苏州)有限公司 | 一种测试装置及测试方法 |
Citations (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN1111823A (zh) * | 1993-11-29 | 1995-11-15 | 株式会社东芝 | 树脂封装半导体器件及其制造方法 |
Family Cites Families (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2001156114A (ja) * | 1999-09-14 | 2001-06-08 | Sony Chem Corp | 異方性導電接続体および製造方法 |
-
2006
- 2006-07-18 WO PCT/JP2006/314179 patent/WO2007015367A1/ja active Application Filing
- 2006-07-18 KR KR1020087001818A patent/KR20080031311A/ko not_active Application Discontinuation
- 2006-07-18 JP JP2007529205A patent/JPWO2007015367A1/ja not_active Withdrawn
- 2006-07-18 CN CN2006800279973A patent/CN101233608B/zh not_active Expired - Fee Related
- 2006-07-26 TW TW095127332A patent/TW200708218A/zh unknown
Patent Citations (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN1111823A (zh) * | 1993-11-29 | 1995-11-15 | 株式会社东芝 | 树脂封装半导体器件及其制造方法 |
Non-Patent Citations (1)
Title |
---|
JP特开2001-156114A 2001.06.08 |
Also Published As
Publication number | Publication date |
---|---|
KR20080031311A (ko) | 2008-04-08 |
WO2007015367A1 (ja) | 2007-02-08 |
TW200708218A (en) | 2007-02-16 |
CN101233608A (zh) | 2008-07-30 |
JPWO2007015367A1 (ja) | 2009-02-19 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
US6806936B2 (en) | Display module including a display panel connected to a flexible wire board with an insulating protective layer extended inside the display panel | |
CN101233608B (zh) | 连接构造体的制造方法 | |
JP5972844B2 (ja) | 異方性導電フィルム、異方性導電フィルムの製造方法、接続体の製造方法、及び接続方法 | |
TWI239556B (en) | Reinforcement combining apparatus and method of combining reinforcement | |
JP2007534023A (ja) | 電子インク表示装置及びその製造方法 | |
TWI540591B (zh) | A connection method, a method of manufacturing a connector, and a linker | |
TWI513583B (zh) | 接合體及其製造方法 | |
JP5608545B2 (ja) | 熱圧着ヘッド、実装装置及び実装方法 | |
JP6679320B2 (ja) | 接続体の製造方法、電子部品の接続方法 | |
JP5836830B2 (ja) | 接続体の製造方法、及び接続方法 | |
JP6151412B2 (ja) | 異方性導電フィルム、異方性導電フィルムの製造方法、接続体の製造方法、及び接続方法 | |
JP2006245554A (ja) | 電気部品の実装方法 | |
US20010044170A1 (en) | Method for resin coating of semiconductor device, coating resin and liquid crystal display device | |
JP5926590B2 (ja) | 接続体の製造方法、及び電子部品の接続方法 | |
JP6370562B2 (ja) | 接続体の製造方法、フレキシブル基板の接続方法、接続体及びフレキシブル基板 | |
JP2012124504A (ja) | 電気部品の実装方法 | |
JP6291165B2 (ja) | 接続体の製造方法、及び電子部品の接続方法 | |
JP2011081257A (ja) | 回路部品の製造方法 | |
KR100923943B1 (ko) | 전자 장치 및 전자 장치의 제조 방법 | |
Matsuda et al. | Interconnection technologies of anisotropic conductive films and their application to flexible electronics | |
JP2017175015A (ja) | 接続体の製造方法 | |
JPH05142560A (ja) | 異方性導電膜 | |
JP2006120471A (ja) | 基板の接続構造 | |
JP2006131822A (ja) | 異方導電性接着フィルムの仮圧着方法 | |
TW201546919A (zh) | 連接體之製造方法、電子零件之連接方法 |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
C06 | Publication | ||
PB01 | Publication | ||
C10 | Entry into substantive examination | ||
SE01 | Entry into force of request for substantive examination | ||
C14 | Grant of patent or utility model | ||
GR01 | Patent grant | ||
C17 | Cessation of patent right | ||
CF01 | Termination of patent right due to non-payment of annual fee |
Granted publication date: 20110202 Termination date: 20120718 |