CN101211857A - 快闪存储器件及其制造方法 - Google Patents
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Abstract
本发明提供一种快闪存储器件及其制造方法。可以在衬底上形成器件隔离层、隧道氧化物膜和浮置栅极。可以在衬底上形成氧化物-氮化物-氧化物(ONO)层,并可以在所述ONO层上形成控制栅极。可以在所述控制栅极的侧壁上由高温氧化物膜和氮化物膜形成隔离物。
Description
技术领域
本发明涉及快闪存储器件及其制造方法。
背景技术
快闪存储器是非易失存储介质,其能存储数据并且即使不供应电源也不会损坏数据。快闪存储器可以相对高的速度进行数据处理,比如记录、读取、和删除。因此,快闪存储器常用于个人电脑的Bios和用于机顶盒、打印机和网络服务器的数据存储。最近快闪存储器也用于数字式照像机和移动电话。
对于快闪存储器,循环和数据保持性能是至关重要的。循环可能往往是最重要的性能,循环是指如下事实:尽管数据的读取、写入和擦除可以重复几次,但是可以重复移动电子进出浮置栅极的操作而不改变快闪存储器的性能。如果浮置栅极中的电子通过ONO层和隧道氧化物膜逃逸,则数据保持性能可能劣化。具体而言,如果存在流动通过单元区域外部的漏电流,和如果电子通过浮置栅极侧面逃逸,则数据保持性能尤其可能劣化。
现有技术的快闪存储器存在的一个问题是浮置栅极周围的电荷可能不消散,即使在后续步骤发生之后。随着快闪存储器尺度到达了0.13μm技术和更低,该问题经常出现。
因此,在本领域中存在改进快闪存储器和其制造方法的需要。
发明内容
本发明的实施方案提供一种快闪存储器件及其制造方法。可以阻止存储在快闪存储器件浮置栅极中的电子逃逸到器件的外部。另外,可以抑制在隔离物氮化物膜中的电子进入浮置栅极。
在一个实施方案中,一种制造快闪存储器件的方法可包括在衬底上形成器件隔离层,隧道氧化物膜,和浮置栅极。可以在衬底上形成氧化物-氮化物-氧化物(ONO)层,并可以在所述ONO层上形成控制栅极。可以在所述衬底和控制栅极上形成高温氧化物膜,和可以在所述高温氧化物膜上形成氮化物膜。通过蚀刻高温氧化物膜和氮化物膜可以形成隔离物。
根据本发明的一个实施方案的快闪存储器件可包含:具有器件隔离层的衬底;所述衬底上的隧道氧化物膜和浮置栅极;所述浮置栅极上的ONO层;所述ONO层上的控制栅极;和在所述隧道氧化物膜、浮置栅极、ONO层、和控制栅极侧面上形成的隔离物,其中所述隔离物包括高温氧化物膜和氮化物膜。
附图说明
图1~8是显示根据本发明的一个实施方案制造快闪存储器件方法的横截面图。
具体实施方式
在本发明中使用术语“上(on)”或“上方(over)”时,当涉及层、区域、图案或结构时,理解为所述层、区域、图案或结构可以直接在另一个层或结构上,或也可存在插入其间的层、区域、图案或结构。在本发明中使用术语“下(under)”或“下方(below)”时,当涉及层、区域、图案或结构时,理解为所述层、区域、图案或结构可以直接在另一个层或结构下,或也可存在插入其间的层、区域、图案或结构。
参考图1,可以制备衬底20,并划分为单元区域和周边区域。在一个实施方案中,在形成器件隔离层26时,可以在衬底20上顺序形成氧化物膜21、氮化物膜22、和绝缘层23。绝缘层23可以为本领域中已知的任何适当的材料,例如,原硅酸四乙基酯(TEOS)。
参考图2,可以在绝缘层23上沉积掩模材料(未显示)并然后可图案化。通过利用掩模材料作为蚀刻掩模进行刻蚀过程可以蚀刻衬底20。然后可以除去掩模材料。
绝缘材料可以填隙在衬底20上,并可以实施沟槽化学机械抛光(CMP)工艺以在衬底20上形成器件隔离层26。器件隔离层26可用作用于绝缘后续在衬底20上形成的各种器件的区域。绝缘材料可以为本领域中已知的任何适当材料,例如,高密度等离子体未掺杂的硅酸盐玻璃(HDP-USG)。
可以除去氮化物膜。因此,可以在器件隔离层26的各区域之间的衬底上形成氧化物膜24。
尽管图2中未显示,但是可以在包括器件隔离层26的衬底20上选择性地进行离子注入过程,使得可以在衬底20上形成P阱和N阱。
参考图3,可以在衬底20上沉积多晶硅层,然后可以图案化衬底20的单元区域以形成第一多晶硅层28’。第一多晶硅层28’可以为浮置栅极的一部分,所述浮置栅极下方可以是通过图案化氧化物膜24形成的隧道氧化物膜。在一个实施方案中,第一多晶硅层28’可以掺杂有掺杂剂。在氧化物膜24和氧化物-氮化物-氧化物(ONO)层30之间隔离以有助于保持电荷(电子)的第一多晶硅层28’可以具有改进的激发态。
可以在衬底20上顺序沉积第一氧化物层(未显示)、氮化物层(未显示)、和第二氧化物层(未显示)。可以实施退火过程,可以图案化衬底20的单元区域以形成ONO层30。ONO层30可以在第一多晶硅层28’上和在其侧面。ONO层30可用于帮助单元区域的上部与单元区域的下部绝缘。
然后,可以在衬底20上形成掩模材料(未显示),并可以图案化以除去周边区域的掩模材料,仅在衬底20的单元区域上形成掩模层(未显示),并暴露周边区域上的ONO层30。
参考图4,可以通过利用掩模层作为蚀刻掩模蚀刻衬底20,来除去衬底20的周边区域上的多晶硅层28和ONO层30。
参考图5,可以在包括单元区域和周边区域的衬底20上沉积多晶硅层32。
在一个实施方案中,在沉积多晶硅层32之前可以选择性地除去衬底20的周边区域上的氧化物膜24的部分。可以在已经除去了氧化物膜24的衬底20部分上形成杂质区域。
参考图6,可以图案化多晶硅层32以形成第二多晶硅层32a和32b。
可以形成衬底20的单元区域的第二多晶硅层32a以覆盖ONO层30。在一个实施方案中,第二多晶硅层32a可以形成在超过一个浮置栅极上。例如,第二多晶硅层32可以形成在由氧化物膜24和第一多晶硅层28’形成的两个浮置栅极上。衬底20的周边区域的第二多晶硅层32b可以形成在器件隔离层26之间的可以称为栅极形成区域的区域中。形成在衬底20的单元区域上的第二多晶硅层32a可以为控制栅极的一部分,形成在衬底的周边区域上的第二多晶硅层32b可以为浮置栅极的一部分。
在一个实施方案中,形成在衬底20的单元区域上的第二多晶硅层32a可用于施加偏压,其激励第一多晶硅层28’中的电子,以使它们充入或释放。
参考图7,可以在衬底20上形成高温氧化物膜41,和可以在高温氧化物膜41上形成氮化物膜42。高温氧化物膜41可以为例如在约500℃~约800℃温度下沉积的氧化物膜。在一个实施方案中,高温氧化物膜41可以为在约780℃的温度下沉积的氧化物膜。高温氧化物膜41也可以形成为例如约100~约200的厚度。可以使用本领域中已知的任何适当的沉积方法沉积高温氧化物膜,例如低压化学气相沉积(LP-CVD)方法。
参考图8,可以毯覆式蚀刻高温氧化物膜41和氮化物膜42,以在第二多晶硅层32a和32b的侧壁上形成由高温氧化物膜图案41’和氮化物图案42’形成的隔离物43。可以通过本领域中已知的任何适当的工艺蚀刻高温氧化物膜41和氮化物膜42,例如,反应离子蚀刻(RIE)工艺。然后,可以使用第二多晶硅层32a和32b以及隔离物43作为掩模实施离子注入过程,以在衬底20内形成杂质区域36。杂质区域36可以为源极和漏极区。
在本发明的一个实施方案中,可以在快闪存储器件的衬底上形成器件隔离层、隧道氧化物膜、和浮置栅极。
可以在浮置栅极上形成ONO层,可以在ONO层上形成控制栅极。
可以在包括隧道氧化物膜、浮置栅极、ONO层和控制栅极的存储器件叠层的侧面上形成隔离物。所述隔离物可以由高温氧化物膜和氮化物膜形成。所述高温氧化物膜可以是在约500℃~约800℃,例如约780℃的温度下沉积的高温氧化物膜。另外,所述高温氧化物膜可以形成为约100~约200的厚度。
根据本发明的实施方案,可以形成结构刚性可高于TEOS层的高温氧化物膜作为隔离物的一部分,以有助于阻止存储在快闪存储器件的浮置栅极中的电子逃逸到器件的外部。所述高温氧化物膜也可以有助于抑制隔离物氮化物膜中的电子进入浮置栅极。由此,可以改进快闪存储器件的电特性。
在该说明书中对“一个实施方案”、“实施方案”、“示例实施方案”等的任何引用,表示与所述实施方案相关的具体的特征、结构、或性能包含于本发明的至少一个实施方案中。在说明书不同地方的这些术语不必都涉及相同的实施方案。另外,与任何实施方案相关地记载具体的特征、结构或性能的时候,认为在其他的实施方案中实现这种特征、结构或性能是在本领域技术人员的范围之内的。
尽管本发明中已经参考许多说明性的实施方案描述了实施方案,但是很清楚,本领域技术人员可以知道很多的其它改变和实施方案,这些也在本公开的原理的精神和范围内。更具体地,在公开、附图和所附的权利要求的范围内,在本发明的组合排列的构件和/或结构中可能具有各种的变化和改变。除构件和/或结构的变化和改变之外,对本领域技术人员而言,可替代的用途是显而易见的。
Claims (8)
1.一种制造快闪存储器件的方法,包括:
在衬底上形成器件隔离层;
在所述衬底上形成隧道氧化物膜和浮置栅极;
在所述衬底上形成氧化物-氮化物-氧化物(ONO)层;
在所述ONO层上形成控制栅极;
在所述衬底和所述控制栅极上形成高温氧化物膜;
在所述高温氧化物膜上形成氮化物膜;和
通过蚀刻所述高温氧化物膜和所述氮化物膜形成隔离物。
2.权利要求1的方法,其中所述高温氧化物膜包括在约500℃~约800℃温度下形成的氧化物膜。
3.权利要求1的方法,其中所述高温氧化物膜包括在约780℃温度下形成的氧化物膜。
4.权利要求1的方法,其中所述高温氧化物膜具有约100~约200的厚度。
5.权利要求1的方法,其中形成所述高温氧化物膜包括使用低压化学气相沉积(LP-CVD)方法。
6.一种快闪存储器件,包括:
具有器件隔离层的衬底;
在所述衬底上的隧道氧化物膜和浮置栅极;
在所述浮置栅极上的ONO层;
在所述ONO层上的控制栅极;和
在所述控制栅极侧壁上的隔离物,其中所述隔离物包括高温氧化物膜和氮化物膜。
7.权利要求6的快闪存储器件,其中所述高温氧化物膜包括在约500℃~约800℃温度下形成的氧化物膜。
8.权利要求6的快闪存储器件,其中所述高温氧化物膜具有约100~约200的厚度。
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KR1020060134644A KR20080060486A (ko) | 2006-12-27 | 2006-12-27 | 플래시 메모리 및 그 제조 방법 |
KR1020060134644 | 2006-12-27 |
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Cited By (3)
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CN101834186A (zh) * | 2008-12-24 | 2010-09-15 | 东部高科股份有限公司 | 闪存器件及其制造方法 |
CN102222645A (zh) * | 2010-04-15 | 2011-10-19 | 联华电子股份有限公司 | 制作快闪存储器元件的方法 |
CN110379815A (zh) * | 2019-07-25 | 2019-10-25 | 上海华力微电子有限公司 | Sonos存储器的形成方法及sonos存储器 |
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US5424567A (en) * | 1991-05-15 | 1995-06-13 | North American Philips Corporation | Protected programmable transistor with reduced parasitic capacitances and method of fabrication |
US5714412A (en) * | 1996-12-02 | 1998-02-03 | Taiwan Semiconductor Manufacturing Company, Ltd | Multi-level, split-gate, flash memory cell and method of manufacture thereof |
TW472398B (en) * | 1997-06-27 | 2002-01-11 | Matsushita Electric Ind Co Ltd | Semiconductor device and its manufacturing method |
US6242306B1 (en) * | 2000-07-28 | 2001-06-05 | Advanced Micro Devices | Dual bit isolation scheme for flash memory devices having polysilicon floating gates |
US6897514B2 (en) * | 2001-03-28 | 2005-05-24 | Matrix Semiconductor, Inc. | Two mask floating gate EEPROM and method of making |
TWI228834B (en) * | 2003-05-14 | 2005-03-01 | Macronix Int Co Ltd | Method of forming a non-volatile memory device |
JP5064651B2 (ja) * | 2003-11-14 | 2012-10-31 | ラピスセミコンダクタ株式会社 | 半導体記憶装置 |
KR100666384B1 (ko) * | 2005-01-07 | 2007-01-09 | 삼성전자주식회사 | 복합 장벽막을 갖는 반도체 장치 및 이를 제조하는 방법 |
US7547599B2 (en) * | 2005-05-26 | 2009-06-16 | Micron Technology, Inc. | Multi-state memory cell |
US20070007576A1 (en) * | 2005-07-07 | 2007-01-11 | Samsung Electronics Co., Ltd. | Multi-bit storageable non-volatile memory device |
US7319618B2 (en) * | 2005-08-16 | 2008-01-15 | Macronic International Co., Ltd. | Low-k spacer structure for flash memory |
KR100849362B1 (ko) * | 2006-07-12 | 2008-07-29 | 동부일렉트로닉스 주식회사 | 플래시 메모리 및 그 제조 방법 |
-
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- 2006-12-27 KR KR1020060134644A patent/KR20080060486A/ko not_active Application Discontinuation
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2007
- 2007-11-08 US US11/936,849 patent/US20080157178A1/en not_active Abandoned
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Cited By (4)
Publication number | Priority date | Publication date | Assignee | Title |
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CN101834186A (zh) * | 2008-12-24 | 2010-09-15 | 东部高科股份有限公司 | 闪存器件及其制造方法 |
CN102222645A (zh) * | 2010-04-15 | 2011-10-19 | 联华电子股份有限公司 | 制作快闪存储器元件的方法 |
CN102222645B (zh) * | 2010-04-15 | 2015-07-08 | 联华电子股份有限公司 | 制作快闪存储器元件的方法 |
CN110379815A (zh) * | 2019-07-25 | 2019-10-25 | 上海华力微电子有限公司 | Sonos存储器的形成方法及sonos存储器 |
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